Patents by Inventor An Chen Cheng

An Chen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096834
    Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Shih Hsuan HSU, Chan-Chung CHENG, Chun-Chen LIU, Cheng-Hung CHEN, Peng-Ren CHEN, Wen-Hao CHENG, Jong-l MOU
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20240097216
    Abstract: The present invention discloses a detection device and a probe module thereof, wherein an electrical connection path between a battery detection frame and a battery under test is provided via the probe module. The probe module includes a base, a first polarity plate, a second polarity plate, a first upper connection group, a second upper connection group, a first lower connection member and a second lower connection member. Via the first polarity plate, the first upper connection group is correspondingly coupled to the battery detection frame, and the first lower connection member is correspondingly coupled to the battery under test. Via the second polarity plate, the second upper connection group is correspondingly coupled to the battery detection frame, and the second lower connection member is correspondingly coupled to the battery under test. Thus, it is not necessary to process a cable having been fixed on the battery detection frame when the probe module is replaced.
    Type: Application
    Filed: June 8, 2023
    Publication date: March 21, 2024
    Inventors: CHUAN-TSE LIN, CHEN-CHOU WEN, SHIH-CHIN TAN, WEN-CHUAN CHANG, YING-CHENG CHEN
  • Publication number: 20240096757
    Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Hidehiro FUJIWARA, Tze-Chiang HUANG, Hong-Chen CHENG, Yen-Huei CHEN, Hung-Jen LIAO, Jonathan Tsung-Yung CHANG, Yun-Han LEE, Lee-Chung LU
  • Publication number: 20240096734
    Abstract: A semiconductor device module may include a leadframe spacer that provides the functions of both a leadframe and a spacer, while enabling a double-sided cooling configuration. Such a leadframe spacer may include a leadframe surface that provides a die attach pad (DAP) that is shared by at least two semiconductor devices. The leadframe spacer may include at least one downset, where the semiconductor devices may be attached within a recess defined by the at least one downset. A first substrate may be connected to a first side of the leadframe. A second substrate may be connected to downset surfaces of the at least one downset, and positioned for further connection to the semiconductor devices in a double-sided assembly.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Tzu-Hsuan CHENG, Yong LIU, Liangbiao CHEN
  • Publication number: 20240096816
    Abstract: A semiconductor device has a conductive via laterally separated from the semiconductor, an encapsulant between the semiconductor device and the conductive via, and a mark. The mark is formed from characters that are either cross-free characters or else have a overlap count of less than two. In another embodiment the mark is formed using a wobble scan methodology. By forming marks as described, defects from the marking process may be reduced or eliminated.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Jing-Cheng Lin, Chen-Hua Yu, Po-Hao Tsai
  • Publication number: 20240097351
    Abstract: The present disclosure provides an antenna system, which includes a defected ground structure board and an antenna structure board. The defected ground structure board includes a first insulating plate and a defected ground structure layer, and the defected ground structure layer is disposed on the first insulating plate. The antenna structure board is disposed on the defected ground structure board. The antenna structure board includes at least one antenna body and a second insulating plate, the at least one antenna body is disposed on the second insulating plate, and the second insulating plate is disposed on the defected ground structure layer.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 21, 2024
    Inventors: Hsin Hung LIN, Yu Shu TAI, Wei Chen CHENG
  • Publication number: 20240098791
    Abstract: Apparatus and methods are provided RLF detection for SL-U transceiving. In one novel aspect, HARQ-based RLF detection and/or LBT-based RLF detection is performed for SL-U RLF. HARQ based SL-U RLF procedure increases DTX for each PSSCH or PSCCH and disregards detected DTX on PSFCH or increases DTX for each PSFCH absence. In one embodiment, a DTX threshold value is modified. In one embodiment, the LBT based RLF procedure detects and reports an LBT failure for an RB set by the PHY layer; determines a consistent LBT (C-LBT) for the RB set based on a C-LBT threshold at the MAC layer and determines an RLF when all configured RB sets for the SL connection is determined to be C-LBT. In another novel aspect, multiple PSFCH occasions are configured for one PSSCH/PSCCH at a consecutive symbol level, a non-consecutive symbol level, a consecutive slot level or a non-consecutive slot level.
    Type: Application
    Filed: September 28, 2023
    Publication date: March 21, 2024
    Inventors: JUN-QIANG CHENG, Tao Chen, JING-WEI CHEN
  • Publication number: 20240091315
    Abstract: The present invention relates to extended recombinant polypeptide (XTEN) compositions, conjugate compositions comprising XTEN and XTEN linked to cross-linkers useful for conjugation to pharmacologically active payloads, methods of making highly purified XTEN, methods of making XTEN-linker and XTEN-payload conjugates, and methods of using the XTEN-cross-linker and XTEN-payload compositions.
    Type: Application
    Filed: March 13, 2023
    Publication date: March 21, 2024
    Inventors: Volker Schellenberger, Vladimir Podust, Chia-Wei Wang, Bryant McLaughlin, Bee-Cheng Sim, Sheng Ding, Chen Gu
  • Patent number: 11933945
    Abstract: An optical lens includes a first lens group and a second lens group. The first lens group has at least two lenses that include at least one aspheric lens, the second lens group has at least four lenses that includes at least one aspheric lens, and a total number of lenses with refractive powers in the optical lens is smaller than nine. The first and the second lens groups include a first lens, a second lens, a third lens, a fourth lens, a fifth lens and a sixth lens in order from the magnified side to the minified side. The first lens to the sixth lens have respective refractive powers of negative, negative, positive, positive, negative and positive.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: March 19, 2024
    Assignee: RAYS OPTICS INC.
    Inventors: Ching-Lung Lai, Ying-Hsiu Lin, Chen-Cheng Lee
  • Publication number: 20240089938
    Abstract: Apparatus and methods are provided for SL-U resource allocation and usage. In one novel aspect, one or two candidate starting symbols are configured. In one embodiment, the candidate starting symbols are preconfigured for AGC or a repetition of PSCCH/PSSCH data. In one embodiment, CAPC value is mapped from a PQI with a bitmap or a mapping table. The CAPC value is mapped from the PQI based on one or more elements comprising a resource type, a default priority level, a packet delay budget (PDB) requirement, and packet data error rate. In one novel aspect, multi-consecutive-slot (MCSt) resources are reserved for SL-U by applying one or more resource selection rules, comprising selecting, by a MAC layer, resources excluded by a PHY layer in an exclusion step, increasing one or more selection thresholds comprising a resource exclusion RSRP threshold, a remaining resource portion after resource exclusion threshold, and a RSRP threshold.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Inventors: JUN-QIANG CHENG, Tao Chen
  • Publication number: 20240087954
    Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes: a bottom package; wherein an area of a contact surface between the conductor and the through via substantially equals a cross-sectional area of the through via, and the bottom package includes: a molding compound; a through via penetrating through the molding compound; a die molded in the molding compound; and a conductor on the through via. An associated method of manufacturing the semiconductor device is also disclosed.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Inventors: JING-CHENG LIN, YING-CHING SHIH, PU WANG, CHEN-HUA YU
  • Patent number: 11930663
    Abstract: A display panel includes a first substrate, pixel structures, a first common pad, a second substrate, a second common electrode, a display medium and a conductive particle. The pixel structures are disposed on an active area of the first substrate. The first common pad is disposed on a peripheral area of the first substrate, and is electrically connected to first common electrodes of the pixel structures. The second common electrode is disposed on the second substrate. The conductive particle is disposed on the first common pad, and is electrically connected to the first common pad and the second common electrode. The conductive particle includes a core and a conductive film disposed on a surface of the core, where the conductive film has a main portion and raised portions, and a film thickness of each of the raised portions is greater than a film thickness of the main portion.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: March 12, 2024
    Assignee: Au Optronics Corporation
    Inventors: Bo-Chen Chen, Yun-Ru Cheng, Ya-Ling Hsu, Chia-Hsuan Pai, Cheng-Wei Huang, Wei-Shan Chao
  • Patent number: 11930543
    Abstract: A method of radio bearer transmission in dual connectivity for a network in a long term evolution (LTE) system comprises generating at least a packet data convergence protocol protocol data unit (PDCP PDU) by a PDCP entity of the network corresponding to a radio bearer (RB), and assigning each PDCP PDU with an identity, wherein the identity indicates which PDCP entity the PDCP PDU belongs to.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: March 12, 2024
    Assignee: ACER INCORPORATED
    Inventors: Hung-Chen Chen, Ching-Wen Cheng
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Publication number: 20240078653
    Abstract: A visual inspection method of a curved object executed by a visual inspection system. The visual inspection system includes a robotic arm, a camera mounted at a tail end of the robotic arm, a fixing unit mounted under the camera, and a control unit electrically connected to the robotic arm and the camera. Specific steps of the visual inspection method of the curved object are described hereinafter. Fix a curved object which is to be inspected by the fixing unit. Capture the object which is to be inspected with a plurality of groups of preset parameters by the camera. Use the control unit to calculate a better shooting parameter. Use the better shooting parameter by the camera to proceed with visual inspections of the curved objects which are to be inspected in batches.
    Type: Application
    Filed: June 21, 2023
    Publication date: March 7, 2024
    Inventors: SHUN-CHIEN LAN, WEI-CHENG TSENG, CHEN-YI LIU, CHEN-TE CHEN
  • Publication number: 20240081157
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240079381
    Abstract: A chip package structure is provided. The chip package structure includes a chip structure. The chip package structure includes a first ground bump below the chip structure. The chip package structure includes a conductive shielding film disposed over the chip structure and extending onto the first ground bump. The conductive shielding film has a concave upper surface facing the first ground bump.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Inventors: Chen-Hua YU, An-Jhih SU, Jing-Cheng LIN, Po-Hao TSAI
  • Patent number: 11919954
    Abstract: Provided herein are antibodies, or antigen-binding portions thereof, that specifically bind and inhibit TREM-1 signaling, wherein the antibodies do not bind to one or more Fc?Rs and do not induce the myeloid cells to produce inflammatory cytokines. Also provided are uses of such antibodies, or antigen-binding portions thereof, in therapeutic applications, such as treatment of autoimmune diseases.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 5, 2024
    Assignee: BRISTOL-MYERS SQUIBB COMPANY
    Inventors: Achal Pashine, Michael L. Gosselin, Aaron P. Yamniuk, Derek A. Holmes, Guodong Chen, Priyanka Apurva Madia, Richard Yu-Cheng Huang, Stephen Michael Carl
  • Patent number: 11924534
    Abstract: This disclosure provides a lens assembly that has an optical path and includes a lens element and a light-blocking membrane layer. The lens element has an optical portion, and the optical path passes through the optical portion. The light-blocking membrane layer is coated on the lens element and adjacent to the optical portion. The light-blocking membrane layer has a distal side and a proximal side that is located closer to the optical portion than the distal side. The proximal side includes two extension structures and a recessed structure. Each of the extension structures extends along a direction away from the distal side, and the extension structures are not overlapped with each other in a direction in parallel with the optical path. The recessed structure is connected to the extension structures and recessed along a direction towards the distal side.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: March 5, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Jyun-Jia Cheng, Yu Chen Lai, Ming-Ta Chou, Cheng-Feng Lin, Chen-Yi Huang