Patents by Inventor An-Cheng Chou

An-Cheng Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210003446
    Abstract: A spectrometer is disclosed. The spectrometer includes a fiber input, a collimator lens, a rotating shaft, a grating, a focal lens and a focal plane which have arranged in order. A broadband incident light of the fiber input becomes a first parallel beam through the collimator lens and separated by the grating into multiple parallel beams of different wavelengths and then focused by the focal lens to emit an output beams to an imaging position on the focal plane. The spectrometer can rotate the collimator lens and fiber input to change the imaging position on the focal plane.
    Type: Application
    Filed: June 3, 2020
    Publication date: January 7, 2021
    Inventors: William WANG, Che-Liang TSAI, Chung-Cheng CHOU
  • Publication number: 20200410850
    Abstract: The present invention provides an information sharing system for a vehicle. The information sharing system includes at least one first Internet of Things (IoT) device, for gathering information about the vehicle or a driver of the vehicle; and a second IoT device, for sharing the information; wherein the information comprises at least one of traffic-related information of the vehicle and emotion-related information of the driver.
    Type: Application
    Filed: September 15, 2020
    Publication date: December 31, 2020
    Inventors: Chih-Hao Liu, Wei-Cheng Chou, Zong-En Yu
  • Patent number: 10878902
    Abstract: A memory device includes an array of resistive memory cells with a plurality of word lines connected to the array of resistive memory cells. A voltage compensation controller is configured to determine a word line voltage to be applied to a selected word line of the plurality of word lines. A word line driver is configured apply the determined word line voltage to the selected word line.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-An Lai, Chung-Cheng Chou, Yu-Der Chih
  • Publication number: 20200398813
    Abstract: A method of energy management includes steps of: deciding system parameters; determining an object function; obtaining characteristics information and predetermined ranges respectively of the system parameters; calculating function values of the object function for various parameter value combinations of the system parameters within the predetermined ranges based on the characteristics information so as to establish a database; determining a smallest function value among those of the function values in the database that satisfy certain conditions; and determining an optimum power split ratio based on the parameter value combination corresponding to the smallest function value for energy management of the vehicle.
    Type: Application
    Filed: February 26, 2020
    Publication date: December 24, 2020
    Applicant: National Taiwan Normal University
    Inventors: Yi-Hsuan HUNG, Syuan-Yi CHEN, Kai-Lin LEE, Po-Lin SHIH, Tzu-Cheng CHOU, Wei-Gang CHEN
  • Publication number: 20200395070
    Abstract: A memory architecture includes: a plurality of cell arrays each of which comprises a plurality of bit cells, wherein each of bit cells of the plurality of cell arrays uses a respective variable resistance dielectric layer to transition between first and second logic states; and a control logic circuit, coupled to the plurality of cell arrays, and configured to cause a first information bit to be written into respective bit cells of a pair of cell arrays as an original logic state of the first information bit and a logically complementary logic state of the first information bit, wherein the respective variable resistance dielectric layers are formed by using a same recipe of deposition equipment and have different diameters.
    Type: Application
    Filed: August 26, 2020
    Publication date: December 17, 2020
    Inventors: Yu-Der CHIH, Chung-Cheng CHOU, Wen-Ting CHU
  • Publication number: 20200388333
    Abstract: A memory device includes a memory cell and a sense amplifier. The sense amplifier has a reference circuit configured to output a reference voltage and a sensing circuit connected to the memory cell. A comparator includes a first input and a second input, with the first input connected to the reference circuit to receive the reference voltage, and the second input connected to the memory cell.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Inventors: Zheng-Jun Lin, Chung-Cheng Chou, Pei-Ling Tseng
  • Patent number: 10840134
    Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: November 17, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chih-Chien Chi, Chung-Chi Ko, Yao-Jen Chang, Chen-Yuan Kao, Kai-Shiang Kuo, Po-Cheng Shih, Tze-Liang Lee, Jun-yi Ruan
  • Publication number: 20200355956
    Abstract: A display panel including a first substrate, a second substrate, and a display medium layer, a pixel array structure, and a first spacer that are disposed between the first substrate and the second substrate is provided. The pixel array structure includes a first signal line, and has a first platform region located on the first signal line, a first display region and a first support region located between the first platform region and the first display region. A first platform top surface of the first platform region and the first substrate are spaced by a first distance. A support top surface of the first support region and the first substrate are spaced by a second distance. A display top surface of the first display region and the first substrate are spaced by a third distance. A terminal surface of the first spacer contacts the first platform top surface.
    Type: Application
    Filed: November 20, 2019
    Publication date: November 12, 2020
    Applicant: Au Optronics Corporation
    Inventors: Chi-Ho Chang, An-Cheng Chou, Yu-Chang Wen
  • Publication number: 20200350010
    Abstract: A device is disclosed. The device includes a first memory cell, a second memory cell, a first pair of a driver and a sinker, and a second pair of a driver and a sinker. The first memory cell is coupled between the first pair of the driver and the sinker through a first line and a second line. The second memory cell is coupled between the second pair of the driver and the sinker through a third line and a fourth line. The first pair of the driver and the sinker are configured to be controlled to have resistances depending on a row location of the first memory cell in a memory column.
    Type: Application
    Filed: July 18, 2020
    Publication date: November 5, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Chung-Cheng CHOU
  • Patent number: 10826997
    Abstract: Systems, methods, architectures, and computer program products for linking multiple devices are disclosed. In an example for linking a mobile device with a desktop device, an identifier of a mobile device can be received from a desktop computer. The identifier can be used to send a link to the mobile device. When the link is accessed, a code and a channel are generated. The mobile device is connected to the channel and the code is provided to the mobile device. The code is entered at the desktop device and the desktop device is connected to the channel responsive to the code being validated, thereby linking the desktop and mobile devices.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: November 3, 2020
    Assignee: VYNCA, INC.
    Inventors: Rush L. Bartlett, II, Kan-Yueh Chen, Ching-Cheng Chou, David Lin, Po-Min Lin, I-Chien Liu, Matthew S. Taylor, Ryan J. F. Van Wert, Frank Wang, Jack Yeh, Tsung-Wei Wang
  • Publication number: 20200341360
    Abstract: A wavelength conversion module and a projection device are provided. The wavelength conversion module includes a rotating member and a light sensing element. The rotating member includes a shaft and a positioning structure. An excitation beam forms a first spot on the rotating member. The shaft is located at the center of the rotating member. The positioning structure is located on the rotating member. The light sensing element is disposed adjacent to the rotating member for emitting a sensing beam toward a first surface of the rotating member, wherein the sensing beam forms a second spot on the rotating member. A first connecting line is formed by connecting the first spot and the shaft, a second connecting line is formed by connecting the second spot and the shaft, and an angle between the first connecting line and the second connecting line is greater than 30 degrees.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 29, 2020
    Applicant: Coretronic Corporation
    Inventor: Chih-Cheng Chou
  • Patent number: 10818558
    Abstract: A method for manufacturing a semiconductor structure is provided. A plurality of trenches are formed in a substrate. The trenches define at least one fin therebetween. The fin is hydrogen annealed. A dielectric material is formed in the trenches. The dielectric material in the trenches is recessed.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: October 27, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Cheng Chou, Shiu-Ko Jangjian, Cheng-Ta Wu
  • Publication number: 20200335449
    Abstract: A method for manufacturing an extra low-k (ELK) inter-metal dielectric (IMD) layer includes forming a first IMD layer including a plurality of dielectric material layers over a substrate. An adhesion layer is formed over the first IMD layer. An ELK dielectric layer is formed over the adhesion layer. A protection layer is formed over the ELK dielectric layer. A hard mask is formed over the protection layer and is patterned to create a window. Layers underneath the window are removed to create an opening. The removed layers include the protection layer, the ELK dielectric layer, the adhesion layer, and the first IMD layer. A metal layer is formed in the opening.
    Type: Application
    Filed: July 2, 2020
    Publication date: October 22, 2020
    Inventors: Po-Cheng SHIH, Chia Cheng CHOU, Li Chun TE
  • Patent number: 10806994
    Abstract: A trigger with user adjustable sensor position assembled to an outer shell, includes a pressing portion pivotally connected to the outer shell, a torsion spring elastically abutting between the pressing portion and the outer shell, a triggering portion assembled in the outer shell, and an adjusting assembly. When an elastic force of the torsion spring is released, the torsion spring elastically abuts against the pressing portion to define a position where the pressing portion is located to be an original position, a position where the pressing portion abuts against the triggering portion to trigger the triggering portion is defined as a triggering position. The pressing portion is capable of swinging between the original position and the triggering position. The adjusting assembly is assembled in the outer shell. When the adjusting assembly is in different adjusting positions, key travels between the pressing portion and the triggering portion are different.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: October 20, 2020
    Assignee: Cheng Uei Precision Industry Co., Ltd.
    Inventors: Hsieh Cheng Chou, Chi Ming Tseng
  • Patent number: 10796760
    Abstract: A method for writing to a memory is disclosed. The method includes generating a write current that flows to a memory cell of the memory, generating a mirror current that mirrors the write current, and inhibiting application of a write voltage to the memory cell of the memory based on the mirror current. A device that performs the method is also disclosed. A memory that includes the device is also disclosed.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventor: Chung-Cheng Chou
  • Publication number: 20200301470
    Abstract: An intelligent wearable apparatus may include a user interface, a main body incorporating the user interface, and a mounting element connecting with two ends of the main body. In one embodiment, the apparatus can be a bracelet on the wrist configured to measure the acceleration and infers velocity and position from an accelerometer therein. In another embodiment, the apparatus is configured to display different colors in different situations, or conduct color coding for different functions thereof. For example, two apparatus in the present invention can be synchronized in static or dynamic manner so that any observer could easily and conveniently identify the social relationship between the people who wear the apparatus.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 24, 2020
    Applicant: Innovart Design Inc.
    Inventors: Yong-Jun Lin, Wei-Cheng Chou
  • Patent number: 10784440
    Abstract: A semiconductor device includes a magnetic random access memory (MRAM). The MRAM comprises a plurality of MRAM cells including a first type MRAM cell and a second type MRAM cell. Each of the plurality of MRAM cells includes a magnetic tunneling junction (MTJ) layer including a pinned magnetic layer, a tunneling barrier layer and a free magnetic layer. A size of the MTJ film stack of the first type MRAM cell is different from a size of the MTJ film stack of the second type MRAM cell. In one or more of the foregoing and following embodiments, a width of the MTJ film stack of the first type MRAM cell is different from a width of the MTJ film stack of the second type MRAM cell.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: September 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huang-Wen Tseng, Cheng-Chou Wu, Che-Jui Chang
  • Patent number: 10780343
    Abstract: The present invention is a game controller, the game controller comprises a body, at least one socket, at least one fastening receptor, at least one actuating module, at least one fixed and at least one fastening member. The socket is formed in the body. The fastening receptor is formed in the body. The actuating module is removably mounted in the socket. The fixed frame is configured to receive the actuating module. The fixed frame comprises at least one first positioning hole. The actuating module is fixed in the socket by a combination of the fixed frame and the fastening member, wherein the fastening member passes the first positioning hole and fastens in the fastening receptor.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: September 22, 2020
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Hsieh Cheng Chou, Chi Ming Tseng
  • Patent number: 10762960
    Abstract: A memory architecture includes: a plurality of cell arrays each of which comprises a plurality of bit cells, wherein each of bit cells of the plurality of cell arrays uses a respective variable resistance dielectric layer to transition between first and second logic states; and a control logic circuit, coupled to the plurality of cell arrays, and configured to cause a first information bit to be written into respective bit cells of a pair of cell arrays as an original logic state of the first information bit and a logically complementary logic state of the first information bit, wherein the respective variable resistance dielectric layers are formed by using a same recipe of deposition equipment and have different diameters.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Der Chih, Chung-Cheng Chou, Wen-Ting Chu
  • Patent number: 10755780
    Abstract: A memory device includes a memory cell and a sense amplifier. The sense amplifier has a reference circuit configured to output a reference voltage and a sensing circuit connected to the memory cell. A comparator includes a first input and a second input, with the first input connected to the reference circuit to receive the reference voltage, and the second input connected to the memory cell. A precharger is configured to selectively precharge the sensing circuit to a predetermined precharge voltage.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, LTD.
    Inventors: Zheng-Jun Lin, Chung-Cheng Chou, Pei-Ling Tseng