Abstract: A node sled is for installation into an electronics chassis. The node sled includes a housing that contains electronic components. The housing includes a front bracket and a catch mechanism. The node sled further includes a lever having an engagement arm, an actuation arm, and a mounting portion. The mounting portion is pivotably mounted to the housing. The actuation arm is manually moveable between a first position in which the engagement arm locks the node sled into the electronics chassis, and a second position in which the engagement arm is released from the electronics chassis. The actuation arm has a latch that engages the catch mechanism in response to the actuation arm being in the first position.

Abstract: A clip for securing one or more cables in a cable aisle of a computing device comprises a housing portion and a sliding portion. The housing portion has a first sidewall and a second sidewall that are coupled via a base. A cable channel is defined between the first sidewall and the second sidewall. The cable channel is configured to accommodate the one or more cables. The sliding portion is coupled to the first sidewall of the housing portion. The sliding portion has a lifting member extending across the cable channel from the first sidewall to the second sidewall. The sliding portion is configured to be moveable between a lowered position and a raised position. The lifting member moves from a first end of the cable channel to a second end of the cable channel, when the sliding portion moves from the lowered position to the raised position.

Abstract: A node sled is for installation into an electronics chassis. The node sled includes a housing that contains electronic components. The housing includes a front bracket and a catch mechanism. The node sled further includes a lever having an engagement arm, an actuation arm, and a mounting portion. The mounting portion is pivotably mounted to the housing. The actuation arm is manually moveable between a first position in which the engagement arm locks the node sled into the electronics chassis, and a second position in which the engagement arm is released from the electronics chassis. The actuation arm has a latch that engages the catch mechanism in response to the actuation arm being in the first position.

Abstract: A semiconductor package includes a lower encapsulated semiconductor device, a lower redistribution structure, an upper encapsulated semiconductor device, and an upper redistribution structure. The lower redistribution structure is disposed over and electrically connected to the lower encapsulated semiconductor device. The upper encapsulated semiconductor device is disposed over the lower encapsulated semiconductor device and includes a sensor die having a pad and a sensing region, an upper encapsulating material at least laterally encapsulating the sensor die, and an upper conductive via extending through the upper encapsulating material and connected to the lower redistribution structure. The upper redistribution structure is disposed over the upper encapsulated semiconductor device. The upper redistribution structure covers the pad of the sensor die and has an opening located on the sensing region of the sensor die.

Abstract: A clip for securing one or more cables in a cable aisle of a computing device comprises a housing portion and a sliding portion. The housing portion has a first sidewall and a second sidewall that are coupled via a base. A cable channel is defined between the first sidewall and the second sidewall. The cable channel is configured to accommodate the one or more cables. The sliding portion is coupled to the first sidewall of the housing portion. The sliding portion has a lifting member extending across the cable channel from the first sidewall to the second sidewall. The sliding portion is configured to be moveable between a lowered position and a raised position. The lifting member moves from a first end of the cable channel to a second end of the cable channel, when the sliding portion moves from the lowered position to the raised position.

Abstract: A riser bracket for supporting a riser board and a computer card inserted into the riser board is disclosed. The riser bracket includes a first riser bracket piece, a first latch, a second riser bracket piece, and a second latch. The computer card and the riser board are positioned on a motherboard. The first riser bracket piece is configured to be coupled to the riser board. The first latch is configured to the first riser bracket piece to a first mounting point of the motherboard, and to move between a latched position and an unlatched position. The second riser bracket piece is coupled to the first riser bracket piece. The second latch is configured to couple the second riser bracket piece to a second mounting point of the motherboard, and move between a latched position and an unlatched position.

Abstract: A semiconductor package includes a first wafer, a second wafer, and an interconnect. The first wafer includes a first die, a first encapsulating material encapsulating the first die, and a first redistribution structure disposed over the first die and the first encapsulating material. The second wafer includes a second die, a second encapsulating material encapsulating the second die, and a second redistribution structure disposed over the second die and the second encapsulating material, wherein the second redistribution structure faces the first redistribution structure. The interconnect is disposed between the first wafer and the second wafer and electrically connecting the first redistribution structure and the second redistribution structure, wherein the interconnect includes a substrate and a plurality of through vias extending through the substrate for connecting the first redistribution structure and the second redistribution structure.

Abstract: An image processing circuit stores a training database and models in memory. The image processing circuit includes an attribute identification engine to identify an attribute from an input image according to a model stored in the memory. By enhancing the input image based on the identified attribute, a picture quality (PQ) engine in the image processing circuit generates an output image for display. The image processing circuit further includes a data collection module to generate a labeled image based on the input image labeled with the identified attribute, and to add the labeled image to the training database. A training engine in the image processing circuit then re-trains the model using the training database.

Abstract: A package structure including a semiconductor die, an insulating encapsulant, and a redistribution layer is provided. The semiconductor die includes a semiconductor substrate, a plurality of metallization layers disposed on the semiconductor substrate, and a passivation layer disposed on the plurality of metallization layers. The passivation layer has a first opening that partially expose a topmost layer of the plurality of metallization layers. The insulating encapsulant is encapsulating the semiconductor die. The redistribution layer includes at least a first dielectric layer and a first conductive layer stacked on the first dielectric layer. The first dielectric layer has a second opening that overlaps with the first opening, and a width ratio of the second opening to the first opening is in a range of 2.3:1 to 12:1. The first conductive layer is electrically connected to the topmost layer of the plurality of metallization layers through the first and second openings.

Abstract: A baseboard management controller (BMC) carrier module that contains a BMC carrier bracket and a thumb screw is disclosed. The BMC carrier bracket has a back plate, a top plate, a side plate, and a corner plate. The corner plate includes a first section and a second section. The second section of the corner plate extends perpendicularly from the first section of the corner plate. The BMC carrier bracket is configured to receive a BMC board between the first section of the corner plate and the side plate. The BMC board includes an aperture to receive a screw to secure the BMC board to the BMC carrier bracket, at a distance from the back plate. The thumb screw is coupled to the second section of the corner plate of the BMC carrier bracket, and is configured to bias a memory carrier module against the side plate.

Abstract: A video processing circuit includes an input buffer, an online adaptation circuit, and an artificial intelligence (AI) super-resolution (SR) circuit. The input buffer receives input low-resolution (LR) frames and high-resolution (HR) frames from a video source over a network. The online adaptation circuit forms training pairs, and calculates an update to representative features that characterize the input LR frames using the training pairs. Each training pair formed by one of the input LR frames and one of the HR frames. The AI SR circuit receives the input LR frames from the input buffer and the representative features from the online adaptation circuit. Concurrently with calculating the update to the representative features, the AI SR circuit generates SR frames for display from the input LR frames based on the representative features. Each SR frame has a higher resolution than a corresponding one of the input LR frames.

Abstract: An image processing apparatus includes a super-resolution (SR) circuit and a resizer circuit. The SR circuit performs an SR operation upon a first image to generate a second image, wherein a resolution of the second image is not lower than a resolution of the first image, and the SR operation is based, at least in part, on one or more artificial intelligence (AI) models. The resizer circuit performs a resize operation upon the second image to generate a third image, wherein a resolution of the third image is not lower than the resolution of the second image, and no AI model is involved in the resize operation.

Abstract: An image processing circuit performs super-resolution (SR) operations. The image processing circuit includes memory to store multiple parameter sets of multiple artificial intelligent (AI) models. The image processing circuit further includes an image guidance module, a parameter decision module, and an SR engine. The image guidance module operates to detect a representative feature in an image sequence including a current frame and past frames within a time window. The parameter decision module operates to adjust parameters of one or more AI models based on a measurement of the representative feature. The SR engine operates to process the current frame using the one or more AI models with the adjusted parameters to thereby generate a high-resolution image for display.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.

Abstract: A package structure including at least one semiconductor die and a redistribution structure is provided. The semiconductor die is laterally encapsulated by an encapsulant, and the redistribution structure is disposed on the semiconductor die and the encapsulant and electrically connected with the semiconductor die. The redistribution structure includes signal lines and a pair of repair lines. The signal lines include a pair of first signal lines located at a first level, and each first signal line of the pair of first signal lines has a break that split each first signal line into separate first and second fragments. The pair of repair lines is located above the pair of first signal lines and located right above the break. Opposite ending portions of each repair line are respectively connected with the first and second fragments with each repair line covering the break in each first signal line.

Abstract: A baseboard management controller (BMC) carrier module that contains a BMC carrier bracket and a thumb screw is disclosed. The BMC carrier bracket has a back plate, a top plate, a side plate, and a corner plate. The corner plate includes a first section and a second section. The second section of the corner plate extends perpendicularly from the first section of the corner plate. The BMC carrier bracket is configured to receive a BMC board between the first section of the corner plate and the side plate. The BMC board includes an aperture to receive a screw to secure the BMC board to the BMC carrier bracket, at a distance from the back plate. The thumb screw is coupled to the second section of the corner plate of the BMC carrier bracket, and is configured to bias a memory carrier module against the side plate.

Abstract: A lubricating tube includes an inner surrounding surface that has a non-circular cross-section, angularly spaced-apart inner lubricant-storing recesses, and guide surface portions each of which is interconnected between two adjacent ones of the inner lubricant-storing recesses. The inner lubricant-storing recesses and the guide surface portions constitute the inner surrounding surface and cooperatively define a roller passage hole. The inner lubricant-storing recesses are indented from the guide surface portions toward the outer surrounding surface. A slide rail device having the lubricating tube is also disclosed.

Abstract: A circulator structure includes a main body, a Y-like groove and two return channels. The main body has a first side surface, a second side surface and a through hole. The Y-like groove includes a first oil-guiding groove, a second oil-guiding groove and an oil distribution groove. The first oil-guiding groove and the second oil-guiding groove are located at two opposite sides of the through hole, and the oil distribution groove is located below the through hole. A lower guiding end of the first oil-guiding groove and a lower guiding end of the second oil-guiding groove are respectively connected to the oil distribution groove. The oil distribution groove has an upper end distribution opening connected to the through hole and a lower end distribution opening. The return channels are respectively located on two opposite sides of the first side surface and are connected to the lower end distribution opening.