Patents by Inventor An-Chi Yeh

An-Chi Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11251124
    Abstract: An integrated circuit (IC) structure includes a power rail oriented in a power rail direction and first metal segments above the power rail, oriented in a first metal level direction perpendicular to the power rail direction. First vias positioned between the power rail and the first metal segments are positioned at locations where first metal segments overlap the power rail. A second metal segment is positioned above the first metal segments, overlaps the power rail, and is oriented in the power rail direction. Second vias are positioned above the first vias between the first metal segments and the second metal segments, and a power strap is positioned above the second metal segment. The power strap is electrically connected to the power rail, each first metal segment of the plurality of first metal segments has a minimum width, and the power strap has a width greater than a minimum width.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: February 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hiranmay Biswas, Chi-Yeh Yu, Chung-Hsing Wang, Kuo-Nan Yang, Stefan Rusu, Chin-Shen Lin
  • Publication number: 20210366844
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a plurality of gate structures arranged over a substrate and between adjacent ones of a plurality of source/drain regions within the substrate. A plurality of conductive contacts are electrically coupled to the plurality of source/drain regions. A first interconnect wire is arranged over the plurality of conductive contacts, and a second interconnect wire arranged over the first interconnect wire. A via rail contacts the first interconnect wire and the second interconnect wire. The via rail has an outer sidewall that faces an outermost edge of the plurality of source/drain regions and that is laterally separated from the outermost edge of the plurality of source/drain regions by a non-zero distance. The outer sidewall of the via rail continuously extends past two or more of the plurality of gate structures.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Kam-Tou Sio, Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng, Ru-Gun Liu, Wen-Hao Chen
  • Publication number: 20210352377
    Abstract: The present invention provides a control method applied to an electronic device is disclosed, wherein the electronic device includes a processor and a wireless network module, and the control method includes the steps of: generating a determination result by determining if the wireless network module needs to transmit a packet; and when the determination result indicates that the wireless network module needs to transmit the packet, reducing a frequency of a clock signal used by the processor during a packet transmission.
    Type: Application
    Filed: March 3, 2021
    Publication date: November 11, 2021
    Inventors: Zhen-Rong Chen, Cheng-Yu Lee, Chia-Chi Yeh, Ming-Tsung Tsai
  • Publication number: 20210298405
    Abstract: A hat includes a main part which includes a visor, a peripheral portion and multiple panels formed thereto. The panels extend from the peripheral portion. A protrusion protrudes from the visor and contacts the outside of the peripheral portion. Multiple first holes are respectively defined through each of two lateral sides of each panel, the bottom side of the peripheral portion and the inner side of the visor. Multiple ropes extend through the first holes to connect the panels, the peripheral portion and the visor to form the hat.
    Type: Application
    Filed: July 27, 2020
    Publication date: September 30, 2021
    Inventors: Ching-Hsiu Yeh, Hsing-Chi Yeh
  • Patent number: 11090893
    Abstract: A method of reclaiming a used seal includes boiling the used seal in a liquid, and after boiling the used seal in the liquid, baking the used seal. The boiling the used seal may include boiling for a predetermined boiling time in the liquid, and the baking the used seal may include baking the used seal for a predetermined bake time at a predetermined temperature.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: August 17, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Shagun P. Maheshwari, Yao-Hung Yang, Tom K. Cho, Yu-Chi Yeh, Andrew Yu, Aniruddha Pal, Siamak Salimian
  • Patent number: 11088092
    Abstract: The present disclosure relates to a method of forming an integrated chip. The method may be performed by forming first and second source regions within a substrate. The first and second source regions are separated by a drain region along a first direction. First and second middle-end-of-the-line (MEOL) structures are formed over the substrate. The first and second MEOL structures have bottom surfaces that continually extend past edges of the first and second source regions, respectively, along a second direction perpendicular to the first direction. A power rail is formed that is electrically coupled to the first and second MEOL structures. The power rail has a first interconnect wire, a via rail on and in contact with the first interconnect wire, and a second interconnect wire on and in contact with the via rail. The via rail continuously extends along the first direction past the first and second MEOL structures.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 10, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kam-Tou Sio, Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng, Ru-Gun Liu, Wen-Hao Chen
  • Publication number: 20210220281
    Abstract: Described herein arc pharmaceutical compositions for the oral administration of mesalazine, as well as methods of making such pharmaceutical compositions, and therapeutic methods for using them. The compositions comprise delayed-immediate release and delayed-extended release formulation of mesalazine.
    Type: Application
    Filed: December 23, 2020
    Publication date: July 22, 2021
    Applicant: FERRING B.V.
    Inventors: Alfred Chi Yeh LIANG, Venkataramana DINGARI
  • Patent number: 11063005
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first conductive interconnect wire extending in a first direction over a substrate. A second conductive interconnect wire is arranged over the first conductive interconnect wire. A via rail is configured to electrically couple the first conductive interconnect wire and the second conductive interconnect wire. The first conductive interconnect wire and the second conductive interconnect wire extend as continuous structures past one or more sides of the via rail.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: July 13, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kam-Tou Sio, Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng, Ru-Gun Liu, Wen-Hao Chen
  • Publication number: 20210077415
    Abstract: Described herein are oral liquid pharmaceutical compositions for the oral administration of an aminosalicylate, as well as methods of making such oral liquid pharmaceutical compositions, and therapeutic methods for using them. The oral liquid pharmaceutical compositions comprise extended-release microparticles formulated with an aminosalicylate, wherein the extended-release microparticles are provided with an outer delayed release coating.
    Type: Application
    Filed: January 2, 2019
    Publication date: March 18, 2021
    Applicant: FERRING B.V.
    Inventors: Alfred Chi-Yeh Liang, Eric EHRNSPERGER, Xiaohong SHEN
  • Publication number: 20210074219
    Abstract: A driving circuit of a display panel comprises a scanning driving circuit, a data driving circuit, and a control circuit. The scanning driving circuit is coupled to a plurality of scanning lines of the display panel, and scans the scanning lines. The data driving circuit is coupled to a plurality of data lines of the display panel and provides at least one data signal corresponding to each scanning line to at least one data line of the data lines for driving at least one pixel of the display panel. The control circuit is coupled to the scanning driving circuit and the data driving circuit, controls the scanning driving circuit and the data driving circuit, and determines a scanning order of the scanning driving circuit to scan the scanning lines according to a driving number of the pixels to be driven by the data driving circuit corresponding to each scanning line.
    Type: Application
    Filed: March 19, 2020
    Publication date: March 11, 2021
    Inventors: Chih-Te Hung, I-Chen Lin, Chun-Chi Yeh, Chia-Hung Chien
  • Publication number: 20210042461
    Abstract: Methods for inserting dummy boundary cells in an integrated circuit (IC) are provided. A plurality of macros and a top channel are merged into floorplan of the IC. The top channel is arranged between the macros and is filled with a plurality of first dummy boundary cells, and each of the macros includes a macro boundary and a main pattern surrounded by the macro boundary. The first dummy boundary cells within the top channel and between a first macro and a second macro are replaced with a plurality of second dummy boundary cells. The macro boundaries of the first and second macros are formed by the second dummy boundary cells. First gate length of dummy patterns within the first dummy boundary cells is greater than second gate length of dummy patterns within the second dummy boundary cells. The first and second dummy boundary cells are the same size.
    Type: Application
    Filed: May 28, 2020
    Publication date: February 11, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Yi HU, Chih-Ming CHAO, Chi-Yeh YU
  • Publication number: 20210007320
    Abstract: An intelligent defecation device for living creature includes a device body, a supporting portion, an image module, and a first analysis module. The supporting portion is formed within the inner side of the device body for accommodating a moisture absorption member so as to allow the living creature to leave over its excrement therein. The image module is also arranged at the device body for dynamically capturing the images of the excrement in the supporting portion and outputting the image. The first analysis module is arranged in the device body and connected with the image module to analyze and calculate the defecation mode with the image based on preset or accumulated data, so as to generate a signal when an abnormal defecation mode is diagnosed.
    Type: Application
    Filed: June 11, 2020
    Publication date: January 14, 2021
    Inventors: James Cheng-Han Wu, Pei-Hsuan Shih, Chun-Ming Su, You-Gang Kuo, Ning-Yuan Lyu, Chi-Yeh Hsu, Liang-Hao Huang
  • Patent number: 10874617
    Abstract: Described herein are pharmaceutical compositions for the oral administration of mesalazine, as well as methods of making such pharmaceutical compositions, and therapeutic methods for using them. The compositions comprise delayed-immediate release and delayed-extended release formulation of mesalazine.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: December 29, 2020
    Assignee: FERRING B.V.
    Inventors: Alfred Chi Yeh Liang, Venkataramana Dingari
  • Patent number: 10861790
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a source region and a drain region separated by a channel region within a substrate. A middle-end-of-the-line (MEOL) structure is over the drain region and a gate structure is over the channel region. The MEOL structure is vertically disposed between the drain region and a plane extending along an upper surface of the gate structure. A first interconnect wire is connected to the MEOL structure by a first conductive contact that is directly over the drain region and that extends between the first interconnect wire and the MEOL structure. A conductive strap is located over the first interconnect wire. The conductive strap connects the first interconnect wire to a power rail having a larger width than the first interconnect wire.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng, Kam-Tou Sio, Pin-Dai Sue, Ru-Gun Liu, Shih-Wei Peng, Wen-Hao Chen, Yung-Sung Yen, Chun-Kuang Chen
  • Patent number: 10826255
    Abstract: A receptacle connector assembly includes an outer housing and a terminal module. The terminals module includes an insulator having a base and a mating tongue extending from the base and equipped with a plurality of contacts. The contacts include front contacting sections exposed upon the mating tongue and tail sections extending out of the base. The outer housing is of an insulative molding part or a metallic die cast, the terminal module is assembled in the outer housing, and thus a mating cavity is directly defined between the mating tongue and the outer housing.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: November 3, 2020
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Terrance F Little, Chih-Pi Cheng, Wei-Hao Su, Cheng-Chi Yeh, Yuan Zhang, Stephen Sedio, Hendrikus P. G. Van der Steen
  • Patent number: 10748848
    Abstract: An electronic device includes a substrate, first signal lines, pixel structures, first pads, transmission pads, a first combination circuit board, and a transmission circuit board. The first pads are electrically connected to some of a plurality of first signal lines. The transmission pads are electrically connected to some of the first signal lines. The first combination circuit board is disposed between a first side and a second side of the substrate opposite to each other. The transmission circuit board is disposed between the first combination circuit board and the second side of the substrate. The first combination circuit board is electrically connected to at least some of the first pads, and a first pitch exists between the adjacent first pads. The transmission pads are electrically connected to the transmission circuit board, and a transmission-pad pitch exists between the adjacent transmission pads. The transmission-pad pitch is greater than the first pitch.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 18, 2020
    Assignee: Au Optronics Corporation
    Inventors: Chih-Hao Wang, Po-Fu Huang, Shang-Lin Chiang, Tsai-Chi Yeh, Chih-Hung Chen
  • Publication number: 20200201063
    Abstract: A light redirecting film and a method for manufacturing the same are provided. The light redirecting film comprises a substrate, a first diffraction grating layer of a first curable resin on the substrate and a second diffraction grating layer of a second curable resin on the first diffraction grating layer. Wherein the grating directions of the first diffraction grating layer and the second diffraction grating layer cross each other at an angle of 90±10°, and the difference of the refractive index of the first curable resin and the second curable resin is no less than 0.1 and no more than 0.3.
    Type: Application
    Filed: March 1, 2020
    Publication date: June 25, 2020
    Inventors: Chen-Kuan Kuo, Cyun-Tai Hong, Chuen-Nan Shen, Chung-Hung Chien, Hung-Jiun Shieh, Tsung-Chi Yeh, Fung-Hsu Wu
  • Publication number: 20200155461
    Abstract: Described herein are pharmaceutical compositions for the oral administration of nicotinamide, or a combination of nicotinamide and mesalazine, as well as methods of making such pharmaceutical compositions, and therapeutic methods for using them. The compositions comprise delayed-immediate release and delayed-extended release formulation of nicotinamide or a combination of nicotinamide and mesalazine.
    Type: Application
    Filed: April 18, 2017
    Publication date: May 21, 2020
    Applicant: CONARIS RESEARCH INSTITUTE AG
    Inventors: Alfred Chi Yeh LIANG, Venkataramana DINGARI
  • Patent number: 10642057
    Abstract: A light redirecting film and a method for manufacturing the same are provided. The light redirecting film comprises a substrate, a first diffraction grating layer of a first curable resin on the substrate and a second diffraction grating layer of a second curable resin on the first diffraction grating layer. Wherein the grating directions of the first diffraction grating layer and the second diffraction grating layer cross each other at an angle of 90±10°, and the difference of the refractive index of the first curable resin and the second curable resin is no less than 0.1 and no more than 0.3.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: May 5, 2020
    Assignee: BenQ Materials Corporation
    Inventors: Chen-Kuan Kuo, Cyun-Tai Hong, Chuen-Nan Shen, Chung-Hung Chien, Hung-Jiun Shieh, Tsung-Chi Yeh, Fung-Hsu Wu
  • Patent number: D933735
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: October 19, 2021
    Assignee: AVer Information Inc.
    Inventors: Hong-Chi Yeh, Chih-Chung Su