Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit comprises a first input circuit and a first output circuit; the second sub-circuit comprises a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.

Abstract: Selective training of neural networks using motion estimation, including: selecting, from a plurality of pixels in video data from a vehicle, based on motion relative to the vehicle, one or more pixels; and training a neural network based on the video data by zeroing out an error function applied to the selected one or more pixels.

Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.

Abstract: A manufacturing method of a semiconductor device, comprises the following steps: providing a semiconductor substrate; forming a dummy insulation layer and a dummy electrode sequentially stacked on the semiconductor substrate; forming spacers on sidewalls of the dummy electrode; removing the dummy electrode to exposes inner sidewalls of the spacers; and performing an ion implantation process to the inner sidewalls of the spacers and the dummy insulation layer.

Abstract: A display device having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. The first active layer is a different material than the second active layer, and a hydrogen concentration of the second gate insulator is less than a hydrogen concentration of the first gate insulator.

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a memory array is formed by manufacturing portions of a word line during different and separate processes, thereby allowing the portions formed first to act as a structural support during later processes that would otherwise cause undesired damage to the structures.

Abstract: The present disclosure provides a phase shifter and an antenna, and relates to the field of communication technology. The phase shifter provided by the embodiment of the present disclosure is divided into a first feeding region, a second feeding region and a phase-shift region. The phase shifter includes: a first substrate and a second substrate provided opposite to each other, a dielectric layer provided between the first substrate and the second substrate, and a first feeding structure and a second feeding structure. The first feeding structure is electrically coupled to one end of the signal line, and the second feeding structure is electrically coupled to the other end of the signal line. The first feeding structure is located in the first feeding region; and the second feeding structure is located in the second feeding region. Recesses are formed in the first base substrate and/or in the second base substrate.

Abstract: A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.

Abstract: The present disclosure discloses a sintered neodymium-iron-boron magnet and a preparation method thereof. The sintered neodymium-iron-boron magnet includes the following raw materials in mass percentage: 1%-40% of an iron powder or a steel powder with a magnetic induction intensity of more than 1.2 T, not more than 10% of a praseodymium-neodymium metal hydride powder, and a remainder of a neodymium-iron-boron fine powder, wherein the mass percentages of the above raw materials add up to 100%. The preparation method includes: weighing the raw materials in mass percentage; mixing the weighed raw materials uniformly, and then subjecting to magnetic-field press molding, isostatic pressing, sintering and tempering to obtain the sintered neodymium-iron-boron magnet.

Abstract: A lower plastic assembly, an energy storage apparatus, and an electric device are provided in the disclosure. The lower plastic assembly includes a first lower plastic member. The first lower plastic member includes a first-lower-plastic-member body. The first-lower-plastic-member body further has a first upper surface and a first lower surface. The first upper surface is opposite to the first lower surface. The first-lower-plastic-member body defines a first liquid-injection through-hole. The first liquid-injection through-hole extends through the first-lower-plastic-member body and is located at one end of the first-lower-plastic-member body. A cutout is defined at one side of the first liquid-injection through-hole and is in direct communication with the first liquid-injection through-hole, and the cutout extends through the first upper surface and the first lower surface.

Abstract: A device for controlling a motor is provided. A type of a power component in a first drive circuit of the device is different from a type of a power component in a second drive circuit of the device. A loss of the power component in the first drive circuit is greater than a loss of the power component in the second drive circuit. When determining that a load of the motor is less than a preset load, a controller of the device controls the first drive circuit to stop working and controls the second drive circuit to start to work. When determining that the load of the motor is greater than or equal to the preset load, the controller controls both the first drive circuit and the second drive circuit to start to work.

Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure is formed over a substrate. The sacrificial gate structure includes a sacrificial gate electrode. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed while a lower portion of the sacrificial gate structure is embedded in the first dielectric layer. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The sacrificial gate electrode is removed.

Abstract: For example, an Extremely High Throughput (EHT) wireless communication station (STA) may be configured to set a Resource Unit (RU) allocation subfield in an EHT Signal (SIG) field to indicate an RU assignment for an Orthogonal Frequency Division Multiple Access (OFDMA) EHT Physical layer (PHY) Protocol Data Unit (PPDU) according to a predefined RU allocation table, the RU assignment for the OFDMA EHT PPDU comprising a Multiple Resource Unit (MRU) comprising a plurality of RUs; and transmit the OFDMA EHT PPDU comprising the EHT SIG field.

Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, the image sensor comprises a boundary deep trench isolation (BDTI) structure disposed at boundary regions of a pixel region surrounding a photodiode. The BDTI structure has a ring shape from a top view and two columns surrounding the photodiode with the first depth from a cross-sectional view. A multiple deep trench isolation (MDTI) structure is disposed at inner regions of the pixel region overlying the photodiode, the MDTI structure extending from the back-side of the substrate to a second depth within the substrate smaller than the first depth. The MDTI structure has three columns with the second depth between the two columns of the BDTI structure from the cross-sectional view. The MDTI structure is a continuous integral unit having a ring shape.

Abstract: The present invention provides four-particle electrophoretic displays with improved driving methods to achieve better color separation between adjacent pixel electrodes. The driving methods improve the color state performance when a first pixel is displaying a mixed state of a first highly-charged particle and a second lower-charged particle of the opposite polarity, while a neighboring pixel is displaying a state of a second highly-charged particle having the opposite polarity to the first highly-charged particle. The particles can be, for example, all reflective or one type of particle can be partially light transmissive.

Abstract: Various methods and devices for positioning autonomous agents including verifying a reported agent location using physical attributes of the received signal; improving agent formation for iterative localization; selecting agents for distributed task sharing; intelligent beacon-placement for group localization; relative heading and orientation determination utilizing time of flight; and secure Instrument Landing System (ILS) implementation for unmanned agents.

Abstract: A memory array device includes a stack of transistors over a semiconductor substrate, a first transistor of the stack being disposed over a second transistor of the stack. The first transistor includes a first memory film along a first word line and a first channel region along a source line and a bit line, the first memory film being disposed between the first channel region and the first word line. The second transistor includes a second memory film along a second word line and a second channel region along the source line and the bit line, the second memory film being disposed between the second channel region and the second word line. The memory array device includes a first via electrically connected to the first word line and a second via electrically connected to the second word line, the second staircase via and the first staircase via having different widths.

Abstract: The invention provides a method and system for a blast-induced vibration monitoring of a tunnel in high asymmetric in-situ stresses. According to the method, triaxial vibration sensors are respectively fixed in areas having different radial depths inside surrounding rocks of a stress concentration area behind a tunnel face of the tunnel in high asymmetric in-situ stresses, and each triaxial vibration sensor monitors blast vibration velocity and acceleration at a position thereof. The system comprises a plurality of triaxial vibration sensors which are fixed in areas having different radial depths inside surrounding rocks of a stress concentration area behind a tunnel face of the tunnel in high asymmetric in-situ stresses, and each triaxial vibration sensor is used for monitoring blast vibration velocity and acceleration at a position thereof. The method and system can improve the safety and the efficiency of tunnel excavation construction.

Abstract: Embodiments of this application relate to a data processing method and a terminal. The method includes: obtaining a first network wakeup parameter, where the first network wakeup parameter is used to wake up an application program; performing reconfiguration processing on the first network wakeup parameter based on a preset first configuration condition to obtain a second network wakeup parameter; and configuring a driver of the terminal based on the second network wakeup parameter. The second network wakeup parameter is written into Wi-Fi firmware, so that the Wi-Fi firmware directly performs processing without waking up the application program when the first network wakeup parameter is received next time. Therefore, power consumption of the terminal is reduced, and a standby time of the terminal is prolonged.