Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.

Abstract: A method of fabricating an integrated circuit includes placing a first set of conductive feature patterns on a first level, placing a second set of conductive feature patterns on a second level, placing a first set of via patterns between the second set of conductive feature patterns and the first set of conductive feature patterns, placing a third set of conductive feature patterns on a third level different from the first level and the second level, placing a second set of via patterns between the third set of conductive feature patterns and the second set of conductive feature patterns, and manufacturing the integrated circuit based on at least one of the above patterns of the integrated circuit.

Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.

Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.

Abstract: Systems, devices, and methods are provided for creating bone tunnels. In particular, described herein are embodiments of bone tunneling devices configured to create curvilinear tunnels in bone, as well as methods and devices relating thereto.

Abstract: Disclosed is a substrate displacing assembly so as to improve its durability during a semiconductor processing. In one embodiment, a semiconductor manufacturing system, includes, a substrate holder, wherein the substrate holder is configured with a plurality of pins; and a substrate displacing assembly for displacing a substrate on the substrate holder in a first direction perpendicular to the top surface of the substrate holder through the plurality of pins, wherein the substrate displacing assembly comprises a pair of load forks, a coupler and a driving shaft, wherein the pair of load forks comprises a fork region and a base region, wherein the coupler is mechanically coupled to the base region through at least one first joining screw extending in the first direction, wherein the coupler is further mechanically coupled to the driving shaft through a second joining screw extending in the first direction.

Abstract: A cholesterol liquid crystal display device integrated with solar modules includes a first transparent substrate, a second transparent substrate, a first cholesterol liquid crystal module and a solar module. The first cholesterol liquid crystal module is arranged between the first transparent substrate and the second transparent substrate. The solar module is arranged between the first transparent substrate and the first cholesterol liquid crystal module. Therefore, the cholesterol liquid crystal display device of the present invention does not need a backlight module. By combining the light transmission characteristics of the cholesterol liquid crystal display device with the coating process characteristics of the solar module, the cholesterol liquid crystal display device with energy conservation and environmental protection is formed.

Abstract: A terahertz wave detection chip includes a substrate and at least one detection structure. The detection structure is disposed on a surface of the substrate. The detection structure includes a metamaterial layer and a hydrophilic layer, and the hydrophilic layer is disposed on the metamaterial layer.

Abstract: A power consumption reduction method can include defining y operation scenarios according to x types of extracted information, generating z power profiles each used for controlling power provided to a subset of a plurality of processors, assigning the z power profiles to the y operation scenarios in a machine learning model, collecting to-be-evaluated information by the plurality of processors, comparing the to-be-evaluated information with the x types of extracted information to find a most similar type of extracted information, using the machine learning model to select an optimal power profile from the z power profiles according to the most similar type of extracted information, and applying the optimal power profile to control the power provided to the subset of the plurality of processors. The subset of the plurality of processors are of the same type of processor. x, y and z can be an integer larger than zero.

Abstract: A coupling clamp is provided that includes a top clamp and a bottom clamp. The top clamp may include a top vertical flange and a top lateral flange. The bottom clamp may include a bottom vertical flange and one or more bottom lateral flanges that extend laterally in opposite directions. At least one of the bottom lateral flanges may include a first portion having a surface configured to engage with a solar module and a second portion connected to the bottom vertical flange at an intersection below the surface of the first portion. The coupling clamp may be installed onto one or more solar modules that are positioned onto a rail that has an installed rail clamp. Another solar module may be positioned on the coupling clamp and rail and then slid under the rail clamp, which may be tightened to secure the other solar module to the rail.

Abstract: The disclosure relates to a quantum dot structure. The quantum dot structure includes a quantum dot and a cloud-like shell covering a portion of the quantum dot and having an irregular outer surface. The quantum dot includes: a core; a first shell discontinuously around a core surface of the core; and a second shell between the core and the first shell and encapsulating the core surface of the core, wherein the second shell has an irregular outer surface.

Abstract: A soft-switching power converter includes a main switch, an energy-releasing switch, and an inductive coupled unit. The main switch is a controllable switch. The energy-releasing switch is coupled to the main switch. The inductive coupled unit is coupled to the main switch and the energy-releasing switch. The inductive coupled unit includes a first inductance, a second inductance coupled to the first inductance, and an auxiliary switch unit. The auxiliary switch unit is coupled to the second inductance to form a closed loop. The main switch and the energy-releasing switch are alternately turned on and turned off. The auxiliary switch unit is controlled to start turning on before the main switch is turned on so as to provide at least one current path.

Abstract: In a method of manufacturing a semiconductor device, a first-conductivity type implantation region is formed in a semiconductor substrate, and a carbon implantation region is formed at a side boundary region of the first-conductivity type implantation region.

Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.

Abstract: A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.

Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.

Abstract: A magnetic suspension device is provided, including: a base, including at least two first magnetic action units arranged in interval and corresponding to each other; and a suspension member, including at least two second magnetic action units, the at least two second magnetic action units magnetically interact with the at least two first magnetic action units so that the suspension member is suspended between the at least two first magnetic units.

Abstract: A bicycle pedal includes a shaft seat, a shaft, a first pedal element and a second pedal element. The shaft seat has a shaft hole, a first threaded hole and a second threaded hole. The first threaded hole and the second threaded hole are separately located at symmetrical positions on two sides of an axis line of the shaft hole. The shaft is rotatably disposed in the shaft hole of the shaft seat. An end of the shaft has a thread for connecting with a crank. The first pedal element and the second pedal element are fixed to the first threaded hole and the second threaded hole by a first bolt and a second bolt, respectively. The first pedal element and the second pedal element are separately disposed at symmetrical positions on two sides of the shaft.

Abstract: Apparatus and methods are provided for TxRU carrier switch. In one embodiment, the UE is configured with an anchor carrier in an anchor cell and one or more secondary carriers. In one embodiment, the TxRU carrier switch is configured as supplementary uplink (SUL)-based carrier switch with supplementary carriers or configured as a CA-based carrier switch with supplementary cells. In one embodiment, the one or more secondary carriers are supplementary carriers of the anchor cell, and wherein the anchor carrier is TDD carrier or frequency division duplex (FDD) carrier, and wherein the supplementary carrier is configured as a TDD carrier, a FDD carrier, a supplementary uplink carrier (SUL), or a supplementary downlink carrier (SDL). In another embodiment, the one or more secondary carriers are supplementary cells different from the anchor cell, and wherein the supplementary cells are configured with MAC control element (CE).

Abstract: A pixel array includes a plurality of dark pixel sensors configured to generate dark current calibration information for a plurality of visible light pixel sensors included in the pixel array. The plurality of dark pixel sensors may generate respective dark current measurements for each of the plurality of visible light pixel sensors or for small subsets of the plurality of visible light pixel sensors. In this way, each of the plurality of visible light pixel sensors may be individually calibrated (or small subsets of the plurality of visible light pixel sensors may be individually calibrated) based on an estimated dark current experienced by each of the plurality of visible light pixel sensors. This may enable more accurate dark current calibration of the visible light pixel sensors included in the pixel array, and may be used to account for large differences in estimated dark currents for the visible light pixel sensors.