Abstract: A device includes first and second gate structures respectively extending across the first and second fins, and a gate isolation plug between a longitudinal end of the first gate structure and a longitudinal end of the second gate structure. The gate isolation plug comprises a first dielectric layer and a second dielectric layer over the first dielectric layer. The first dielectric layer has an upper portion and a lower portion below the upper portion. The upper portion has a thickness smaller than a thickness of the lower portion of the first dielectric layer.

Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.

Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.

Abstract: A light emitting device and a light source module are provided. The light emitting device includes a base, a conductive unit, a light unit, and a package. The base includes a first substrate and n through holes, and the through holes pass through the first substrate. The conductive unit includes m conductors that are separate from each other, and the conductors pass through the first substrate. The light unit is electrically connected to the conductors. The package includes a first package body surrounding the light unit and a second package body covering the light unit and the first package body. The first package body and the second package body have different optical properties. Furthermore, m and n are integers greater than or equal to 2, and m is greater than or equal to n.

Abstract: A substrate structure is provided, in which an insulating protection layer is formed on a substrate body having a plurality of electrical contact pads, and the insulating protection layer has a plurality of openings corresponding to the plurality of exposed electrical contact pads, and the insulating protection layer is formed with a hollow portion surrounding a partial edge of at least one of the electrical contact pads at at least one of the openings, so as to reduce the barrier of the insulating protection layer.

Abstract: Provided is a dual deposition chamber apparatus for producing silicon material, the apparatus including a furnace, a cooling jacket, a deposition device, and a vacuum extraction device. The cooling jacket communicates with the furnace, defines a space above the furnace, and includes an opening communicating with the space. The deposition device includes at least one first deposition substrate and at least one second deposition substrate. The at least one first deposition substrate and the at least one second deposition substrate are arranged side by side in the space, and respectively include a first inner wall surface and a second inner wall surface inclined downwards relative to a vertical axis. An uneven area is formed on the first inner wall surface and the second inner wall surface. The vacuum extraction device communicates with the opening of the cooling jacket.

Abstract: The present disclosure is directed to methods for the fabrication of buried layers in gate-all-around (GAA) transistor structures to suppress junction leakage. In some embodiments, the method includes forming a doped epitaxial layer on a substrate, forming a stack of alternating first and second nano-sheet layers on the epitaxial layer, and patterning the stack and the epitaxial layer to form a fin structure. The method includes forming a sacrificial gate structure on the fin structure, removing portions of the fin structure not covered by the sacrificial gate structure, and etching portions of the first nano-sheet layers. Additionally, the method includes forming spacer structures on the etched portions of the first nano-sheet layers and forming source/drain (S/D) epitaxial structures on the epitaxial layer abutting the second nano-sheet layers.

Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.

Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.

Abstract: Various solutions for extended reality (XR) enhancement in mobile communications are described. An apparatus establishes a communication with a network node of a wireless network. The apparatus performs an operation with respect to XR-related computation offloading from a user end to result in XR enhancement at the user end.

Abstract: The various embodiments described herein include methods, devices, and systems for reading and writing data from a database table. In one aspect, a method includes: (1) initiating a read transaction to read from a first non-key column of a row in the database table, the database table having a plurality of rows, each row comprising a primary key and a plurality of non-key columns, the initiating including: (a) determining that a write transaction holds a lock on a second non-key column of the row in the database table, and (b) determining that no lock is held on the first non-key column; and (2) in response, concurrently reading data from the first non-key column and writing a new column value to the second non-key column; where each non-key column includes a last-write timestamp that indicates when the last write occurred for the respective non-key column.

Abstract: A method in a distributed unit (DU) of a distributed base station for managing early data transmission includes receiving (2402), from a user equipment (UE) when the UE operates in an inactive state associated with a protocol for controlling radio resources, (i) data and (ii) a message formatted in accordance with the protocol. The method further includes transmitting (2404), to a central unit (CU) of the distributed base station, the message via a control plane interface, and transmitting (2406) the data to the CU.

Abstract: A semiconductor device and a method for manufacturing an interconnecting metal layer thereof are provided. The semiconductor device includes a gate layer, a dielectric layer, an insulating layer, an epitaxial layer, and a sidewall liner. The dielectric layer is disposed on one side of the gate layer, the insulating layer is disposed on another side of the gate layer, the epitaxial layer is located on the insulating layer, and the sidewall liner penetrates the dielectric layer and the gate layer, and one end of the sidewall liner is connected to the epitaxial layer. The sidewall liner is converted from a high-k material to a low-k material by hydrogen and oxygen plasma treatments.

Abstract: A propagating signal is propagated through a propagating medium to a plurality of receivers coupled to the propagating medium. A signal affected by a disturbance of the propagating medium is received. The received signal includes a signal portion that corresponds to the propagating signal that has been disturbed by the disturbance. At least a portion of a version of the signal portion of the received signal that corresponds to the propagating signal that has been disturbed by the disturbance is compared with one or more reference signal signatures of one or more disturbance types. Based at least in part on the comparison, it is determined that one of the one or more disturbance types corresponds to the disturbance of propagating medium.

Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.

Abstract: A transistor structure includes a substrate, a source electrode, a drain electrode, a protective layer and a gate electrode. The source electrode and the drain electrode are provided on the substrate. The protective layer is provided on the substrate. The protective layer is provided between the source electrode and the drain electrode. The protective layer includes a SiNx layer and a SiOx layer. The SiOx layer is provided on the substrate, the SiNx layer is provided on the SiOx layer, and a through hole of the protective layer is formed to extend through the SiNx layer and the SiOx layer. The gate electrode is provided in the through hole, and the gate electrode is separated from at least part of the SiOx layer so as to form an air gap therebetween.

Abstract: An electronic device is provided. The electronic device includes a plurality of units. The plurality of units includes a first unit. The first unit includes a first electronic component and a test circuit. The test circuit is electrically connected to the first electronic component. The test circuit includes a coil circuit.

Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.

Abstract: Disclosed herein are methods for improving gastrointestinal barrier function, alleviating a gastrointestinal barrier dysfunction-associated disorder, and inhibiting growth of enteric pathogenic bacteria using a composition containing Lactobacillus rhamnosus MP108, Bifidobacterium longum subsp. infantis BLI-02, and Bifidobacterium animalis subsp. lactis BB-115, which are deposited at the China General Microbiological Culture Collection Center (CGMCC) respectively under accession numbers CGMCC 21225, CGMCC 15212, and CGMCC 21840. A number ratio of Lactobacillus rhamnosus MP108, Bifidobacterium longum subsp. infantis BLI-02, and Bifidobacterium animalis subsp. lactis BB-115 ranges from 1:0.2:0.67 to 1:9:9.