Abstract: A transparent film is used with a projector which emits a projected light. The transparent film includes a transparent substrate; a light-scattering layer disposed at an upstream position of the transparent substrate with respect to the projected light, and including a plurality of microstructures configured to scatter the projected light; and a light-blocking layer disposed at an upstream position of the light-scattering layer with respect to the projected light, and including a plurality of separate light-blocking units, which are configured to partially block the projected light and partially allow the projected light to reach the light-scattering layer.

Abstract: A projection apparatus includes a light source, a light reflective member, a light valve, and a light beam adjusting member. The light source is configured to provide an illumination beam. The light reflective member is configured to reflect the illumination beam. The light valve is configured to convert the illumination beam reflected by the light reflective member into an image beam. The light beam adjusting member is optically coupled between the light source and the light reflective member and includes a collimating lens module. The collimating lens module has a light entering surface and a light leaving surface respectively at opposite sides thereof. The light entering surface and the light leaving surface respectively have a first optical axis and a second optical axis extending along different directions.

Abstract: A transparent film is used with a projector which emits a projected light. The transparent film includes a transparent substrate; a light-scattering layer disposed at an upstream position of the transparent substrate with respect to the projected light, and including a plurality of microstructures configured to scatter the projected light; and a light-blocking layer disposed at an upstream position of the light-scattering layer with respect to the projected light, and including a plurality of separate light-blocking units, which are configured to partially block the projected light and partially allow the projected light to reach the light-scattering layer.

Abstract: A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.

Abstract: Provided is a semiconductor structure including a substrate, an isolation structure, a fuse and two gate electrodes. The isolation structure is located in the substrate and defines active regions of the substrate. The fuse is disposed on the isolation structure. The gate electrodes are disposed on the active regions and connected to ends of the fuse. In an embodiment, a portion of a bottom surface of the fuse is lower than top surfaces of the active regions of the substrate.

Abstract: Provided is a semiconductor structure including a substrate, an isolation structure, a fuse and two gate electrodes. The isolation structure is located in the substrate and defines active regions of the substrate. The fuse is disposed on the isolation structure. The gate electrodes are disposed on the active regions and connected to ends of the fuse. In an embodiment, a portion of a bottom surface of the fuse is lower than top surfaces of the active regions of the substrate.

Abstract: A projection apparatus includes a light source, a light reflective member, a light valve, and a light beam adjusting member. The light source is configured to provide an illumination beam. The light reflective member is configured to reflect the illumination beam. The light valve is configured to convert the illumination beam reflected by the light reflective member into an image beam. The light beam adjusting member is optically coupled between the light source and the light reflective member and includes a collimating lens module. The collimating lens module has a light entering surface and a light leaving surface respectively at opposite sides thereof. The light entering surface and the light leaving surface respectively have a first optical axis and a second optical axis extending along different directions.

Abstract: A display device includes a display area and a peripheral area surrounding the display area. The display device includes a thin film transistor substrate, a plurality of thin film transistors, a first common line, and a storage capacitor line. The first common line, the storage capacitor, and a gate electrode of the thin film transistor are located in a same layer. The first common line is directly electrically coupled to the storage capacitor line.

Abstract: A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.

Abstract: A semiconductor memory device includes a substrate, having a plurality of cell regions, wherein the cell regions are parallel and extending along a first direction. A plurality of STI structures is disposed in the substrate, extending along the first direction to isolate the cell regions, wherein the STI structures have a uniform height lower than the substrate in the cell regions. A selection gate line is extending along a second direction and crossing over the cell regions and the STI structures. A control gate line is adjacent to the selection gate line in parallel extending along the second direction and also crosses over the cell regions and the STI structures. The selection gate line and the control gate line together form a two-transistor (2T) memory cell.

Abstract: The present application provides an image projection system and a calibration method of projected image. The calibration method comprises: displaying an original image data as a first image having a first boundary characteristic; projecting the first image as a projected image; analyzing a difference between a boundary shape of the projected image and the first boundary characteristic which is unadjusted; according to the difference between the boundary shape of the projected image and the unadjusted first boundary characteristic, adjusting the first boundary characteristic until the boundary shape of the projected image is similar to the unadjusted first boundary characteristic; and recording the first boundary characteristic at the time when the boundary shape of the projected image is similar to the unadjusted first boundary characteristic as a second boundary characteristic, wherein the first boundary characteristic is the shape of at least one displaying boundary line around the first image.

Abstract: A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate having a tunneling well, a tunneling oxide layer, a charge storage layer and a control gate. The tunneling oxide layer is disposed on the tunneling well. The tunneling oxide layer includes a first tunneling oxide segment having a first thickness, a second tunneling oxide segment having a second thickness, and a third tunneling oxide segment having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other. The charge storage layer is disposed on the tunneling oxide layer, and the control gate is disposed on the charge storage layer.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate having a tunneling well, a tunneling oxide layer, a charge storage layer and a control gate. The tunneling oxide layer is disposed on the tunneling well. The tunneling oxide layer includes a first tunneling oxide segment having a first thickness, a second tunneling oxide segment having a second thickness, and a third tunneling oxide segment having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other. The charge storage layer is disposed on the tunneling oxide layer, and the control gate is disposed on the charge storage layer.

Abstract: A method for processing a semiconductor wafer is provided. The method includes placing a semiconductor wafer on a wafer chuck. The method further includes performing a process over the wafer. The method also includes supplying a cooling gas to the backside of the semiconductor wafer via a groove and a number of ventilation apertures located in the groove. Two of the neighboring ventilation apertures are separated in a circumferential direction relative to the center of the wafer chuck by a predetermined angle that is less than 90 degrees.

Abstract: An active array matrix substrate of a display panel includes a number of scan lines parallel to each other and arranged in a first metal layer of a first substrate, a number of data lines parallel to each other and arranged in a second metal layer of the first substrate, a number of gate electrodes arranged in the first metal layer, a number of source electrodes arranged in the second metal layer, and a number of drain electrodes arranged in the second metal layer. The source electrode includes at least one source extending portion spaced from and configured to overlap with the first metal layer. The drain electrode includes at least one drain extending portion spaced from and configured to overlap with the first metal layer.

Abstract: An array substrate can include a plurality of thin film transistors, a plurality of function lines, a plurality of leads, a coupling part and a driver. The plurality of function lines are configured to transmit driving signals to the thin film transistors. The plurality of leads include a first lead and a second lead. The coupling part is electrically coupling the leads to the function lines. The driver is electrically coupled to the leads, and configured to provide the driving signals to the function lines. The first lead has a length larger than that of the second lead. A contacting area between the first lead and the coupling part is larger than that between the second lead and the coupling part. A display panel with the array substrate is also provided.

Abstract: A thin film transistor array substrate includes a base, a first metal layer having a gate electrode and a first insulating layer covering the base and the first metal layer. A semiconductor layer is formed on the first insulating layer facing but insulated from the gate electrode. The first insulating layer also supports a second metal layer having a source electrode and a drain electrode. A pixel electrode layer is electrically coupled to the source electrode or the drain electrode. A common electrode layer is insulated from the pixel electrode and is configured to receive a common voltage. A transparent conductive layer is formed on the base and is insulated from the pixel electrode. The semiconductor layer, electrically coupled to the source electrode and the drain electrode, is located between the source electrode and the drain electrode.

Abstract: The present application provides an image projection system and a calibration method of projected image. The calibration method comprises: displaying an original image data as a first image having a first boundary characteristic; projecting the first image as a projected image; analyzing a difference between a boundary shape of the projected image and the first boundary characteristic which is unadjusted; according to the difference between the boundary shape of the projected image and the unadjusted first boundary characteristic, adjusting the first boundary characteristic until the boundary shape of the projected image is similar to the unadjusted first boundary characteristic; and recording the first boundary characteristic at the time when the boundary shape of the projected image is similar to the unadjusted first boundary characteristic as a second boundary characteristic, wherein the first boundary characteristic is the shape of at least one displaying boundary line around the first image.

Abstract: A Liquid Crystal Display (LCD) device is provided. The LCD device includes: a plurality of first driving lines extending along a first direction; a plurality of second driving lines extending along a second direction perpendicular to the first direction, wherein the plurality of second driving lines insulatively intersect with the plurality of first driving lines to define a plurality of pixel regions; a plurality of pixel electrodes respectively arranged at the plurality of pixel regions; a first driving circuit coupled with the plurality of first driving lines; and a second driving circuit coupled with the plurality of second driving lines; wherein the first driving circuit and the second driving circuit drive the first and second driving lines to output different voltage to cause two adjacent same color pixel electrodes arranged along the second direction to have different polarity.