Abstract: Provided are a transistor structure and a method of forming the same. The transistor structure includes a gate electrode; a gate dielectric layer, disposed on the gate electrode; an active layer, disposed on the gate dielectric layer; a pair of source/drain (S/D) features, disposed on the active layer; and an isolation structure, laterally surrounding the pair of S/D features, wherein the isolation structure at least comprises a blocking layer and an upper dielectric layer on the blocking layer.

Abstract: An imaging lens assembly includes a first optical element and a low-reflection layer. The first optical element has a central opening, and includes a first surface, a second surface and a first outer diameter surface. The first outer diameter surface is connected to the first surface and the second surface. The low-reflection layer is located on at least one of the first surface and the second surface, and includes a carbon black layer, a nano-microstructure and a coating layer. The nano-microstructure is directly contacted with and connected to the carbon black layer, and the nano-microstructure is farther from the first optical element than the carbon black layer from the first optical element. The coating layer is directly contacted with and connected to the nano-microstructure, and the coating layer is farther from the first optical element than the nano-microstructure from the first optical element.

Abstract: A method of manufacturing a semiconductor package includes the following steps. A backside redistribution structure is formed, wherein the backside redistribution structure comprises a first dielectric layer, and a redistribution metal layer over the first dielectric layer and comprising a dummy pattern. A semiconductor device is provided over the backside redistribution structure, wherein an active surface of the semiconductor device faces away from the backside redistribution structure, the semiconductor device is electrically insulated from the dummy pattern and overlapped with the dummy pattern from a top view of the semiconductor package. A front side redistribution structure is formed over the semiconductor device, wherein the front side redistribution structure is electrically connected to the semiconductor device. A patterning process is performed on the first dielectric layer to form a marking pattern opening exposing a part of the dummy pattern.

Abstract: An infant care apparatus includes a piezoelectric sensor and an infrared array sensor. The piezoelectric sensor senses a respiration rate and a heart rate of an infant. The infrared array sensor senses a body temperature and an occupancy state of the infant in a non-contact manner. The abovementioned infant care apparatus can assist in determining an abnormality of the respiration rate and the heart rate of the infant based on the occupancy state of the infant output by the infrared array sensor, so as to reduce a false alarm rate.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: Electrochemical devices, and associated materials and methods, are generally described. In some embodiments, an electrochemical device comprises an electroactive material. The electroactive material may comprise an alloy having a solid phase and a liquid phase that co-exist with each other. As a result, such a composite electrode may have, in some cases, the mechanical softness to permit both high energy densities and an improved current density as compared to, for example, a substantially pure metal electrode.

Abstract: Embodiments described herein relate generally to electrochemical cells having high rate capability, and more particularly to devices, systems and methods of producing high capacity and high rate capability batteries having relatively thick semi-solid electrodes. In some embodiments, an electrochemical cell includes an anode and a semi-solid cathode. The semi-solid cathode includes a suspension of an active material of about 35% to about 75% by volume of an active material and about 0.5% to about 8% by volume of a conductive material in a non-aqueous liquid electrolyte. An ion-permeable membrane is disposed between the anode and the semi-solid cathode. The semi-solid cathode has a thickness of about 250 ?m to about 2,000 ?m, and the electrochemical cell has an area specific capacity of at least about 7 mAh/cm2 at a C-rate of C/4. In some embodiments, the semi-solid cathode slurry has a mixing index of at least about 0.9.

Abstract: Redox flow devices are described including a positive electrode current collector, a negative electrode current collector, and an ion-permeable membrane separating said positive and negative current collectors, positioned and arranged to define a positive electroactive zone and a negative electroactive zone; wherein at least one of said positive and negative electroactive zone comprises a flowable semi-solid composition comprising ion storage compound particles capable of taking up or releasing said ions during operation of the cell, and wherein the ion storage compound particles have a polydisperse size distribution in which the finest particles present in at least 5 vol % of the total volume, is at least a factor of 5 smaller than the largest particles present in at least 5 vol % of the total volume.

Abstract: A micro-electro-mechanical system acoustic sensor, a micro-electro-mechanical system package structure and a method for manufacturing the same are provided. The micro-electro-mechanical system acoustic sensor comprises a substrate, a cantilever structure and a diaphragm sensor. The cantilever structure is formed on the substrate, and comprises a fixed end and a free cantilever portion extended from the fixed end. The free cantilever portion comprises a free end. The free end and the fixed end are respectively at opposing sides of the free cantilever portion. The free cantilever portion is capable of generating a vibration wave in an empty space. The diaphragm sensor is formed on the substrate, and comprises a diaphragm film, a back plate, and at least one electrical contact point. The back plate and the diaphragm film have a first empty gap there between. The empty space and the first empty gap communicate to each other.

Abstract: A metal-air battery including: a current collector; a metal electrode including a metal and contacting the current collector; an air electrode on the metal electrode and opposite the current collector; a solid electrolyte between the metal electrode and the air electrode; a discharge product of the metal on the air electrode; wherein the metal-air battery is configured to release the discharge product.

Abstract: A semiconductor package includes a first redistribution circuit structure, a semiconductor die, and an electrically conductive structure. The semiconductor die is disposed over and electrically coupled to the first redistribution circuit structure. The electrically conductive structure connects a non-active side of the semiconductor die to a conductive feature of the first redistribution circuit structure, where the semiconductor die is thermally couped to the first redistribution circuit structure through the electrically conductive structure, and the electrically conductive structure includes a structure of multi-layer with different materials.

Abstract: A method of manufacturing an electrochemical cell includes transferring an anode semi-solid suspension to an anode compartment defined at least in part by an anode current collector and an separator spaced apart from the anode collector. The method also includes transferring a cathode semi-solid suspension to a cathode compartment defined at least in part by a cathode current collector and the separator spaced apart from the cathode collector. The transferring of the anode semi-solid suspension to the anode compartment and the cathode semi-solid to the cathode compartment is such that a difference between a minimum distance and a maximum distance between the anode current collector and the separator is maintained within a predetermined tolerance. The method includes sealing the anode compartment and the cathode compartment.

Abstract: Embodiments described herein relate generally to methods for the remediation of electrochemical cell electrodes. In some embodiments, a method includes obtaining an electrode material. At least a portion of the electrode material is rinsed to remove a residue therefrom. The electrode material is separated into constituents for reuse.

Abstract: An integrated-optics MEMS-actuated beam-steering system is disclosed, wherein the beam-steering system includes a lens and a programmable vertical coupler array having a switching network and an array of vertical couplers, where the switching network can energize of the vertical couplers such that it efficiently emits the light into free-space. The lens collimates the light received from the energized vertical coupler and directs the output beam along a propagation direction determined by the position of the energized vertical coupler within the vertical-coupler array. In some embodiments, the vertical coupler is configured to correct an aberration of the lens. In some embodiments, more than one vertical coupler can be energized to enable steering of multiple output beams. In some embodiments, the switching network is non-blocking.

Abstract: An electronic system using a power regulator with reduced inrush current is shown. An output capacitance device that is coupled between the power regulator and the load has a first capacitor and a second capacitor. When the power regulator is in the first power mode, the first capacitor and the second capacitor are both coupled to the power regulator. When the power regulator is in the second power mode, which uses less power than the first power mode, the first capacitor is still coupled to the power regulator, but the second capacitor is disconnected from the power regulator and is protected from being discharged by the power regulator.

Abstract: Systems, methods, and device of the various embodiments may support energy storage devices in which electrochemical oxidation and reduction of one or more redox-active oxyanions occurs during charging and/or discharging of the energy storage device.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: Various embodiments include processes for purifying and/or preparing iron-bearing materials. Various embodiments include purification and/or preparation of iron ores, iron, and their intermediates. Various embodiments include processes for purifying iron-bearing materials comprising leaching one or more soluble species of impurities out of iron-bearing materials using a leaching solution comprising fluorine.

Abstract: The present disclosure is directed to imaging LiDARs monolithic integration of focal plane switch array LiDARS with CMOS electronics. The CMOS wafer contains electronic circuits needed to control the focal plane array, e.g., digital addressing circuits and MEMS drivers, as well as circuits to amplify and process the detected signals, e.g., trans-impedance amplifiers (TIA), multi-stage amplifiers, analog-to-digital converters (ADC), digital signal processing (DSP), and circuits to communicate with external systems. Methods of use are also provided.