Abstract: A power supply circuit, its generating and control methods are presented, relating to smart wearable devices. The power supply circuit comprises a Bandgap voltage reference, a real-time detection and control circuit, and a substitute voltage source. The real-time detection and control circuit is connected to the Bandgap voltage reference and the substitute voltage source, and adjusts an output voltage of the substitute voltage source to match an output voltage of the Bandgap voltage reference. After these output voltages are equal, the output voltage of the power supply circuit is provided by the substitute voltage source, and the Bandgap voltage reference can be disconnected from the circuit. This circuit can lower the power consumption of the Bandgap voltage reference without affecting the stability of the voltage output.

Abstract: We demonstrate herein that neuritin controls the homeostasis of regulatory T cells in an antigen dependent manner. Based on this discovery, we describe herein the application of neuritin as a therapeutic agent to manipulate antigen specific regulatory T cells in various disease settings is described. Thus manipulation of Treg cells and DCs through neuritin can be used to enhance immunotherapy of autoimmune diseases, cancer and infectious diseases, as well as enhance lymphocyte engraftment in settings of donor lymphocyte infusion, bone marrow transplant, as well as other types of transplants, and adoptive transfer.

Abstract: A bicycle brake disc includes: a disc body, having connecting portions extending from an inner periphery of the disc body, and each connecting portion including a connecting hole, and first connecting elements; a rotor carrier having a center hole and carrier arms formed by extending from the center hole to an outer periphery of the rotor carrier, and each carrier arm having a through hole; each heat dissipation baffle has a first and second end portions, and fitting holes, the first and second end portions of each heat dissipation baffle respectively clamped between two adjacent connecting portions and two adjacent carrier arms, so that the connecting hole, the fitting hole, and the through hole are sequentially aligned; and the first connecting element passing through the holes to fixedly connect the disc body, the heat dissipation baffles, and the rotor carrier.

Abstract: An integrated circuit (IC) device includes a substrate having a fin-type active region extending in a first direction, a gate structure intersecting the fin-type active region on the substrate, the gate structure extending in a second direction perpendicular to the first direction and parallel to a top surface of the substrate, source and drain regions on both sides of the gate structure, and a first contact structure electrically connected to one of the source and drain regions, the first contact structure including a first contact plug including a first material and a first wetting layer surrounding the first contact plug, the first wetting layer including a second material having a lattice constant that differs from a lattice constant of the first material by about 10% or less.

Abstract: Methods of fabricating a semiconductor device are provided. The methods may include forming an active pattern on a substrate, forming a gate electrode traversing the active pattern on the active pattern, forming a recess adjacent to a sidewall of the gate electrode in the active pattern, and performing a chemical vapor deposition process using a source gas and a doping gas to form a source/drain region in the recess. The source gas may include a silicon precursor and a germanium precursor, and the doping gas may include a gallium precursor and a boron precursor.

Abstract: A bicycle brake disc includes: a disc body, having connecting portions extending from an inner periphery of the disc body, and each connecting portion including a connecting hole, and first connecting elements; a rotor carrier having a center hole and carrier arms formed by extending from the center hole to an outer periphery of the rotor carrier, and each carrier arm having a through hole; each heat dissipation baffle has a first and second end portions, and fitting holes, the first and second end portions of each heat dissipation baffle respectively clamped between two adjacent connecting portions and two adjacent carrier arms, so that the connecting hole, the fitting hole, and the through hole are sequentially aligned; and the first connecting element passing through the holes to fixedly connect the disc body, the heat dissipation baffles, and the rotor carrier.

Abstract: A Static Random Access Memory (SRAM) array power supply circuit is presented. The circuit comprises an SRAM test unit having a substantially same structure as a basic SRAM unit in the SRAM array; a switch device connected to a power source, the SRAM test unit, and the SRAM array; and a switch control circuit connected to the SRAM test unit and the switch device. When a test voltage in the SRAM test unit is lower than a threshold voltage, the switch device is closed so that the power source begins to charge the SRAM array and the SRAM test unit. The SRAM test unit provides an early warning for the SRAM array, allowing the latter to be charged upon fulfillment of a condition (e.g., charge is low). Compared to conventional circuits, this circuit provides an output voltage that is more stable and less susceptible to the changes in external conditions such as temperature or pressure.

Abstract: A power supply circuit, its generating and control methods are presented, relating to smart wearable devices. The power supply circuit comprises a Bandgap voltage reference, a real-time detection and control circuit, and a substitute voltage source. The real-time detection and control circuit is connected to the Bandgap voltage reference and the substitute voltage source, and adjusts an output voltage of the substitute voltage source to match an output voltage of the Bandgap voltage reference. After these output voltages are equal, the output voltage of the power supply circuit is provided by the substitute voltage source, and the Bandgap voltage reference can be disconnected from the circuit. This circuit can lower the power consumption of the Bandgap voltage reference without affecting the stability of the voltage output.

Abstract: Machine learning is utilized to analyze respective execution times of a plurality of tasks in a job performed in a distributed computing system to determine that a subset of the plurality of tasks are straggler tasks in the job, where the distributed computing system includes a plurality of computing devices. A supervised machine-learning algorithm is performed using a set of inputs including performance attributes of the plurality of tasks, where the supervised machine learning algorithm uses labels generated from determination of the set of straggler tasks, the performance attributes include respective attributes of the plurality of tasks observed during performance of the job, and applying the supervised learning algorithm results in identification of a set of rules defining conditions, based on the performance attributes of the plurality of tasks, indicative of which tasks will be straggler tasks in a job. Rule data is generated to describe the set of rules.

Abstract: Combinations of anti-cancer antibodies and inhibitory antibodies to CD223 overcome immune suppression in cancer patients. The inhibitory antibodies may be generated in an animal by injection of fragments of CD223. Antibodies may be monoclonal antibodies or single chain antibodies or humanized antibodies.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure in the semiconductor substrate for isolating a first active region and a second active region, a first device formed in the first active region, and a second device formed in the second active region. The first device has a first gate dielectric layer and a first gate electrode over the first gate dielectric layer. The first gate electrode includes at least one of Ta and C, and has a first work function for a first conductivity. The second device has a second gate dielectric layer and a second gate electrode over the second gate dielectric layer. The second gate electrode includes at least one of Ta, C, and Al, and has a second work function for a second conductivity. The second conductivity is different from the first conductivity.

Abstract: Method and device for detecting the process corner of a transistor are provided. The process corner detection method includes providing a ring oscillator. The ring oscillator includes an odd number of oscillation units connected in series and an output port of one of the oscillation units serves as the output port of the ring oscillator to output an oscillation signal. Each oscillation unit is constructed based on a PMOS transistor and an NMOS transistor. The process corner detection method further includes measuring the period of the oscillation signal and the maintaining time of the oscillation signal at a high level and a low level in each cycle; and determining the process corner of the PMOS transistor and the NMOS transistor in the oscillation unit based on the period of the oscillation signal and the maintaining time of the oscillation signal at a high level and a low level in each cycle.

Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.

Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.

Abstract: A pressure detection method for an in-cell touch display and a mobile device using the same are provided. The pressure detection method comprises the steps of: providing a common voltage plane corresponding to touch sensing electrodes in the in-cell touch display; detecting capacitance values of the touch sensing electrodes; setting a first area and a second area according to a center of a touched portion when the in-cell touch display is determined as being touched, wherein the second area includes the first area; and excluding the capacitance values of the touch sensing electrodes in the first area, and using the capacitance values of the touch sensing electrodes in the second area to serve as a pressure detection value to determine a pressure exerted on the in-cell touch display.

Abstract: A bandgap reference circuit and method of using the same are provided. The bandgap reference circuit includes a startup component; an output component; and a bandgap core component coupled there-between. The bandgap core component includes a reference point having a voltage associated with an output signal of the output component. A controller is configured for controlling the bandgap core component and the output component to switch between a low power consumption mode and a normal operation mode based on the voltage at the reference point. When the bandgap core component and the output component operate in the normal operation mode, the bandgap reference circuit outputs a stable voltage and has a first power consumption. When the bandgap core component and the output component operate in the low power consumption mode, the bandgap reference circuit has a second power consumption less than the first power consumption.

Abstract: The present disclosure describes a semiconductor device. The device includes a semiconductor substrate, an isolation structure formed in the substrate for isolating a first active region and a second active region, a first transistor formed in the first active region, the first transistor having a high-k gate dielectric layer and a metal gate with a first work function formed over the high-k gate dielectric layer, and a second transistor formed in the second active region, the second transistor having the high-k gate dielectric layer and a metal gate with a second work function formed over the high-k gate dielectric layer. The metal gates are formed from at least a single metal layer having the first work function and the second work function.

Abstract: A method operates a bandgap voltage reference circuit that includes a bias circuit for receiving a feedback signal and outputting a bias signal, an amplifier for receiving the bias signal and outputting a first reference signal as the feedback signal, an output circuit for receiving the first reference signal and outputting a second reference signal, and an output switch for outputting the second reference signal as an output signal. The method includes, after powering up the bandgap voltage reference circuit, determining whether the output signal is stable, when the output signal is stable, turning off the output switch; turning off the bias circuit; and turning off the output circuit. The sequential turning off the output switch, the output circuit, and the bias circuit puts the bandgap voltage reference circuit into a sleep mode to save power.

Abstract: A flexible high-power control device is disclosed for controlling at least one high-power electrical generating/consuming device which has a plurality of electrical terminals and a housing with a non-planar surface and is thermal-conductively connected to an active cooling unit. The flexible high-power control device comprises a flexible thermal-conductive interfacial insulation substrate, at least one circuit layer, and at least one electronic element. The interfacial insulation substrate is attached to the non-planar surface of the electrical generating/consuming device. The circuit layer, which is disposed on the interfacial insulation substrate, includes a plurality of electrical terminals which are electrically connected to the electrical terminals of the electrical generating/consuming device. The electronic element is electrically mounted on the circuit layer to form a control circuit for controlling the electrical generating/consuming device.

Abstract: In a method of manufacturing a semiconductor device, a first gate structure and a second gate structure are formed on a substrate in a first region and a second region, respectively. A first semiconductor pattern including germanium is formed in the first region on the substrate. A first metal layer is formed on the substrate to cover the first semiconductor pattern. A first heat treatment process is performed such that the first semiconductor pattern and the first metal layer react with each other to form a first metal-semiconductor composite pattern in the first region and a semiconductor material of the substrate and the first metal layer react with each other to form a second metal-semiconductor composite pattern in the second region. The first metal-semiconductor composite pattern is removed from the substrate. A second metal layer is formed on the substrate to cover the second metal-semiconductor composite pattern. The second metal layer includes a material different from the first metal layer.