Patents by Inventor An Tang

An Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8869084
    Abstract: A method for generating a layout for a cell of an integrated circuit (IC) guided by design rule checking (DRC) is disclosed. In the method, a model is defined, wherein the model comprises a plurality of parameters for generating a layout of the cell. Next an initial layout for the cell can be generated according to an initial set of values for the plurality of parameters. Then design rule checking (DRC) is performed for the initial layout based on a set of design rules. If any violations are found, the corresponding violation reports will be associated with the model. Therefore, a new set of values for the plurality of parameters can be generated by analyzing the violation reports collectively based on the model. With the new set of values for the plurality of parameters and above steps repeated, until no violation is found, a “DRC clean” layout can be generated.
    Type: Grant
    Filed: November 24, 2012
    Date of Patent: October 21, 2014
    Assignees: Synopsys, Inc., Synopsys Taiwan Co., Ltd.
    Inventors: Chien-Fu Chung, Yuan-Kai Pei, Shyh-An Tang
  • Publication number: 20140280189
    Abstract: Systems and methods may determine a boundary value data unit in a large data set in parallel with determining an associated index of the determined boundary value data unit into the large data set using a single instruction multiple data (SIMD) instruction set architecture and a specialized data layout of array entries. In one example, the specialized data layout of array entries combines a data value and its associated index to an array into a single array entry.
    Type: Application
    Filed: March 29, 2013
    Publication date: September 18, 2014
    Inventors: Li-An Tang, Shih-Hsuan Hsu
  • Patent number: 8789008
    Abstract: Methods for generating a device layout are provided. First, design rules corresponding to a specific technology are received. A selection of at least one element and a parameter value corresponding to at least one parameter on the selected element are received. A draft device layout corresponding to the selected element is generated by a device generator by referencing the parameter value and the design rules. A script is then executed to modify the draft device layout to generate an updated device layout. The script includes at least one command, and when the script is executed, the at least one command is performed to modify the parameter value of the at least one parameter of the selected element and cause the device generator to delete the old draft device layout and generate a new draft device layout by referencing the modified parameter value and the design rules.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: July 22, 2014
    Assignees: Synopsys Taiwan Co., Ltd., Synopsys, Inc.
    Inventors: Chih-Hung Chen, Wen-Hao Yu, Shyh-An Tang
  • Patent number: 8595543
    Abstract: A circuit and method for trimming an internal oscillator of a USB device that generates a clock signal as a frequency source of the USB device detect an end of packet from an input data stream to initialize a counter, identify a token packet in the data stream to detect a start of frame token packet for the counter to carry out clock counting on the clock signal to thereby obtain a count value, and compare the count value with a reference value to determine a trimming code for trimming a clock frequency of the internal oscillator.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: November 26, 2013
    Assignee: Elan Microelectronics Corporation
    Inventors: Tsung-Yin Chiang, Chun-Chi Wang, Po-Hao Wu, Chun-An Tang
  • Publication number: 20130185687
    Abstract: A method for generating a layout for a cell of an integrated circuit (IC) guided by design rule checking (DRC) is disclosed. In the method, a model is defined, wherein the model comprises a plurality of parameters for generating a layout of the cell. Next an initial layout for the cell can be generated according to an initial set of values for the plurality of parameters. Then design rule checking (DRC) is performed for the initial layout based on a set of design rules. If any violations are found, the corresponding violation reports will be associated with the model. Therefore, a new set of values for the plurality of parameters can be generated by analyzing the violation reports collectively based on the model. With the new set of values for the plurality of parameters and above steps repeated, until no violation is found, a “DRC clean” layout can be generated.
    Type: Application
    Filed: November 24, 2012
    Publication date: July 18, 2013
    Inventors: Chien-Fu Chung, Yuan-Kai Pei, Shyh-An Tang
  • Publication number: 20120066659
    Abstract: Methods for generating a device layout are provided. First, design rules corresponding to a specific technology are received. A selection of at least one element and a parameter value corresponding to at least one parameter on the selected element are received. A draft device layout corresponding to the selected element is generated by a device generator by referencing the parameter value and the design rules. A script is then executed to modify the draft device layout to generate an updated device layout. The script includes at least one command, and when the script is executed, the at least one command is performed to modify the parameter value of the at least one parameter of the selected element and cause the device generator to delete the old draft device layout and generate a new draft device layout by referencing the modified parameter value and the design rules.
    Type: Application
    Filed: July 22, 2011
    Publication date: March 15, 2012
    Applicants: SPRINGSOFT USA, INC., SPRINGSOFT INC.
    Inventors: Chih-Hung Chen, Wen-Hao Yu, Shyh-An Tang
  • Publication number: 20110093736
    Abstract: A circuit and method for trimming an internal oscillator of a USB device that generates a clock signal as a frequency source of the USB device detect an end of packet from an input data stream to initialize a counter, identify a token packet in the data stream to detect a start of frame token packet for the counter to carry out clock counting on the clock signal to thereby obtain a count value, and compare the count value with a reference value to determine a trimming code for trimming a clock frequency of the internal oscillator.
    Type: Application
    Filed: September 24, 2010
    Publication date: April 21, 2011
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: TSUNG-YIN CHIANG, CHUN-CHI WANG, PO-HAO WU, CHUN-AN TANG
  • Patent number: 7643014
    Abstract: A voltage is generated after a touch screen is touched, and the voltage is transformed into a digital signal for detecting a touch point which the touch screen is touched. A touch sensing system includes a first switch having a first node coupled to a first voltage source, a second switch having a node coupled to a second voltage source, a first resistor coupled between the first switch and the second switch in a series connection, a comparator having a first input node coupled to a second node of the first switch, a successive approximation register (SAR) having an input node coupled to an output node of the comparator, and a simulation circuit. An output voltage of the simulation circuit is continuously adjusted by the comparator and the simulation circuit to transform the voltage generated on the touch screen into a digital signal.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: January 5, 2010
    Assignee: Elan Microelectronics Corporation
    Inventors: Chao-Chi Yang, Chung-An Tang
  • Patent number: 7364126
    Abstract: An ejectable stand for a portable media center includes a stand body and a slide switch. The stand body has a front end, a rear end and an outer surface, and the rear end has a torsion spring pushing against both the stand body and the portable media center, and the front end has a stop. The slide switch slidably is mounted on the outer surface of the stand body and has a fastening hook corresponding to the fastening lip of the portable media center, and the fastening hook includes a compression spring pushing against both the fastening hook and stop of the stand body. The compression spring provides an elastic force to drive the fastening hook to slide the slide switch on the stand body and to fasten the fastening hook and the fastening lip together.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: April 29, 2008
    Assignee: Tatung Company
    Inventors: Sheng-Yu Tsai, Sheng-An Tang
  • Patent number: 7257794
    Abstract: A computer-aided design tool generates a layout for a passive device, such as a resistor or a capacitor, to be incorporated into an integrated circuit. The layout is based on a model describing the passive device as being formed by a variable number of interconnected instances of a device unit, such as a resistor segment or a capacitor block. User-supplied Input parameter values control the number of instances of the device unit included in the passive device layout, the relative positions of the device unit instances, and characteristics of their internal layouts. The tool also generates a display of a representation of the passive device layout and provides a graphical interface enabling the user to modify various aspects of the passive device layout by altering its displayed representation.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: August 14, 2007
    Assignee: Springsoft, Inc.
    Inventors: Shyh-An Tang, Ya-Chin Hsu
  • Publication number: 20070089914
    Abstract: A voltage is generated after a touch screen is touched, and the voltage is transformed into a digital signal for detecting a touch point which the touch screen is touched. A touch sensing system includes a first switch having a first node coupled to a first voltage source, a second switch having a node coupled to a second voltage source, a first resistor coupled between the first switch and the second switch in a series connection, a comparator having a first input node coupled to a second node of the first switch, a successive approximation register (SAR) having an input node coupled to an output node of the comparator, and a simulation circuit. An output voltage of the simulation circuit is continuously adjusted by the comparator and the simulation circuit to transform the voltage generated on the touch screen into a digital signal.
    Type: Application
    Filed: March 2, 2006
    Publication date: April 26, 2007
    Inventors: Chao-Chi Yang, Chung-An Tang
  • Publication number: 20070080269
    Abstract: An ejectable stand for a portable media center includes a stand body and a slide switch. The stand body has a front end, a rear end and an outer surface, and the rear end has a torsion spring pushing against both the stand body and the portable media center, and the front end has a stop. The slide switch slidably is mounted on the outer surface of the stand body and has a fastening hook corresponding to the fastening lip of the portable media center, and the fastening hook includes a compression spring pushing against both the fastening hook and stop of the stand body. The compression spring provides an elastic force to drive the fastening hook to slide the slide switch on the stand body and to fasten the fastening hook and the fastening lip together.
    Type: Application
    Filed: December 12, 2005
    Publication date: April 12, 2007
    Applicant: Tatung Company
    Inventors: Sheng-Yu Tsai, Sheng-An Tang
  • Patent number: 7158070
    Abstract: While transforming an analog input voltage into a digital signal including several bits, an analog-to-digital converter including a built-in self test (BIST) circuit is used for performing the transformation and compensating an offset error of the analog input voltage. The operations of the digital-to-analog converter include a self test mode and a normal mode. And each of the self test mode and the normal mode includes a sampling phase and a bit cycling phase.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: January 2, 2007
    Assignee: Elan Microelectronics Corporation
    Inventors: Chao-Chi Yang, Chung-An Tang
  • Publication number: 20060136856
    Abstract: A computer-aided design tool generates a layout for a passive device, such as a resistor or a capacitor, to be incorporated into an integrated circuit. The layout is based on a model describing the passive device as being formed by a variable number of interconnected instances of a device unit, such as a resistor segment or a capacitor block. User-supplied Input parameter values control the number of instances of the device unit included in the passive device layout, the relative positions of the device unit instances, and characteristics of their internal layouts. The tool also generates a display of a representation of the passive device layout and provides a graphical interface enabling the user to modify various aspects of the passive device layout by altering its displayed representation.
    Type: Application
    Filed: January 19, 2005
    Publication date: June 22, 2006
    Inventors: Shyh-An Tang, Ya-Chin Hsu
  • Patent number: 6993464
    Abstract: The present invention discloses a method for finding an optimized filter parameters design to meet input specifications and hardware constraints in accordance with a typical single channel digital IF programmable downconverter. Said typical single channel digital IF programmable downconverter comprises four stages, including a high speed down-sampling stage, a spectral shaping stage, a rate matching stage and an oversampling stage. According to input specifications, said method firstly determines a number of Halfband interpolation filters used in said oversampling stage, secondly obtains optimized parameters for a CIC decimation filter and a Halfband decimation filter in said high speed down-sampling stage, using as many Halfband decimation filters as possible. Then determine if it is necessary to use re-sampling FIR filter for rate matching.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: January 31, 2006
    Assignee: Chunghwa Telecom Co., Ltd.
    Inventors: Che-Sheng Chiu, Kai-An Tang, Su-Chin Hsieh, Chiung-Jang Chen
  • Patent number: 6954383
    Abstract: An on-system programmable and off-system programmable chip comprises a control circuit connected to an on-system programmable nonvolatile memory and an off-system programmable nonvolatile memory, and a pumping circuit connected to the on-system programmable nonvolatile memory. In a programming mode of the chip, external programming voltages are provided for programming the off-system programmable nonvolatile memory, and in an operation mode of the chip, the pumping circuit produces internal programming voltages for the on-system programmable nonvolatile memory for programming the on-system programmable nonvolatile memory.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: October 11, 2005
    Assignee: Elan Microelectronics Corporation
    Inventors: Yen-Chang Chiu, Chun-An Tang, Kuang-Yeu Lin, Cheng-Hao Tang
  • Publication number: 20050135892
    Abstract: An end milling cutter assembly includes a handle and a cutter bar is connected to the handle by inserting an insertion into a receiving recess defined in the handle. A first bolt threadedly extends through a threaded hole defined radially in the handle and contacts a surface defined in an outer periphery of the insertion. A second bolt threadedly extends through a passage defined longitudinally in the handle and is threadedly connected to a threaded recess defined in the insertion. The total length of the assembly is shortened and the cutter bar is positioned in two different directions by the two bolts.
    Type: Application
    Filed: December 17, 2003
    Publication date: June 23, 2005
    Inventor: An Tang
  • Publication number: 20050094469
    Abstract: An on-system programmable and off-system programmable chip comprises a control circuit connected to an on-system programmable nonvolatile memory and an off-system programmable nonvolatile memory, and a pumping circuit connected to the on-system programmable nonvolatile memory. In a programming mode of the chip, external programming voltages are provided for programming the off-system programmable nonvolatile memory, and in an operation mode of the chip, the pumping circuit produces internal programming voltages for the on-system programmable nonvolatile memory for programming the on-system programmable nonvolatile memory.
    Type: Application
    Filed: December 2, 2004
    Publication date: May 5, 2005
    Inventors: Yen-Chang Chiu, Chun-An Tang, Kuang-Yeu Lin, Cheng-Hao Tang
  • Patent number: 6882577
    Abstract: An on-system programmable and off-system programmable chip comprises a control circuit connected to an on-system programmable nonvolatile memory and an off-system programmable nonvolatile memory, and a pumping circuit connected to the on-system programmable nonvolatile memory. In a programming mode of the chip, external programming voltages are provided for programming the off-system programmable nonvolatile memory, and in an operation mode of the chip, the pumping circuit produces internal programming voltages for the on-system programmable nonvolatile memory for programming the on-system programmable nonvolatile memory.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: April 19, 2005
    Assignee: Elan Microelectronics Corporation
    Inventors: Yen-Chang Chiu, Chun-An Tang, Kuang-Yeu Lin, Cheng-Hao Tang
  • Patent number: D695438
    Type: Grant
    Filed: January 20, 2013
    Date of Patent: December 10, 2013
    Assignee: So Bright Electronics Co., Ltd.
    Inventors: Chun Hsien Liu, Ru-An Tang