Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip comprising a memory cell with a sidewall spacer, and/or an etch stop layer, doped to reduce charge accumulation at an interface between the sidewall spacer and the etch stop layer. The memory cell comprises a bottom electrode, a data storage element overlying the bottom electrode, and a top electrode overlying the data storage element. The sidewall spacer overlies the bottom electrode on a common sidewall formed by the data storage element and the top electrode, and the etch stop layer lines the sidewall spacer. The sidewall spacer and the etch stop layer directly contact at the interface and form an electric dipole at the interface. The doping to reduce charge accumulation reduces an electric field produced by the electric dipole, thereby reducing the effect of the electric field on the memory cell.

Abstract: Ferroelectric stacks are disclosed herein that can improve retention performance of ferroelectric memory devices. An exemplary ferroelectric stack has a ferroelectric switching layer (FSL) stack disposed between a first electrode and a second electrode. The ferroelectric stack includes a barrier layer disposed between a first FSL and a second FSL, where a first crystalline condition of the barrier layer is different than a second crystalline condition of the first FSL and/or the second FSL. In some embodiments, the first crystalline condition is an amorphous phase, and the second crystalline condition is an orthorhombic phase. In some embodiments, the first FSL and/or the second FSL include a first metal oxide, and the barrier layer includes a second metal oxide. The ferroelectric stack can be a ferroelectric capacitor, a portion of a transistor, and/or connected to a transistor in a ferroelectric memory device to provide data storage in a non-volatile manner.

Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

Abstract: An system, method and software for controlling processes of an auto-refill system of an ampoule including one or more sensors configured to determine one or more liquid level heights within the ampoule. The auto-refill system having a state machine configured to control the auto-refill system, the state machine having one or more states for refilling the ampoule.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes and image sensor element disposed within a substrate. The substrate comprises a first material. The image sensor element includes an active layer comprising a second material different from the first material. A buffer layer is disposed between the active layer and the substrate. The buffer layer extends along outer sidewalls and a bottom surface of the active layer. A capping structure overlies the active layer. Outer sidewalls of the active layer are spaced laterally between outer sidewalls of the capping structure such that the capping structure continuously extends over outer edges of the active layer.

Abstract: A memory device includes a field effect transistor and a variable-capacitance capacitor. A gate structure includes a gate dielectric and an intermediate electrode. The variable-capacitance capacitor includes a lower capacitor plate comprising the intermediate electrode, an upper capacitor plate comprising a control gate electrode, and a variable-capacitance node dielectric and including an electrical-field-programmable metal oxide material. The electrical-field-programmable metal oxide material provides a variable effective dielectric constant, and a data bit may be stored as a dielectric state of the variable-capacitance node dielectric in the memory device. The variable-capacitance node dielectric provides reversible electrical field-dependent resistivity modulation, or reversible electrical field-dependent movement of metal atoms therein.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first interconnect dielectric layer over a substrate and surrounding a first interconnect. A second interconnect dielectric layer is over the first interconnect dielectric layer and surrounds at least a part of a second interconnect. A bottom electrode is over the substrate, a top electrode is over the bottom electrode, and a ferroelectric layer is between the bottom electrode and the top electrode. The ferroelectric layer includes a lower horizontally extending portion, an upper horizontally extending portion arranged above the lower horizontally extending portion, and a vertically extending portion coupling the lower horizontally extending portion and the upper horizontally extending portion. The vertically extending portion extends through the first interconnect dielectric layer and the second interconnect dielectric layer.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip comprising a memory cell with a sidewall spacer, and/or an etch stop layer, doped to reduce charge accumulation at an interface between the sidewall spacer and the etch stop layer. The memory cell comprises a bottom electrode, a data storage element overlying the bottom electrode, and a top electrode overlying the data storage element. The sidewall spacer overlies the bottom electrode on a common sidewall formed by the data storage element and the top electrode, and the etch stop layer lines the sidewall spacer. The sidewall spacer and the etch stop layer directly contact at the interface and form an electric dipole at the interface. The doping to reduce charge accumulation reduces an electric field produced by the electric dipole, thereby reducing the effect of the electric field on the memory cell.

Abstract: Provided are a computer program product, system, and method for applying a code update to a target system from a personal communication device. A code update command is received from a messaging application, executing on the personal communication device of the user, indicating a code update to install on the target system a code update maintained in the target system. The code update command is processed to extract indication of the code update to install and a target system user identifier of the target system on which to install the code update. At least one job is generated to install the code update on the target system. The at least one job is transmitted to the target system to cause the target system to process the at least one job to install the code update.

Abstract: Numerous examples are disclosed of a masking circuit for inputs and outputs in a neural network array. In one example, a system comprises a neural network array comprising a plurality of non-volatile memory cells arranged into rows and columns; and row circuits for respective rows in the neural network array, the row circuits comprising a masking circuit to prevent an application of a sparse input to one or more rows in the array when a condition is satisfied.

Abstract: A physiological monitor has a sensor port configured to attach and communicate with a sensor. A processor board is in communications with the sensor port and has a board digital signal processor (DSP). Firmware residing on the processor board is executable by the board DSP so as to calculate physiological parameters in response to a sensor signal received from the sensor. Upgrade tools are individually attachable to the sensor port in lieu of the sensor so as to designate to the processor board which of the physiological parameters, if any, to calculate when the sensor is attached to the sensor port.

Abstract: There is disclosed fluid distribution junctions and methods of assembly therefor. Flexible conduits connect to the junctions, and a consumable subsystem of the junction, conduits and receptacle caps or other connectors may be pre-assembled for ease of use. A subassembly is formed by coupling a plurality of flexible tubular conduits to a plurality of fluid connectors of a fluid junction, the fluid junction having an inner fluid plenum chamber leading to the fluid connectors. Two shells are sandwiched on opposite sides of the subassembly, the shells having mating concave receiving surfaces that together conform around each of the fluid connectors and clamp the tubular conduits onto the circular beads. Juxtaposed joint surfaces on each pair of mating concave receiving surfaces are bonded together such as with sonic welding to make the fluid distribution junction assembly.

Abstract: A system and method for preventing the double-spending of digital currency that transfers between multiple DLT networks. The system and method includes creating a first digital currency of a first type on the first DLT network stored in a digital wallet, the first digital currency associated with a second digital currency of a second type on a second DLT network, configuring a monitoring agent on the node, the monitoring agent configured to intercept at least one of a function call, a message, or an event on the digital wallet, and locking, responsive to intercepting the at least one of the function call, the message, or the event, the first digital currency onto the first DLT network to prevent a transfer of the first digital currency from the digital wallet on the first DLT network to another DLT network responsive to a subsequent transaction request.

Abstract: A method for providing automated customer feedback monitoring in real-time to facilitate identification and resolution of errors is disclosed. The method includes ingesting, via an application programming interface, data from a source, the data including feedback information from a customer; persisting the data in a file format, the file format including a tabular file format; filtering the persisted data based on a rating and a keyword; identifying a category for the filtered data based on a characteristic of the filtered data; determining whether a log file corresponds to the filtered data based on the identified category, the log file including an error log file that corresponds to an issue, and when the log file corresponds to the filtered data; correlating the filtered data with the determined log file; and determining a priority level for the issue by using the correlated data and the log file.

Abstract: A pill counting device includes a step feeder having moveable slats interleaved with fixed slats. The movable slats are vertically offset from one another and are configured to move vertically between top platforms of adjacent fixed slats to carry pills vertically up the step feeder. A top movable slat orients a subset of the plurality of pills into a row of pills to be fed into a count chamber. A camera configured to capture an image of a pill of the individual pills as it falls through the count chamber. The device further includes a control system configured to control movement of the movable slats and to control capturing of images by the camera. The control system is further configured to calculate a characteristic of the pill from the image, and to increment a pill counter in response to the characteristic of the pill meeting predefined criteria.

Abstract: A direct-current to direct-current (DC-DC) converter circuit is provided. The DC-DC converter circuit is capable of generating a DC output voltage in a defined voltage range based on an input voltage. The DC-DC converter circuit can include a modulator circuit, an output filter circuit, and a compensator circuit. In a non-limiting example, the output filter circuit includes an inductor-capacitor (LC) circuit formed by an inductor and a multi-layer ceramic capacitor (MLCC). Notably, the MLCC can produce a variable capacitance in the defined voltage range due to inherent DC bias instability, thus risking stability of the DC-DC converter circuit. As such, a control circuit is configured to determine a configurable transconductance based on feedback of the output voltage and control the compensator circuit to operate accordingly. As such, it may be possible to mitigate the effect of MLCC capacitance variation, thus helping to maintain stability of the DC-DC converter circuit.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. A first conductive structure overlies a substrate. A second conductive structure overlies the first conductive structure. A data storage structure is disposed between the first and second conductive structures. The data storage structure includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. Respective bandgaps of the first, second, and third dielectric layers are different from one another.

Abstract: Methods and systems are disclosed for modifying an image. For example, a messaging application implemented on a client device displays an image comprising a real-world object and determines a current location of the client device. The messaging application identifies a venue associated with the current location of the client device and obtains a list of items available for purchase at the venue. The messaging application receives input that selects a given item from the list of items that corresponds to the real-world object. The messaging application adds, to the image, a graphical representation of the given item that corresponds to the real-world object depicted in the image.

Abstract: In one example, a method comprises erasing at the same time a word of non-volatile memory cells in an array of non-volatile memory cells arranged into rows and columns, each non-volatile memory cell comprising a word line terminal, a bit line terminal, and an erase gate terminal, by turning on an erase gate enable transistor coupled to erase gate terminals of the word of non-volatile memory cells.

Abstract: A system includes a vehicle event recorder and a modem. The vehicle event recorder is configured to receive a sensor data signal from a sensor that is mounted on a vehicle trailer. The modem is configured to demodulate the sensor data signal to create a modulated sensor data signal. The demodulated sensor data signal is received using a first line. The first line is coupled via a harness to sensor on a vehicle trailer.