Patents by Inventor An-Yi Chen

An-Yi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250103498
    Abstract: A heterogeneous computing system performs data synchronization. The heterogeneous computing system includes a system memory, a cluster, and a processing unit outside the cluster. The cluster includes a sync circuit, inner processors, and a snoop filter. The sync circuit is operative to receive a sync command indicating a sync address range. The sync command is issued by one of the processing unit and the inner processors. The sync circuit further determines whether addresses recorded in the snoop filter fall within the sync address range. In response to a determination that a recorded address falls within the sync address range, the sync circuit notifies a target one of the inner processors that owns a cache line having the recorded address to take a sync action on the cache line.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Inventors: Hsing-Chuang Liu, Yu-Shu Chen, Hong-Yi Chen
  • Publication number: 20250102630
    Abstract: An optical system includes a housing that defines a first aperture and a second aperture different from the first aperture. At least one of the first aperture or the second aperture is defined by a peripheral surface having a plurality of inclined surfaces with respect to a center axis of the first aperture or the second aperture. In some cases, the peripheral surface may define a convex profile, may have a coating or a surface treatment, or may define other edge features that help mitigate optical crosstalk. The optical system may also include an array of light emitters disposed within the housing and configured to emit light through the first aperture and a light detector disposed within the housing and configured to detect a portion of the emitted light that is returned from a target and received through the second aperture.
    Type: Application
    Filed: May 21, 2024
    Publication date: March 27, 2025
    Inventors: Xi Chen, Arifin Arifin, Yi Chen, Xiaoyang Zhang, Qi Huang
  • Publication number: 20250099539
    Abstract: Provided are methods and compositions for inducing cells of the inner ear (for example, cochlear and utricular hair cells) to reenter to cell cycle and to proliferate. More particularly, the invention relates to the use of agents that increase c-myc activity and/or Notch activity for inducing cell cycle reentry and proliferation of cochlear or utricular hair cells and/or cochlear or utricular supporting cells. The methods and compositions can be used to promote the proliferation of hair cells and/or supporting cells to treat a subject at risk of, or affected with, hearing loss or a subject at risk of, or affected with vestibular dysfunction.
    Type: Application
    Filed: October 3, 2024
    Publication date: March 27, 2025
    Inventor: Zheng-Yi Chen
  • Publication number: 20250106960
    Abstract: The present disclosure relates to a lighting device, comprising a device body and a locking device on both of which magnets magnetically attracted to each other are provided respectively; the device body comprises a controller and a detection module connected to each other, the detection module is configured to detect a connection state between the device body and the locking device, and the controller is configured to control the device body to be in a locked state when the connection state is a magnetic connection state.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 27, 2025
    Applicant: Shenzhen Obuy Technology Co., Ltd
    Inventors: Le JIANG, Zhiqiang LUO, Yi CHEN, Hanhao YE
  • Publication number: 20250105019
    Abstract: A method is provided. The method includes: receiving a semiconductor structure having a first material and a second material; performing a first etch on the first material for a first duration under a first etching chemistry; and performing a second etch on the second material for a second duration under a second etching chemistry, wherein the first material includes a first incubation time and the second material includes a second incubation time greater than the first incubation time under the first etching chemistry. The first material includes a third incubation time and the second material includes a fourth incubation time less than the third incubation time under the second etching chemistry.
    Type: Application
    Filed: December 10, 2024
    Publication date: March 27, 2025
    Inventors: HAN-YU LIN, LI-TE LIN, TZE-CHUNG LIN, FANG-WEI LEE, YI-LUN CHEN, JUNG-HAO CHANG, YI-CHEN LO, FO-JU LIN, KENICHI SANO, PINYEN LIN
  • Patent number: 12259660
    Abstract: An inspection method and an inspection platform applicable for inspecting a light source used to expose a substrate. The light source is adapted to form an illuminated area on a surface of the substrate. The inspection method includes the following steps: placing at least one inspection component on the surface of the substrate; causing the at least one inspection component and the illuminated area to have a relative movement and a relative speed in a specific direction so as to make the illuminated area move across the at least one inspection component, wherein in the specific direction, the illuminated area is smaller in size than the at least one inspection component; inspecting photon energy of incident light in the illuminated area by the at least one inspection component during the relative movement; and determining optical values of the light source according to the photon energy and the relative speed.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: March 25, 2025
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Hsien Chen, Shu-Chun Liao, Shau-Wei Hsu, Wei-En Fu, Tsung-Ying Chung, Yi-Chen Chuang
  • Patent number: 12262057
    Abstract: A method for compressing images based on joint photographic experts group (JPEG) standard includes: compressing data of one or more first image blocks with a first compression level to produce compression data of the one or more first image blocks; adjusting the first compression level to obtain a second compression level according to at least one of a data size-related index regarding the compression data of the one or more first image blocks or a transmission-related index regarding transmission of the compression data of the one or more first image blocks; and compressing data of a second image block with the second compression level.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: March 25, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hsu-Jung Tung, Chi-Wang Chai, Weimin Zeng, Yi-Chen Tseng
  • Patent number: 12257612
    Abstract: An apparatus includes a wafer stage and a particle removing assembly. The wafer stage includes a cup adjacent to a wafer chuck. The particle removing assembly is configured to remove contaminant particles from the cup. In some embodiments, the particle removing assembly comprises a flexible ejecting member that includes one or more elongated tubes, a front tip, and a cleaning tip adapter configured to attach the front tip to each of the one or more elongated tubes. The front tip includes front openings and lateral openings from which pressurized cleaning material are introduced onto an unreachable area of the cup to remove the contaminant particles from the cup.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: March 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Hsueh Wu, Fang Yu Kuo, Kai Yu Liu, Yu-Chun Wu, Jau-Sheng Huang, Wei-Yi Chen
  • Publication number: 20250098410
    Abstract: A method for manufacturing an electronic device is provided. The method includes providing a first substrate. The method further includes forming a bank layer on the first substrate. The bank layer includes a bank wall and a first opening, and the first opening adjacent to the bank wall. The method further includes forming a light conversion layer in the first opening. The method further includes forming a spacer on the bank wall. The method further includes providing a second substrate. The method further includes transferring a plurality of electronic units to the second substrate. The method further includes overlapping the first substrate and second substrate, so that the spacer is located between the first substrate and the second substrate.
    Type: Application
    Filed: August 15, 2024
    Publication date: March 20, 2025
    Inventors: Chih-Ming LIANG, Yi-An CHEN, Feng-Yu LIN, Chiung-Chieh KUO
  • Publication number: 20250098276
    Abstract: Methods for forming a semiconductor device structure are described. The method includes forming first and second fin structures over a substrate and forming a dielectric wall between the first and second fin structures. The forming the dielectric wall includes depositing a first dielectric layer between the first and second fin structures, and a seam is formed in the first dielectric layer. The forming the dielectric wall further includes performing an anisotropic etch process to remove a portion of the first dielectric layer to expose the seam, performing an isotropic etch process to enlarge an opening of the seam, and the seam has a “V” shaped cross-sectional profile. The forming the dielectric wall further includes depositing a second dielectric layer between the first and second fin structures, and the seam is filled. The method further includes forming shallow trench isolation regions adjacent the first and second fin structures.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Inventors: Kai-Chun CHANG, Chi-Hsun LIN, Yi Chen HO, Hung Cheng LIN
  • Publication number: 20250096043
    Abstract: A semiconductor device includes a channel structure, a first gate structure straddling the channel structure, and an epitaxial structure. The epitaxial structure is adjacent to the first gate structure and is coupled to an end of the channel structure. The semiconductor device further includes a first contact structure disposed over and in contact with the epitaxial structure and a nitride-based conformal layer extending at least over the first contact structure. The semiconductor device further includes an oxide-based layer disposed over the nitride-based conformal layer. A portion of the nitride-based conformal layer, disposed over the first contact structure, has a dip that is filled with a first portion of the oxide-based layer.
    Type: Application
    Filed: December 4, 2024
    Publication date: March 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Te-Chih Hsiung, Yi-Chen Wang, Guang-Hong Cheng, Wen Wang, Yuan-Tien Tu, Huan-Just Lin
  • Publication number: 20250098261
    Abstract: Semiconductor structures and methods of forming the same are provided. In an embodiment, an exemplary method includes depositing a dummy gate material layer over a first fin-shaped active region, patterning the dummy gate material layer to form a dummy gate electrode, wherein the dummy gate electrode has a footing feature at an interface between the first fin-shaped active region and the dummy gate electrode, oxidizing the footing feature and a sidewall portion of the dummy gate electrode to form a dielectric gate spacer, and replacing a remaining portion of the dummy gate electrode with a gate structure.
    Type: Application
    Filed: January 27, 2024
    Publication date: March 20, 2025
    Inventors: Yi-Hong Wang, Hui-Hsuan Kung, Yao-Zhong Dong, Yi-Li Huang, Yi-Chen Li
  • Patent number: 12254928
    Abstract: An operation method for a memory device is provided. A memory block of the memory device includes an array of memory cells including cell strings and cell pages. Serially numbered and arranged bit lines are connected to the cell strings, respectively. Serially numbered and arranged word lines are connected to the cell pages, respectively. The operation method includes: performing a batch writing to each of the cell pages, such that the memory cells in each cell page are respectively grouped as an earlier written memory cell or a later written memory cell, depending on the connected bit line is either even-numbered or odd-numbered. Each cell page has a respective write sequence. In terms of write sequence, each cell page is identical with one of 2 nearest cell pages, and opposite to the other of the 2 nearest cell pages.
    Type: Grant
    Filed: May 3, 2023
    Date of Patent: March 18, 2025
    Assignee: Winbond Electronics Corp.
    Inventors: Yi-Chen Fan, Chieh-Yen Wang
  • Publication number: 20250089364
    Abstract: A integrated circuit includes a first, a second, a third, and a fourth gate, a first input pin and a first conductor. The first and third gate are on a first level. The second and fourth gate are on a second level. The second gate is coupled to the first gate. The fourth gate is coupled to the third gate. The first input pin extends in a second direction, is on a first metal layer above a front-side of a substrate, is coupled to the first gate, and configured to receive a first input signal. The first input pin is electrically coupled to the third gate by the first, second or fourth gate. The first conductor extends in the first direction, is on a second metal layer below a back-side of the substrate, and is coupled to the second and fourth gate.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 13, 2025
    Inventors: Cheng-Ling WU, Chih-Liang CHEN, Chi-Yu LU, Yi-Yi CHEN, Ting-Yun WU
  • Patent number: 12250345
    Abstract: Systems and methods are provided for centralized validation of potential network calls, such as calls proposing database transactions, on a distributed system. The distributed system may include multiple systems that apply independent criteria for validating proposals, which criteria may not be available external to the individual systems. Moreover, the systems may lack an ability to validate proposals prior to submitting such proposals for commitment. A centralized network call parameter validation system as disclosed herein may validate potential network calls with high confidence by applying probability models of data pattern and hashing digit checksum to potential network call parameter values, which models are generated based on statistical analysis of historical network call values.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: March 11, 2025
    Assignee: Accelitas, Inc.
    Inventors: Yi Chen, Gregory Morris Cote, Stephen Krawczyk, Philip George Quick
  • Publication number: 20250080951
    Abstract: An object tracking system and an object tracking method are provided. The object tracking system includes a transmitter, a receiver and at least one processing circuit. The transmitter is configured to transmit wireless signals through a target space. The receiver is configured to receive the wireless signals. The at least one processing circuit is configured to perform following processes: obtaining the wireless signals received by the receiver; generating motion information associated with at least one target object by executing a motion machine-learning model that processes the received wireless signals; and generating three-dimensional tracking information of the at least one target object with respect to the target space by fusing spatial information of the target space and the motion information.
    Type: Application
    Filed: September 3, 2024
    Publication date: March 6, 2025
    Inventors: YI-AN CHEN, LEE AING, I-HSUAN HSIEH, HOREN CHEN
  • Publication number: 20250078147
    Abstract: The application discloses a data interaction method and apparatus, electronic device and storage medium. The method includes: in response to a triggering operation on collection controls correspondingly associated with at least two articles, adding the at least two articles to a collection list, the collection controls being displayed on a video playing page; in response to a triggering operation of entering the collection list, starting a terminal camera, so as to enter a try-on page, a user target part shot by the camera being displayed in the try-on page; and in response to a first triggering operation on a try-on control associated with a first article, wearing a first model of the first article on the target part, wherein the try-on control is displayed in the try-on page, and the first triggering operation is used for determining to select the first article from the at least two articles.
    Type: Application
    Filed: August 23, 2022
    Publication date: March 6, 2025
    Inventors: Yepeng CHEN, Yi CHEN, Chao ZHOU, Yipeng HAO, Ang LIU
  • Publication number: 20250079492
    Abstract: A plant microbial fuel cell includes a planting container, a plant, a cathode and an anode. The planting container has a culture medium therein, and a microbial population is in the culture medium. The plant is grown in the culture medium in the planting container. The cathode is disposed on a surface of the culture medium, and the anode is arranged in the culture medium close to roots of the plant. The anode includes a porous carbon material prepared from coffee grounds, and thus the overall cost of the plant microbial fuel cell may be greatly reduced, and the porous carbon material is easy to process and has high biocompatibility.
    Type: Application
    Filed: October 19, 2023
    Publication date: March 6, 2025
    Applicant: National Tsing Hua University
    Inventors: Yao-Yu Lin, Hsin-Tien Li, Heng-An Su, Tzu-Yin Liu, Han-Yi Chen
  • Publication number: 20250073296
    Abstract: A Chinese herbal medicine extract, a method for preparing the same, and a use of the same are disclosed. The Chinese herbal medicine extract includes an active ingredient, which contains any one of or any combination of agarwood, Chinese honeylocust fruit, Chinese honeylocust spine, cinnamon leaf, and camphor leaf. Medication based on the Chinese herbal medicine extract is useful in treating coronavirus-related symptoms or diseases.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 6, 2025
    Applicant: CHI DON BIOTECHNOLOGY CO.,LTD.
    Inventors: MING-TANG TSENG, SHU-CHING WEN, HSIAO-CHUN TSENG, SHIH-CHANG HSU, KUO-HO WEN, TZU-HAO TSENG, YI-CHEN WANG, JIN-KUEI WONG, TZA-ZEN CHAUNG, SHAU-KU HUANG
  • Patent number: D1066709
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 11, 2025
    Inventors: Patric Moammer, Adrian Berr, Lucas Lehman, Seung Keun Kim, Johanna Königsberger, Yi Chen Lien, Chenchen Fan, Jang Kyung Jo, Sanae Wilson, Matthias Hecker