Patents by Inventor Anand Kumar

Anand Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • A HYDRODYNAMIC BEARING, AN X-RAY TUBE, AN X-RAY SYSTEM, AND A METHOD FOR MANUFACTURING A HYDRODYNAMIC BEARING,
    Publication number: 20170097049
    Abstract: The present invention relates to hydrodynamic bearings, X-ray tubes, X-ray systems, and a method of manufacturing a hydrodynamic bearing for an X-ray tube. The rotor of a hydrodynamic bearing is supported, in steady-state operation, by the pressure of lubricant which is pumped through grooves in the rotor. When the rotor is speeding up or slowing down, the pumping force will not be sufficient to lift the rotor clear of a stationary bushing, and damage, caused by direct contact of the metal surfaces of the bearing, can occur. Providing special coatings on the bearing surfaces can ameliorate this effect.
    Type: Application
    Filed: April 1, 2015
    Publication date: April 6, 2017
    Inventors: PETER KLAUS BACHMAAN, ANAND KUMAR DOKANIA, WILHELMUS CORNELIS KEUR, GEREON VOGTMEIER, WILLEM POTZE, CHRISTIAN HERBERT BLOME
  • Methods, Systems, and Products for Address Translation
    Publication number: 20170085524
    Abstract: Methods, systems, and products translate addresses in networks. A residential gateway translates requests for content such that the residential gateway appears as both a requestor and a destination for requested content, regardless of an actual requesting device or a desired output device.
    Type: Application
    Filed: November 11, 2016
    Publication date: March 23, 2017
    Applicant: AT&T Intellectual Property I, L.P.
    Inventors: Jayanta Das, Bhavin A. Doshi, Anand Kumar Singh, Saurabh Kumar
  • Movement state information calculation method and movement state information calculation device
    Patent number: 9599475
    Abstract: A traveling direction velocity calculation device 1 calculates a posture of an acceleration sensor 10 with respect to a user, using a detection result represented in a local coordinate system associated with the acceleration sensor 10, detecting acceleration, which is worn on a user's body, when a change in the detection result of the acceleration sensor 10 satisfies a predetermined specific condition. The detection result of the acceleration sensor 10 at a time different from that when the posture is calculated and at a time when the specific condition is satisfied is transformed, using the calculated posture, to a mobile body coordinate system associated with a user. A velocity in a traveling direction of the user is calculated using the transformed detection result.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: March 21, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Akinobu Sato, Shunichi Mizuochi, Shuji Uchida, Anand Kumar
  • Computer implemented system and method of instrumentation for software applications
    Patent number: 9588869
    Abstract: A method(s) and system(s) of monitoring and logging of various identified events of the operating system or the software application hosted on the operating system is disclosed. The method includes configuring the events associated with at least one event handler for monitoring. The method further includes assigning the at least one event handler to active processes of an operating system for handling of the events. Further, the method includes capturing of events by a different daemons and collecting the captured events. To this end, the captured similar events are grouped in one or more groups. The method further includes filtering of collected events based on a definable filter configuration and generating a dashboard representation of the filtered events. The dashboard representations of filtered events are then reported to the user.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: March 7, 2017
    Assignee: TATA CONSULTANCY SERVICES LTD.
    Inventors: Anand Kumar, Vinay Kulkarni
  • Methods, systems, and products for address translation
    Patent number: 9521111
    Abstract: Methods, systems, and products translate addresses in residential networks. A residential gateway translates requests for content such that the residential gateway appears as both a requestor and a destination for requested content, regardless of an actual requesting device or a desired output device.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: December 13, 2016
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventors: Jayanta Das, Bhavin A. Doshi, Anand Kumar Singh, Saurabh Kumar
  • PROCESS FOR PREPARING AMORPHOUS CABAZITAXEL
    Publication number: 20160340327
    Abstract: The present invention provides a process for preparing amorphous Cabazitaxel from the solvate form of Cabazitaxel. The present invention also provides novel diisopropyl ether solvate form of Cabazitaxel (I), and process for preparation thereof. Said amorphous Cabazitaxel and crystalline diisopropyl ether solvate of Cabazitaxel of the present invention can be utilized in preparing the pharmaceutical composition/s useful in the treatment of cancer.
    Type: Application
    Filed: June 18, 2016
    Publication date: November 24, 2016
    Applicant: SHILPA MEDICARE LIMITED
    Inventors: SRIRAM RAMPALLI, PRASHANT PUROHIT, PRADEEP POTHANA, ANAND KUMAR DUNGA, AKSHAY KANT CHATURVEDI
  • Object Boundary Detection in an Image
    Publication number: 20160343142
    Abstract: Object boundary detection techniques are described. In implementations, edges of an object displayed in an image are detected. The image is used to generate a gradient image and a monochrome image. Directional filters are applied to the monochrome image to generate directionally filtered images, which are then applied to the gradient image to identify potential boundary lines of the object displayed in the image. A selection can then be made from the potential boundary lines, based on a score associated with each respective potential boundary line, to select lines to represent the boundaries of the object. The selected lines can be used to segment the image into a plurality of segments, and then, using the average color of each segment, one or more of the selected lines can be invalidated as being a false boundary.
    Type: Application
    Filed: May 20, 2015
    Publication date: November 24, 2016
    Inventors: Abhijeet Gaiha, Ram Bhushan Agrawal, Anand Kumar
  • Attitude determination method, position calculation method, and attitude determination device
    Patent number: 9494428
    Abstract: A new method for determining an attitude of a sensor with respect to a moving body is proposed. A movement vector is measured by a sensor mounted in the moving body. In addition, the attitude of the sensor with respect to the moving body is determined using the movement vector measured by the sensor when the moving body starts to move.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: November 15, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Shunichi Mizuochi, Anand Kumar, Akinobu Sato, Kenji Onda, Rama Sanjay
  • Controlling voltage generation and voltage comparison
    Patent number: 9496785
    Abstract: An integrated circuit has voltage generating circuitry for generating an on-chip voltage from a supply voltage in response to clock pulses. Clock control circuitry controls transmission of the clock pulses to the voltage generating circuitry. The clock control circuitry receives a reference voltage and a digital offset value comprising a binary numeric value identifying an offset. The clock control circuitry suppresses transmission of the clock pulses if the on-chip voltage is greater than the sum of the reference voltage and the offset identified by the digital offset value, to reduce power consumption. The offset can be tuned digitally to vary the average level of the on-chip voltage. A similar digital tuning mechanism may be used in a clocked comparator to compare a first voltage with a digitally tunable threshold voltage.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: November 15, 2016
    Assignee: ARM Limited
    Inventors: Parameshwarappa Anand Kumar Savanth, James Edward Myers, David Walter Flynn, Bal S. Sandhu
  • Phase-locked loop with frequency bounding circuit
    Patent number: 9490824
    Abstract: A phase-locked loop (PLL) for generating an oscillating signal includes a frequency bounding circuit. When a frequency of the oscillating signal is greater than a first threshold value, which is greater than a maximum normal operational frequency of the PLL, the frequency bounding circuit forces a charge pump to discharge a loop filter until the oscillating signal frequency is less than a second threshold value that is within the normal operational frequency range of the PLL. When the frequency of the oscillating signal is less than a third threshold value, which is less than a minimum normal operational frequency of the PLL, the frequency bounding circuit forces the charge pump to charge the loop filter until the oscillating signal frequency is greater than a fourth threshold value that is within the normal operational frequency range of the PLL.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: November 8, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Devesh P. Singh, Firas N. Abughazaleh, Anand Kumar Sinha, Sanjay K. Wadhwa
  • Object boundary detection in an image
    Patent number: 9483834
    Abstract: Object boundary detection techniques are described. In implementations, edges of an object displayed in an image are detected. The image is used to generate a gradient image and a monochrome image. Directional filters are applied to the monochrome image to generate directionally filtered images, which are then applied the gradient image to identify potential boundary lines of the object displayed in the image. A selection can then be made from the potential boundary lines, based on a score associated with each respective potential boundary line, to select lines to represent the boundaries of the object. The selected lines can be used to segment the image into a plurality of segments, and then, using the average color of each segment, one or more of the selected lines can be invalidated as being a false boundary.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: November 1, 2016
    Assignee: Adobe Systems Incorporated
    Inventors: Abhijeet Gaiha, Ram Bhushan Agrawal, Anand Kumar
  • Automatic configuration of a repeater
    Patent number: 9455867
    Abstract: Embodiments of the present disclosure provide an in-band process to inform an external repeater of a desired new configuration or mode of operation. After negotiation of rate and other information during an auto-negotiation routine, a network node sends configuration information to a network element, such as an external network repeater.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: September 27, 2016
    Assignee: BROADCOM CORPORATION
    Inventors: Magesh Valliappan, Sameer Kanhaiyalal Shah, Sundararajan Chidambara, Anand Kumar Pathak
  • Clock glitch and loss detection circuit
    Patent number: 9413346
    Abstract: A conversion circuit measures individual period lengths for periods of a clock signal. Two of the measured period lengths are selected and compared. The comparison operates to compare a first period length against a threshold set as a function of the second period length. The result of the comparison is indicative of the presence of a clock error. If the threshold is set less than the second period length, the comparison functions to detect a clock glitch. If the threshold is set more than the second period, the comparison functions to detect a loss of clock. The result of the comparison may be used to control further handling of the clock signal by, for example, blocking logic state changes in the clock signal for the length of one period in response to the detection of the clock error.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: August 9, 2016
    Assignee: STMicroelectronics International N.V.
    Inventor: Anand Kumar
  • Clock generator circuit
    Patent number: 9362894
    Abstract: A clock generator includes a diagnostic circuit that includes first and second muxes, first and second comparators, a logic gate, and a counter. The first mux receives first and second voltage signals and outputs a first intermediate signal based on a control signal. The second mux receives third and fourth voltage signals and outputs a second intermediate signal based on the control signal. The first and second comparators compare the intermediate signals with a first signal that is indicative of a DC value of the clock signal for generating first and second comparison signals. The logic gate receives the first and second intermediate signals and generates a control signal. The counter receives the clock signal and the control signal and generates a clock ready signal that is indicative of stability and quality of the clock signal.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Ateet Omer, Deependra K. Jain, Anand Kumar Sinha, Krishna Thakur
  • MOVEMENT STATE INFORMATION CALCULATION METHOD AND MOVEMENT STATE INFORMATION CALCULATION DEVICE
    Publication number: 20160146610
    Abstract: A traveling direction velocity calculation device 1 calculates a posture of an acceleration sensor 10 with respect to a user, using a detection result represented in a local coordinate system associated with the acceleration sensor 10, detecting acceleration, which is worn on a user's body, when a change in the detection result of the acceleration sensor 10 satisfies a predetermined specific condition. The detection result of the acceleration sensor 10 at a time different from that when the posture is calculated and at a time when the specific condition is satisfied is transformed, using the calculated posture, to a mobile body coordinate system associated with a user. A velocity in a traveling direction of the user is calculated using the transformed detection result.
    Type: Application
    Filed: March 17, 2014
    Publication date: May 26, 2016
    Inventors: Akinobu SATO, Shunichi MIZUOCHI, Shuji UCHIDA, Anand KUMAR
  • Buffer circuit for voltage controlled oscillator
    Patent number: 9337818
    Abstract: A buffer circuit includes an inverter and a level-shifter. The inverter receives a first oscillating signal at a first voltage level and generates an inverted version of the first oscillating signal at a second voltage level. The level-shifter receives a second oscillating signal at a third voltage level, which has a phase difference from the first oscillating signal, and the inverted first oscillating signal, and generates a buffer output signal at a fourth voltage level.
    Type: Grant
    Filed: August 23, 2015
    Date of Patent: May 10, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Krishna Thakur, Deependra K. Jain, Devesh P. Singh, Anand Kumar Sinha, Avinash Chandra Tripathi
  • Controlling Voltage Generation and Voltage Comparison
    Publication number: 20160118882
    Abstract: An integrated circuit has voltage generating circuitry for generating an on-chip voltage from a supply voltage in response to clock pulses. Clock control circuitry controls transmission of the clock pulses to the voltage generating circuitry. The clock control circuitry receives a reference voltage and a digital offset value comprising a binary numeric value identifying an offset. The clock control circuitry suppresses transmission of the clock pulses if the on-chip voltage is greater than the sum of the reference voltage and the offset identified by the digital offset value, to reduce power consumption. The offset can be tuned digitally to vary the average level of the on-chip voltage. A similar digital tuning mechanism may be used in a clocked comparator to compare a first voltage with a digitally tunable threshold voltage.
    Type: Application
    Filed: October 26, 2015
    Publication date: April 28, 2016
    Inventors: Parameshwarappa Anand Kumar SAVANTH, James Edward MYERS, David Walter FLYNN, Bal S. SANDHU
  • Phase locked loop (PLL) circuit with compensated bandwidth across process, voltage and temperature
    Patent number: 9325324
    Abstract: A phase locked loop (PLL) circuit includes a phase comparison circuit configured to compare phase of an input signal to phase of a feedback signal and generate a control signal responsive to the phase comparison and an oscillator circuit configured to generate an output signal at a frequency set by said control signal, where said feedback signal is derived from said output signal. The PLL circuit further operates in a calibration mode of operation wherein the oscillator circuit operates in a frequency locked loop mode to compare frequency of the input signal to frequency of the output signal and center a gain of the oscillator circuit across process, voltage and temperature in response to the frequency comparison. Furthermore, bias current for a charge pump within the phase comparison circuit is calibrated during calibration mode of operation to match a temperature independent reference current.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: April 26, 2016
    Assignee: STMicroelectronics International N.V.
    Inventors: Nitin Gupta, Anand Kumar, Abhirup Lahiri
  • DUAL GATE FD-SOI TRANSISTOR
    Publication number: 20160111534
    Abstract: Circuit module designs that incorporate dual gate field effect transistors are implemented with fully depleted silicon-on-insulator (FD-SOI) technology. Lowering the threshold voltages of the transistors can be accomplished through dynamic secondary gate control in which a back-biasing technique is used to operate the dual gate FD-SOI transistors with enhanced switching performance. Consequently, such transistors can operate at very low core voltage supply levels, down to as low as about 0.4 V, which allows the transistors to respond quickly and to switch at higher speeds. Performance improvements are shown in circuit simulations of an inverter, an amplifier, a level shifter, and a voltage detection circuit module.
    Type: Application
    Filed: December 30, 2015
    Publication date: April 21, 2016
    Inventors: Anand KUMAR, Ankit AGRAWAL
  • Mobile classifieds search
    Patent number: 9317871
    Abstract: A classified ads server receives a search query from a mobile device operated by a user. The search query is parsed and a plurality of tokens is extracted from the search query. A query classification is determined based on the query, using a domain index, and query response candidates are selected from a content index based on the search query tokens and the query classification. A relevance score is generated for each of the query response candidates, and a classified ad is selected based on the relevance scores. The classified ad is sent to the user device.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: April 19, 2016
    Assignee: vMobo, Inc.
    Inventors: Yan Or, Anand Kumar Sankaran, Madhu Gopinathan, Vinu Sundaresan