Abstract: The invention describes process for demetallation of vegetable oils and animal fats to reduce metal content below 1 ppm to make them suitable for hydroprocessing feedstocks. The process comprises acid treatment with very low concentration of acids, utilizing synergistic effect of phosphoric acid and citric acid, followed by counter-current treatment with clay without intermediate step of water washing and treatment with ion exchange resin.

Abstract: A relaxation oscillator for generating an output clock signal includes an RC circuit, a self-biased comparator stage, and a logic circuit. The RC circuit generates first and second comparator input signals that are provided to the self-biased comparator stage. The self-biased comparator stage includes first and second input stages and a voltage reference circuit. Each of the first and second input stages in conjunction with the voltage reference circuit forms a comparator, i.e., first and second comparators corresponding to the first and second input stages, respectively. The self-biased comparator stage generates first and second comparator output signals, based on the first and second comparator input signals. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.

Abstract: To suggest a technique of more accurately calculating a position using both measurement results of a satellite positioning unit and an inertial positioning unit. In a position calculating device (1), a first operational process of calculating at least a position of a moving object using the measurement result of an inertial positioning unit (2) disposed in the moving object is performed by a first operation processing unit (5). A second operational process of calculating the position of the moving object using the result of the first operational process and the measurement result of a satellite positioning unit (3) disposed in the moving object is performed by a second operation processing unit (7). An operational coefficient of the first operational process is adjusted using the result of the first operational process and the result of the second operational process by an operational coefficient adjusting unit (9).

Abstract: A relaxation oscillator for generating an output clock signal includes an RC circuit, a self-biased comparator stage, and a logic circuit. The RC circuit generates first and second comparator input signals that are provided to the self-biased comparator stage. The self-biased comparator stage includes first and second input stages and a voltage reference circuit. Each of the first and second input stages in conjunction with the voltage reference circuit forms a comparator, i.e., first and second comparators corresponding to the first and second input stages, respectively. The self-biased comparator stage generates first and second comparator output signals, based on the first and second comparator input signals. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.

Abstract: A capacitor charging circuit has input, output and control nodes, first and second series connected primary FETs, and first and second leakage current reduction FETs. All of the FETs have their gates coupled to the control node. The first primary FET is coupled between the input and output nodes, and the second primary FET is coupled between the output node and a leakage current reduction node. The first leakage current reduction FET is coupled between a supply line and the leakage current reduction node, and the second leakage current reduction FET is coupled between the leakage current reduction node and ground. When a control signal at the control node is low, the first primary FET and the first leakage current reduction FET are conductive, and the second primary FET and the second leakage current reduction FET are non-conductive, which eliminates sub-threshold leakage current flowing through the second primary FET.

Abstract: A satellite signal tracking method includes: detecting a situation of movement; calculating an error of the detection; and setting a loop bandwidth of a tracking filter, which is used to track a satellite signal received from a positioning satellite and of which the loop bandwidth can be changed, using the detection result and the calculated error.

Abstract: A method of calculating the position of a moving body includes: detecting a movement direction of the moving body; calculating a velocity vector of the moving body using a detection result of an acceleration sensor installed in the moving body; correcting the velocity vector using the movement direction; and calculating the position of the moving body using the corrected velocity vector.

Abstract: A relaxation oscillator for generating an output clock signal includes a RC circuit, a bias generation stage, first and second comparator stages, and a logic circuit. The RC circuit generates first and second comparator input signals that are transmitted to the first and second comparator stages. The bias generation stage generates first and second bias voltages that are provided to each of the first and second comparator stages. The first and second comparator stages generate first and second comparator output signals, respectively, based on the first and second comparator input signals and the first and second bias voltages. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.

Abstract: The present invention provides a bio-augmentation composition for improving the hydrocarbon degradation efficiency of effluent treatment plant for hydrocarbon degradation in wastewater generated from hydrocarbon processing industry and a method thereof. The composition comprises a synergistic combination of selective microorganisms to develop a consortium enabling effective degradation of hydrocarbons present in wastewater and converting thereof into harmless and environment friendly substances. The invention also provides for the said microorganisms and their isolations.

Abstract: A relaxation oscillator for generating an output clock signal includes a RC circuit, a bias generation stage, first and second comparator stages, and a logic circuit. The RC circuit generates first and second comparator input signals that are transmitted to the first and second comparator stages. The bias generation stage generates first and second bias voltages that are provided to each of the first and second comparator stages. The first and second comparator stages generate first and second comparator output signals, respectively, based on the first and second comparator input signals and the first and second bias voltages. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.

Abstract: An integrated circuit and method are provided for controlling variation in the voltage output from on-chip voltage generation circuitry. The integrated circuit comprises voltage generation circuitry configured to operate from a supplied input voltage and to generate at an output node an on-chip voltage supply different to the supplied input voltage. A circuit block is then arranged to receive the on-chip voltage supply generated by the voltage generation circuitry, during operation of the circuit block the circuit block presenting a varying load on the output node. Oscillation circuitry is also coupled to the output node to provide an additional load on the output node, and is configured to produce an oscillation signal whose frequency varies as the value of the on-chip voltage supply varies. Control circuitry is configured to be responsive to a trigger condition to adjust the additional load provided on the output node by the oscillation circuitry.

Abstract: A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.

Abstract: An integrated circuit and method are provided for controlling variation in the voltage output from on-chip voltage generation circuitry. The integrated circuit comprises voltage generation circuitry configured to operate from a supplied input voltage and to generate at an output node an on-chip voltage supply different to the supplied input voltage. A circuit block is then arranged to receive the on-chip voltage supply generated by the voltage generation circuitry, during operation of the circuit block the circuit block presenting a varying load on the output node. Oscillation circuitry is also coupled to the output node to provide an additional load on the output node, and is configured to produce an oscillation signal whose frequency varies as the value of the on-chip voltage supply varies. Control circuitry is configured to be responsive to a trigger condition to adjust the additional load provided on the output node by the oscillation circuitry.

Abstract: A system and method for providing a phase-locked loop that reduces the effects of jitter caused by thermal noise of a resistor in a low-pass filter in the PLL. Thermal noise from various electronic components may cause unwanted jitter is a PLL. The size of various components in the filter are typically set to specific sizes to realize a transfer function suited for loop stability and reduction in phase jitter. In one embodiment, the jitter due to thermal noise in the resistor may be reduced by reducing the size of the gain affecting the signal through this resistor. By adjusting the size of the resistor by a scaling factor as well as other components in the PLL, one may then control a voltage controlled oscillator (VCO) using two or more control signals through the LPF.

Abstract: A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.

Abstract: A new method for determining an attitude of a sensor with respect to a moving body is proposed. A movement vector is measured by a sensor mounted in the moving body. In addition, the attitude of the sensor with respect to the moving body is determined using the movement vector measured by the sensor when the moving body starts to move.

Abstract: The present invention relates to a novel process for desulfurization of diesel with reduced hydrogen consumption. More particularly the subject invention pertains to an integrated process comprising diesel hydro de-sulfurisation (DHDS) or diesel hydrotreatment (DHDT) with reduced severity to desulfurize high sulfur (1.0-2.0 wt %) diesel stream to a much lower level of sulfur content of 350-500 ppm in the depleted diesel stream, followed by a novel adsorption procedure for effecting deep desulfurization to reduce overall sulfur content to less than 10 ppm with reduced hydrogen consumption, as compared to high severity DHDS or DHDT procedures of the prior art.

Abstract: Disclosed herein a process for upgrading the liquid hydrocarbon fuels by reducing aromatic content, sulfur content and nitrogen content wherein the process comprising isolating polycyclic aromatic hydrocarbon (PAH) transforming microbes and preparing biocatalyst by mutagenesis, contacting the biocatalyst with the liquid hydrocarbon fuel in an aqueous medium for transforming the aromatic, sulfur, and nitrogen containing compounds to polar substances, subjecting the mixture of biocatalyst and the liquid hydrocarbon fuel to a process of bioconversion, removing the polar substances by liquid-liquid extraction with a polar solvent to obtain dearomatized, desulphurised and denitrogenated liquid hydrocarbon fuel and recovering the upgraded liquid hydrocarbon fuel.

Abstract: The invention describes process for demetallation of vegetable oils and animal fats to reduce metal content below 1 ppm to make them suitable for hydroprocessing feedstocks. The process comprises acid treatment with very low concentration of acids, utilizing synergistic effect of phosphoric acid and citric acid, followed by counter-current treatment with clay without intermediate step of water washing and treatment with ion exchange resin.

Abstract: A slave device has an input/output adapted for connection to a serial data line of an I2C bus configuration, a clock input adapted for connection to a serial clock line of the I2C bus configuration, and an interrupt input adapted for connection to the serial clock line of the I2C bus configuration. The slave device senses transitions on the serial clock line through the interrupt input to trigger capturing of a command code on serial data line through the input output. In response to receipt of the command code, the slave device controls the serial data line through the input/output to send an acknowledgement of receipt of the command code. However, if the captured command code is not recognized the slave device inhibits sending of the acknowledgement of the command code. The pull up connection on the serial data line of the I2C bus configuration will, when the slave device is inhibited from acknowledging, produce a high logic state indicative of a no acknowledgement.