Patents by Inventor Ananda H. Kumar

Ananda H. Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9698176
    Abstract: Displays can be fabricated using driver transistors formed with high quality semiconductor channel materials, and switching transistors formed with low quality semiconductor channel materials. The driver transistors can require high forward current to drive emission of the OLED pixels, but might not require very low leakage current. The switching transistors can require low leakage current to allow the pixel capacitor to retain the signal level for accurate OLED device emission, preventing abnormal displays or cross talks.
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: July 4, 2017
    Inventors: Ananda H. Kumar, Srinivas H. Kumar, Tue Nguyen
  • Publication number: 20170162388
    Abstract: Large grain polysilicon films can be exfoliated on a handle substrate, such as a glass or glass-ceramic substrate. The large grain polysilicon can have high mobility for device formation, and can be used for backplane of a display or a sensor array for x-ray detection.
    Type: Application
    Filed: December 2, 2016
    Publication date: June 8, 2017
    Inventors: Ananda H. Kumar, Srinivas H. Kumar, Tue Nguyen
  • Patent number: 9671429
    Abstract: Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that (1) partially coats the surface of the structure, (2) completely coats the surface of the structure, and/or (3) completely coats the surface of structural material of each layer from which the structure is formed including interlayer regions. These embodiments incorporate both the core material and the shell material into the structure as each layer is formed along with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a material that would be removed with sacrificial material if it were accessible by an etchant during removal of the sacrificial material.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: June 6, 2017
    Assignee: University of Southern California
    Inventors: Ming Ting Wu, Rulon J. Larsen, III, Young Kim, Kieun Kim, Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard, Dennis R. Smalley
  • Patent number: 9567687
    Abstract: Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: February 14, 2017
    Assignee: University of Southern California
    Inventors: Gang Zhang, Adam L. Cohen, Michael S. Lockard, Ananda H. Kumar, Ezekiel J. J. Kruglick, Kieun Kim
  • Patent number: 9540233
    Abstract: Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: January 10, 2017
    Assignee: Microfabrica Inc.
    Inventors: Ananda H. Kumar, Jorge S. Albarran, Adam L. Cohen, Kieun Kim, Michael S. Lockard, Uri Frodis, Dennis R. Smalley
  • Patent number: 9531015
    Abstract: A seal composition includes a first alkaline earth metal oxide, a second alkaline earth metal oxide which is different from the first alkaline earth metal oxide, aluminum oxide, and silica in an amount such that molar percent of silica in the composition is at least five molar percent greater than two times a combined molar percent of the first alkaline earth metal oxide and the second alkaline earth metal oxide. The composition is substantially free of boron oxide and phosphorus oxide. The seal composition forms a glass ceramic seal which includes silica containing glass cores located in a crystalline matrix comprising barium aluminosilicate, and calcium aluminosilicate crystals located in the glass cores.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: December 27, 2016
    Assignee: BLOOM ENERGY CORPORATION
    Inventors: Ananda H. Kumar, Dien Nguyen, Martin Janousek, Tad Armstrong
  • Patent number: 9466758
    Abstract: Composite substrates include a single crystal silicon layer disposed on a ceramic layer, including a transparent glass layer. Combination of single crystal devices and non-single crystal devices can be fabricated on a ceramic substrate.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 11, 2016
    Inventors: Ananda H. Kumar, Tue Nguyen
  • Publication number: 20160258075
    Abstract: Electrochemical fabrication processes and apparatus for producing multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers including operations for providing coatings of dielectric material that isolate at least portions of a first conductive material from (1) other portions of the first conductive material, (2) a second conductive material, or (3) another dielectric material, and wherein the thickness of the dielectric coatings are thin compared to the thicknesses of the layers used in forming the structures. In some preferred embodiments, portions of each individual layer are encapsulated by dielectric material while in other embodiments only boundaries between distinct regions of materials are isolated from one another by dielectric barriers.
    Type: Application
    Filed: April 5, 2016
    Publication date: September 8, 2016
    Applicant: Microfabrica Inc.
    Inventors: Dennis R. Smalley, Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard
  • Publication number: 20160254146
    Abstract: This document describes the fabrication and use of ceramic stabilizing layer fabricated right on the product silicon wafer to facilitate its use as a substrate for fabrication of gallium nitride films. A ceramic layer is formed and then attached to a single crystal silicon substrate to form a composite silicon substrate that has coefficient of thermal expansion comparable with GaN. The composite silicon substrates prepared by this invention are uniquely suited for use as growth substrates for crack-free gallium nitride films, benefitting from compressive stresses produced by choosing a ceramic having a desired higher coefficient thermal expansion than those of silicon and gallium nitride.
    Type: Application
    Filed: May 9, 2016
    Publication date: September 1, 2016
    Inventor: Ananda H. Kumar
  • Publication number: 20160231356
    Abstract: Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions.
    Type: Application
    Filed: December 31, 2015
    Publication date: August 11, 2016
    Inventors: Ming Ting Wu, Rulon J. Larsen, III, Young Kim, Kieun Kim, Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard, Dennis R. Smalley
  • Publication number: 20160194774
    Abstract: Some embodiments of the invention are directed to electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.
    Type: Application
    Filed: January 5, 2016
    Publication date: July 7, 2016
    Inventors: Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard, Dennis R. Smalley
  • Patent number: 9337024
    Abstract: This document describes the fabrication and use of ceramic stabilizing layer fabricated right on the product silicon wafer to facilitate its use as a substrate for fabrication of gallium nitride films. A ceramic layer is formed and then attached to a single crystal silicon substrate to form a composite silicon substrate that has coefficient of thermal expansion comparable with GaN. The composite silicon substrates prepared by this invention are uniquely suited for use as growth substrates for crack-free gallium nitride films, benefiting from compressive stresses produced by choosing a ceramic having a desired higher coefficient thermal expansion than those of silicon and gallium nitride.
    Type: Grant
    Filed: April 13, 2014
    Date of Patent: May 10, 2016
    Inventor: Ananda H. Kumar
  • Publication number: 20160118674
    Abstract: A seal composition includes a first alkaline earth metal oxide, a second alkaline earth metal oxide which is different from the first alkaline earth metal oxide, aluminum oxide, and silica in an amount such that molar percent of silica in the composition is at least five molar percent greater than two times a combined molar percent of the first alkaline earth metal oxide and the second alkaline earth metal oxide. The composition is substantially free of boron oxide and phosphorus oxide. The seal composition forms a glass ceramic seal which includes silica containing glass cores located in a crystalline matrix comprising barium aluminosilicate, and calcium aluminosilicate crystals located in the glass cores.
    Type: Application
    Filed: January 11, 2016
    Publication date: April 28, 2016
    Inventors: Ananda H. Kumar, Dien Nguyen, Martin Janousek, Tad Armstrong
  • Publication number: 20160087141
    Abstract: Composite substrates include a single crystal silicon layer disposed on a ceramic layer, including a transparent glass layer. Combination of single crystal devices and non-single crystal devices can be fabricated on a ceramic substrate.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 24, 2016
    Inventors: Ananda H. Kumar, Tue Nguyen
  • Patent number: 9252434
    Abstract: A seal composition includes a first alkaline earth metal oxide, a second alkaline earth metal oxide which is different from the first alkaline earth metal oxide, aluminum oxide, and silica in an amount such that molar percent of silica in the composition is at least five molar percent greater than two times a combined molar percent of the first alkaline earth metal oxide and the second alkaline earth metal oxide. The composition is substantially free of boron oxide and phosphorus oxide. The seal composition forms a glass ceramic seal which includes silica containing glass cores located in a crystalline matrix comprising barium aluminosilicate, and calcium aluminosilicate crystals located in the glass cores.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: February 2, 2016
    Assignee: BLOOM ENERGY CORPORATION
    Inventors: Ananda H. Kumar, Dien Nguyen, Martin Janousek, Tad Armstrong
  • Patent number: 9244101
    Abstract: Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: January 26, 2016
    Assignee: University of Southern California
    Inventors: Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard, Dennis R. Smalley
  • Publication number: 20150368820
    Abstract: Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.
    Type: Application
    Filed: April 28, 2009
    Publication date: December 24, 2015
    Inventors: Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard, Dennis R. Smalley
  • Publication number: 20150287615
    Abstract: This document describes the fabrication and use of multilayer ceramic substrates, having one or more levels of internal thick film metal conductor patterns, wherein any or all of the metal vias intersecting one or both of the major surface planes of the substrates, extend out of the surface to be used for making flexible, temporary or permanent interconnections, to terminals of an electronic component. Such structures are useful for wafer probing, and for packaging, of the semiconductor devices.
    Type: Application
    Filed: April 12, 2015
    Publication date: October 8, 2015
    Inventors: Ananda H. Kumar, Ashish Athana, Farooq Quadri
  • Publication number: 20150108002
    Abstract: Embodiments of the present invention are directed to the formation of microprobe tips elements having a variety of configurations. In some embodiments tips are formed from the same building material as the probes themselves, while in other embodiments the tips may be formed from a different material and/or may include a coating material. In some embodiments, the tips are formed before the main portions of the probes and the tips are formed in proximity to or in contact with a temporary substrate.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 23, 2015
    Inventors: Kieun Kim, Adam L. Cohen, Willa M. Larsen, Richard Chen, Ananda H. Kumar, Ezekiel J.J. Kruglick, Vacit Arat, Gang Zhang, Michael S. Lockard, Christopher A. Bang, Jeffrey A. Thompson
  • Patent number: 9006028
    Abstract: This document describes the fabrication and use of multilayer ceramic substrates, having one or more levels of internal thick film metal conductor patterns, wherein any or all of the metal vias intersecting one or both of the major surface planes of the substrates, extend out of the surface to be used for making flexible, temporary or permanent interconnections, to terminals of an electronic component. Such structures are useful for wafer probing, and for packaging, of semiconductor devices.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: April 14, 2015
    Inventors: Ananda H. Kumar, Ashish Asthana, Farooq Quadri