Patents by Inventor Andrea Arcangeli

Andrea Arcangeli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11500565
    Abstract: Systems and methods for managing library-based memory deduplication are disclosed. In one implementation, a processing device may start a first instance of an application on a host computer system. Responsive to detecting that the first instance completed an initialization stage, the processing device may create a data structure referencing a first plurality of memory pages created by the first instance of the application. The processing device may further identify, among a second plurality of memory pages associated with the application, a first memory page. The processing device may also identify, among the first plurality of memory pages referenced by the data structure, a second memory page identical to the first memory page. The processing device may further modify a pointer referencing the first memory page to reference the second memory page and may release the first memory page.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: November 15, 2022
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11474848
    Abstract: A hypervisor on a destination host receives a request to migrate a virtual machine (VM) from a source host to the destination host and determines a total amount of memory associated with the VM on the source host. The hypervisor on the destination host allocates one or more memory pages in a page table on the destination host to satisfy the total amount of memory associated with the VM on the source host, where the one or more memory pages are to be associated with the VM on the destination host. Responsive to determining that the one or more memory pages have been allocated on the destination host, the hypervisor on the destination host initiates migration of the VM from the source host to the destination host.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: October 18, 2022
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11467974
    Abstract: Aspects of the disclosure provide for implementing host address space identifiers for non-uniform memory access (NUMA) locality in virtual machines. A method of the disclosure includes determining, by a virtual machine (VM) executed by a processing device and managed by a hypervisor, that a memory page of the guest is to be moved from a first virtual non-uniform memory access (NUMA) node of the VM to a second virtual NUMA node of the VM. The method further includes updating, by the VM in a guest page table, upper bits of a guest physical address (GPA) of the memory page to include a host address space identifier (HASID) of the second virtual NUMA node, and causing an execution control to be transferred from the VM to the hypervisor due to a page fault resulting from attempting to access the updated GPA.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: October 11, 2022
    Assignee: Red Hat, Inc.
    Inventors: Andrea Arcangeli, Michael Tsirkin
  • Patent number: 11449434
    Abstract: Systems and methods for memory management for virtual machines. An example method may comprise running, by a host computer system, a Level 0 hypervisor managing a Level 1 virtual machine running a Level 1 hypervisor which manages a Level 2 virtual machine having encrypted memory pages. The Level 1 hypervisor may generate a shadow page table where each shadow page table entry of the plurality of shadow page table entries maps a Level 2 guest virtual address of a Level 2 address space associated with the Level 2 virtual machine to a corresponding Level 1 guest physical address of a Level 1 address space associated with the Level 1 virtual machine. The Level 0 hypervisor may generate a Level 0 page table comprising a plurality of Level 0 page table entries that maps a Level 1 guest physical address to a corresponding Level 0 host physical address.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: September 20, 2022
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11449339
    Abstract: A system includes a memory, at least one physical processor in communication with the memory, and a plurality of hardware threads executing on the at least one physical processor. A first thread of the plurality of hardware threads is configured to execute a plurality of instructions that includes a restartable sequence. Responsive to a different second thread in communication with the first thread being pre-empted while the first thread is executing the restartable sequence, the first thread is configured to restart the restartable sequence prior to reaching a memory barrier.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: September 20, 2022
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Publication number: 20220091890
    Abstract: Systems and methods for identifying memory devices for swapping virtual machine memory pages. An example method may comprise: identifying, by a processing device, a workload type associated with a workload being executed by a computer system; identifying a memory device associated with the workload type; evaluating a memory pressure metric reflecting a period of time during which an application being executed by the computer system has been blocked by a memory allocation operation; and responsive to determining that the memory pressure metric exceeds a threshold value, allocating a memory block on the identified memory device.
    Type: Application
    Filed: December 6, 2021
    Publication date: March 24, 2022
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11243801
    Abstract: Systems and methods for memory management for virtual machines. An example method may comprise determining that a first memory page and a second memory page are mapped to respective guest addresses that are contiguous in a guest address space of a virtual machine running, wherein the first memory page is mapped to a first guest address, determining that the first memory page and the second memory page are mapped to respective host addresses that are not contiguous in a host address space of the host computer system, tracking modifications of the first memory page, causing the virtual machine to copy the first memory page to a third memory page, such that the third memory page and the second memory page are mapped to respective contiguous host addresses, and in response to determining that the first guest page has not been modified, mapping the first guest address to the third memory page.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: February 8, 2022
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11200090
    Abstract: Systems and methods for identifying memory devices for swapping virtual machine memory pages. An example method may comprise: identifying, by a processing device, a workload type associated with a workload being executed by a computer system; identifying a memory device associated with the workload type; evaluating a memory pressure metric reflecting a period of time during which an application being executed by the computer system has been blocked by a memory allocation operation; and responsive to determining that the memory pressure metric exceeds a threshold value, allocating a memory block on the identified memory device.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 14, 2021
    Assignee: Red Hat Israel, Ltd.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11194615
    Abstract: A method performed by a physical computing system includes, with a hypervisor, determining a first time difference between when pause exiting was last enabled for the virtual machine and present time. The method further includes, with the hypervisor, in response to determining that the first time difference is greater than an enablement threshold, enabling pause exiting. The method further includes, with the hypervisor, with pause loop exiting enabled, determining a second time difference between when pause exiting was last disabled and the present time. The method further includes, with the hypervisor, disabling pause exiting in response to determining that the second time difference exceeds a disablement threshold.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: December 7, 2021
    Assignee: RED HAT, INC.
    Inventors: Andrea Arcangeli, Bandan Das
  • Patent number: 11169837
    Abstract: Systems and methods for thread execution transition are disclosed. An example system includes a memory and a processor with first and second registers. An application and a supervisor are configured to execute on the processor, which suspends execution of a first thread executing the supervisor. One execution state of the first thread is stored in the first register. The application stores a request in a first shared memory location. The application executes on a second thread and another execution state of the second thread is stored in the second register. The processor suspends execution of the second thread and resumes execution of the first thread. The supervisor retrieves data for the request from the first shared memory location, and processes the data, including storing a result to a second shared memory location. The processor suspends execution of the first thread and resumes execution of the second thread.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 9, 2021
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Publication number: 20210342463
    Abstract: Systems and methods are disclosed for establishing controlled remote access to debug logs. An example method may comprise: receiving, by a first computing device, from a second computing device, an encrypted file comprising a debug log; running, within a trusted execution environment of the first computing device, a log access application; sending, to the second computing device, a request for access to the debug log by the log access application, wherein the request comprises a validation measurement generated by the trusted execution environment with respect to the log access application; receiving, from the second computing device, an access key; and accessing the debug log using the access key.
    Type: Application
    Filed: April 29, 2020
    Publication date: November 4, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli, Michael Hingston McLaughlin Bursell
  • Patent number: 11151051
    Abstract: A system and method relates to detecting a hardware event, determining a first virtual memory address associated with the hardware event, wherein the first virtual memory address is associated with a first processing thread, identifying, using the first virtual memory address, an entry of a logical address table, the entry comprising a file descriptor and a file offset associated with a file, identifying a memory address table associated with the file descriptor, translating, using the memory address table, the file offset into a second virtual memory address associated with a second processing thread, and transmitting, to the second processing thread, a notification comprising the second virtual memory address.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: October 19, 2021
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Andrea Arcangeli, David Alan Gilbert
  • Publication number: 20210318962
    Abstract: Systems and methods for memory management for virtual machines. An example method may comprise running, by a host computer system, a Level 0 hypervisor managing a Level 1 virtual machine running a Level 1 hypervisor which manages a Level 2 virtual machine having encrypted memory pages. The Level 1 hypervisor may generate a shadow page table where each shadow page table entry of the plurality of shadow page table entries maps a Level 2 guest virtual address of a Level 2 address space associated with the Level 2 virtual machine to a corresponding Level 1 guest physical address of a Level 1 address space associated with the Level 1 virtual machine. The Level 0 hypervisor may generate a Level 0 page table comprising a plurality of Level 0 page table entries that maps a Level 1 guest physical address to a corresponding Level 0 host physical address.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 14, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Publication number: 20210303326
    Abstract: Systems and methods for memory management for virtual machines. An example method may comprise determining that a first memory page and a second memory page are mapped to respective guest addresses that are contiguous in a guest address space of a virtual machine running, wherein the first memory page is mapped to a first guest address, determining that the first memory page and the second memory page are mapped to respective host addresses that are not contiguous in a host address space of the host computer system, tracking modifications of the first memory page, causing the virtual machine to copy the first memory page to a third memory page, such that the third memory page and the second memory page are mapped to respective contiguous host addresses, and in response to determining that the first guest page has not been modified, mapping the first guest address to the third memory page.
    Type: Application
    Filed: March 26, 2020
    Publication date: September 30, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Publication number: 20210240839
    Abstract: Systems and methods are disclosed for establishing secure remote access to debug logs. An example method may comprise: receiving, by a processing device, from a computing device, an encrypted virtual disk image comprising a set of debug logs; initiating, by the processing device, instantiation of a virtual machine (VM) using the encrypted virtual disk image, wherein the VM is to execute a log access application to analyze the set of debug logs; sending, to the computing device, a request for access to the set of debug logs by the log access application; receiving, from the computing device, an indication granting access to the set of debug logs by the log access application, wherein having access to the set of debug logs allows the log access application to analyze the set of debug logs to identify an issue associated with the set of debug logs.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Patent number: 11061829
    Abstract: A system includes a memory, a processor in communication with the memory, an application, and a supervisor. The supervisor is configured to allocate an identifier corresponding to a virtual memory area and expose a data structure that is readable by the application. Responsive to a fault trigger associated with an address, the supervisor is configured to record fault information in the data structure. The application is configured to predict at least a portion of subsequent fault information based on fault information recorded in the data structure.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: July 13, 2021
    Assignee: Red Hat, Inc.
    Inventors: Andrea Arcangeli, Michael Tsirkin
  • Publication number: 20210200567
    Abstract: A guest operating system (OS) of a virtual machine (VM) receives a first request from an application to enable memory deduplication for a memory page associated with the application, identifies a mergeable memory range for memory space of the guest OS, where the mergeable memory rage is associated with guest OS memory pages to be deduplicated, and maps, in a page table of the guest OS, a page table entry for the memory page to a memory address within the mergeable memory range. The guest OS causes a hypervisor to enable deduplication for the memory page responsive to detecting an access of the memory page by the application.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 1, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Publication number: 20210173685
    Abstract: A method includes receiving a request to migrate a virtual machine executing on a source host computer system to a first destination host computer system. The method further includes receiving, from the virtual machine executing on the source host computer system, an encryption key specific to the virtual machine. One or more memory pages associated with the virtual machine are encrypted using the encryption key specific to the virtual machine. The method further includes causing the one or more memory pages associated with the virtual machine to be copied to the first destination host computer system.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 10, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli
  • Publication number: 20210173684
    Abstract: A method performed by a physical computing system includes, with a hypervisor, determining a first time difference between when pause exiting was last enabled for the virtual machine and present time. The method further includes, with the hypervisor, in response to determining that the first time difference is greater than an enablement threshold, enabling pause exiting. The method further includes, with the hypervisor, with pause loop exiting enabled, determining a second time difference between when pause exiting was last disabled and the present time. The method further includes, with the hypervisor, disabling pause exiting in response to determining that the second time difference exceeds a disablement threshold.
    Type: Application
    Filed: December 5, 2019
    Publication date: June 10, 2021
    Inventors: Andrea Arcangeli, Bandan Das
  • Publication number: 20210157497
    Abstract: Systems and methods for managing library-based memory deduplication are disclosed. In one implementation, a processing device may start a first instance of an application on a host computer system. Responsive to detecting that the first instance completed an initialization stage, the processing device may create a data structure referencing a first plurality of memory pages created by the first instance of the application. The processing device may further identify, among a second plurality of memory pages associated with the application, a first memory page. The processing device may also identify, among the first plurality of memory pages referenced by the data structure, a second memory page identical to the first memory page. The processing device may further modify a pointer referencing the first memory page to reference the second memory page and may release the first memory page.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 27, 2021
    Inventors: Michael Tsirkin, Andrea Arcangeli