Patents by Inventor Andreas Zluc

Andreas Zluc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030095
    Abstract: An electronic package having a base structure; a layer stack formed over the base structure; and a component embedded at least partially within the base structure and/or within the layer stack. The layer stack has a decoupling layer structure, the decoupling layer structure with a decoupling material having a Young Modulus being smaller than 1 GPa.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 25, 2024
    Inventors: Mikael Andreas Tuominen, Seok Kim Tay, Johannes Stahr, Andreas Zluc, Timo Schwarz, Gerald Weidinger, Mario Schober
  • Publication number: 20230369235
    Abstract: A component carrier includes a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, and a component having one or more pads and at least one dielectric layer on at least one main surface of the component. The at least one dielectric layer does not extend beyond the main surface in a lateral direction. The dielectric layer at least partially covers one or more pads of the component. In addition, at least one electrically conductive contact extends through at least one opening in the dielectric layer up to at least one of the pads.
    Type: Application
    Filed: July 24, 2023
    Publication date: November 16, 2023
    Inventors: Gerald Weidinger, Andreas Zluc
  • Patent number: 11749573
    Abstract: Described are component carriers including a stepped cavity into which a stepped component assembly is embedded. The component carriers have (a) fully cured electrically insulating material originating from at least one electrically insulating layer structure of the component carrier and circumferentially surrounding the stepped component assembly and/or (b) an undercut in a transition region between a narrow recess and a wide recess of the stepped cavity. Further described are methods for manufacturing such component carriers.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: September 5, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Johannes Stahr, Gerald Weidinger, Gerhard Schmid, Andreas Zluc
  • Patent number: 11749613
    Abstract: A method for manufacturing a component carrier includes forming a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, providing a component having one or more pads and at least one dielectric layer on at least one main surface of the component such that the dielectric layer at least partially covers one or more pads of the component, placing the component on a temporary carrier, and embedding the component between the temporary carrier and the at least one insulating layer structure by pressing the component into the at least one insulating layer structure.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: September 5, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc
  • Patent number: 11682661
    Abstract: A hermetic package includes a base body, wherein dielectric material of a bottom of the base body is made of an organic material, an optical component mounted on the base body, and inorganic material hermetically enclosing the optical component along all surrounding sides.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: June 20, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Andreas Zluc, Johannes Stahr
  • Publication number: 20230189448
    Abstract: The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and form
    Type: Application
    Filed: November 15, 2022
    Publication date: June 15, 2023
    Applicant: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc, Johannes Stahr
  • Patent number: 11658142
    Abstract: A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: May 23, 2023
    Assignee: AT&SAustria Technologie & Systemtechnik AG
    Inventors: Heinz Moitzi, Johannes Stahr, Andreas Zluc
  • Publication number: 20230135105
    Abstract: A method for manufacturing a component carrier includes i) providing a metal layer, in particular a copper layer; ii) forming a film on the metal layer; iii) patterning the film in order to expose a part of the metal layer; iv) carrying out a first etch, thereby thinning the film and removing a further part of the exposed metal layer; and thereafter v) carrying out a second etch, thereby forming at least one metal trace that is spatially separated from the metal layer. A component carrier made by the method is further described.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 4, 2023
    Inventors: Bettina Schuster, Jonathan Silvano de Sousa, Andreas Zluc, Markus Leitgeb, Hannes Stahr
  • Publication number: 20230055435
    Abstract: A component carrier includes a stack having at least one horizontal electrically conductive layer structure, at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and at least one vertical via being laterally offset from the semiconductor component. The at least one horizontal electrically conductive layer structure electrically connects the vertical via to a bottom main surface of the semiconductor component. The component carrier is configured for a current flow from the vertical via to the horizontal electrically conductive layer structure, from the horizontal electrically conductive layer structure to the bottom main surface of the semiconductor component, from the bottom main surface of the semiconductor component to an upper main surface of the semiconductor component, and from the upper surface of the semiconductor component to the outside of the component carrier.
    Type: Application
    Filed: October 10, 2022
    Publication date: February 23, 2023
    Inventors: Johannes STAHR, Andreas ZLUC, Mike MORIANZ, Heinz MOITZI
  • Patent number: 11570897
    Abstract: A component carrier including a stack with a plurality of electrically insulating layer structures and/or a plurality of electrically conductive layer structures, and a component embedded in the stack, wherein at least a portion of a side wall of the component is exposed.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: January 31, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Bettina Schuster, Jonathan Silvano de Sousa, Andreas Zluc, Markus Leitgeb, Hannes Stahr
  • Patent number: 11523520
    Abstract: The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and form
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 6, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc, Johannes Stahr
  • Patent number: 11495513
    Abstract: A component carrier with a stack that has at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and a highly-conductive block embedded in the stack and being thermally and/or electrically coupled with the semiconductor component is illustrated and described.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: November 8, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Johannes Stahr, Andreas Zluc, Mike Morianz, Heinz Moitzi
  • Publication number: 20220053633
    Abstract: A method of manufacturing a component carrier, includes providing a base structure having a main surface that is at least partially covered by a component fixation structure; providing a component, the component intrinsically comprising warpage; mounting the component on a surface provided on a plate structure and/or on the base structure to remove the warpage of the component at least partially; and fixating the component to the component carrier through the component fixation structure.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 17, 2022
    Inventors: Timo Schwarz, Andreas Zluc, Mario Schober
  • Publication number: 20220037262
    Abstract: A method for manufacturing a component carrier includes forming a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, providing a component having one or more pads and at least one dielectric layer on at least one main surface of the component such that the dielectric layer at least partially covers one or more pads of the component, placing the component on a temporary carrier, and embedding the component between the temporary carrier and the at least one insulating layer structure by pressing the component into the at least one insulating layer structure.
    Type: Application
    Filed: October 15, 2021
    Publication date: February 3, 2022
    Inventors: Gerald Weidinger, Andreas Zluc
  • Patent number: 11171092
    Abstract: A component carrier includes a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, and a component having one or more pads and at least one dielectric layer on at least one main surface of the component. The at least one dielectric layer does not extend beyond the main surface in a lateral direction. The dielectric layer at least partially covers one or more pads of the component. In addition, at least one electrically conductive contact extends through at least one opening in the dielectric layer up to at least one of the pads.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: November 9, 2021
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc
  • Publication number: 20210280479
    Abstract: Described are component carriers including a stepped cavity into which a stepped component assembly is embedded. The component carriers have (a) fully cured electrically insulating material originating from at least one electrically insulating layer structure of the component carrier and circumferentially surrounding the stepped component assembly and/or (b) an undercut in a transition region between a narrow recess and a wide recess of the stepped cavity. Further described are methods for manufacturing such component carriers.
    Type: Application
    Filed: May 25, 2021
    Publication date: September 9, 2021
    Inventors: Johannes Stahr, Gerald Weidinger, Gerhard Schmid, Andreas Zluc
  • Patent number: 11049778
    Abstract: Described are component carriers including a stepped cavity into which a stepped component assembly is embedded. The component carriers have (a) fully cured electrically insulating material originating from at least one electrically insulating layer structure of the component carrier and circumferentially surrounding the stepped component assembly and/or (b) an undercut in a transition region between a narrow recess and a wide recess of the stepped cavity. Further described are methods for manufacturing such component carriers.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: June 29, 2021
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Johannes Stahr, Gerald Weidinger, Gerhard Schmid, Andreas Zluc
  • Publication number: 20210074662
    Abstract: A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.
    Type: Application
    Filed: August 17, 2020
    Publication date: March 11, 2021
    Inventors: Heinz Moitzi, Johannes Stahr, Andreas Zluc
  • Publication number: 20210068252
    Abstract: The present invention relates to a component carrier having a stack including at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, a component embedded in the stack and having a curved surface portion, and a conductive contact element in contact with the curved surface portion of the embedded component. The present invention also relates to a method of manufacturing such a component carrier.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 4, 2021
    Inventors: Johannes Stahr, Andreas Zluc, Heinz Moitzi
  • Publication number: 20200365573
    Abstract: A hermetic package includes a base body, wherein dielectric material of a bottom of the base body is made of an organic material, an optical component mounted on the base body, and inorganic material hermetically enclosing the optical component along all surrounding sides.
    Type: Application
    Filed: April 27, 2020
    Publication date: November 19, 2020
    Inventors: Andreas Zluc, Johannes Stahr