Patents by Inventor Andreas Zluc

Andreas Zluc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200365477
    Abstract: A component carrier which includes a laminated stack having at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, and a component having at least one electrically conductive connection structure and embedded in the stack, wherein the at least one electrically conductive connection structure of the component is exposed with respect to the stack so that a free exposed end of the at least one electrically conductive connection structure of the component is flush with or extends beyond an exterior main surface of the stack.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 19, 2020
    Inventors: Heinz Moitzi, Johannes Stahr, Andreas Zluc
  • Publication number: 20200323081
    Abstract: A method for embedding a component in a printed circuit board or a printed circuit board intermediate product, wherein the printed circuit board or the printed circuit board intermediate product comprises at least one insulating layer made of a prepreg material, and the component is fixed by the resin of the prepreg material, is characterized by the following steps: providing a combination of the layers of the printed circuit board, or of the printed circuit board intermediate product, wherein this combination includes at least one curable prepreg material; creating a clearance in the combination for accommodating the component to be embedded; covering at least the region of the clearance with a first temporary carrier layer on a first side of the combination; positioning the component to be embedded in the clearance by way of the first temporary carrier layer; covering at least the region of the clearance on the second side of the combination with a second temporary carrier layer; compressing the combinatio
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Applicant: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Timo Schwarz, Andreas Zluc, Gregor Langer, Johannes Stahr
  • Publication number: 20200312737
    Abstract: A component carrier with a stack that has at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and a highly-conductive block embedded in the stack and being thermally and/or electrically coupled with the semiconductor component is illustrated and described.
    Type: Application
    Filed: March 23, 2020
    Publication date: October 1, 2020
    Inventors: Johannes Stahr, Andreas Zluc, Mike Morianz, Heinz Moitzi
  • Patent number: 10779413
    Abstract: A method for embedding a component in a printed circuit board or a printed circuit board intermediate product, wherein the printed circuit board or the printed circuit board intermediate product comprises at least one insulating layer made of a prepreg material, and the component is fixed by the resin of the prepreg material, is characterized by the following steps: providing a combination of the layers of the printed circuit board, or of the printed circuit board intermediate product, wherein this combination includes at least one curable prepreg material; creating a clearance in the combination for accommodating the component to be embedded; covering at least the region of the clearance with a first temporary carrier layer on a first side of the combination; positioning the component to be embedded in the clearance by way of the first temporary carrier layer; covering at least the region of the clearance on the second side of the combination with a second temporary carrier layer; compressing the combinatio
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: September 15, 2020
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Timo Schwarz, Andreas Zluc, Gregor Langer, Johannes Stahr
  • Patent number: 10765005
    Abstract: A method of manufacturing a component carrier is disclosed. The method includes galvanically depositing at least part of at least one electrically conductive pillar on a component, and inserting the at least one electrically conductive pillar and an electrically insulating layer structure into one another.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: September 1, 2020
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Hannes Stahr, Hannes Voraberger, Andreas Zluc, Bettina Schuster
  • Patent number: 10709023
    Abstract: A method of manufacturing a circuit board or a circuit board intermediate product, wherein the method comprises providing a carrier structure, applying a layer of flowable low-viscosity adhesive on the carrier structure over a surface area of the carrier structure which is larger than a mounting area in which an electronic component is to be mounted on the carrier structure, and pressing the electronic component into a subsection of the layer of adhesive in the mounting area so that at least part of the electronic component is immersed within the adhesive.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: July 7, 2020
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Timo Schwarz, Andreas Zluc
  • Publication number: 20200205296
    Abstract: A method of manufacturing a flexible electronic device is described. The method comprises arranging an electronic component on a temporary carrier, providing a flexible laminate comprising an adhesive layer, pressing the temporary carrier and the flexible laminate together with the adhesive layer facing the temporary carrier such that the electronic component is pushed into the adhesive layer, and removing the temporary carrier. Further, a corresponding flexible electronic device is described.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Inventors: Andreas Zluc, Johannes Stahr
  • Patent number: 10617012
    Abstract: A method of manufacturing a flexible electronic device is described. The method comprises arranging an electronic component on a temporary carrier, providing a flexible laminate comprising an adhesive layer, pressing the temporary carrier and the flexible laminate together with the adhesive layer facing the temporary carrier such that the electronic component is pushed into the adhesive layer, and removing the temporary carrier. Further, a corresponding flexible electronic device is described.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: April 7, 2020
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Andreas Zluc, Johannes Stahr
  • Publication number: 20200083173
    Abstract: A component carrier includes a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, and a component having one or more pads and at least one dielectric layer on at least one main surface of the component. The at least one dielectric layer does not extend beyond the main surface in a lateral direction. The dielectric layer at least partially covers one or more pads of the component. In addition, at least one electrically conductive contact extends through at least one opening in the dielectric layer up to at least one of the pads.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 12, 2020
    Inventors: Gerald Weidinger, Andreas Zluc
  • Publication number: 20190378771
    Abstract: Described are component carriers including a stepped cavity into which a stepped component assembly is embedded. The component carriers have (a) fully cured electrically insulating material originating from at least one electrically insulating layer structure of the component carrier and circumferentially surrounding the stepped component assembly and/or (b) an undercut in a transition region between a narrow recess and a wide recess of the stepped cavity. Further described are methods for manufacturing such component carriers.
    Type: Application
    Filed: June 10, 2019
    Publication date: December 12, 2019
    Inventors: Johannes Stahr, Gerald Weidinger, Gerhard Schmid, Andreas Zluc
  • Patent number: 10426040
    Abstract: The invention relates to a method for producing a circuit board element having at least one electronic component, which component has a connection side defined by electrical contacts or a conductive layer and is connected to a temporary carrier for positioning and embedded in an insulating material; the component is attached in a specified position directly to a plastic film as a temporary carrier, whereupon a composite layer having at least a carrier and an electrical conductor, preferably also having an insulating material, is attached on the side of the component opposite the plastic film, with the carrier facing away from the component, and thereafter the plastic film is removed; then the component is embedded in insulating material. After the embedding of the component in the insulating material, an additional composite layer is preferably attached to the component and the embedding of the component on the side opposite the first composite layer.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: September 24, 2019
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Johannes Stahr, Andreas Zluc
  • Patent number: 10306750
    Abstract: A circuit board and a method of manufacturing a circuit board or two circuit boards are illustrated and described. The circuit board includes (a) a dielectric layer with a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto and a layer thickness along a z-direction which is perpendicular with respect to the x-axis and to the y-axis; (b) a metallic layer which is attached to the dielectric layer in a planar manner; and (c) a component which is embedded in the dielectric layer and/or in a dielectric core-layer of the circuit board. The dielectric layer includes a dielectric material which has (i) an elastic modulus E in a range between 1 and 20 GPa and (ii) a coefficient of thermal expansion in a range between 0 and 17 ppm/K along the x-axis and along the y-axis.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: May 28, 2019
    Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Hannes Stahr, Andreas Zluc, Timo Schwarz, Gerald Weidinger
  • Publication number: 20190124772
    Abstract: A method of manufacturing a component carrier is disclosed. The method includes galvanically depositing at least part of at least one electrically conductive pillar on a component, and inserting the at least one electrically conductive pillar and an electrically insulating layer structure into one another.
    Type: Application
    Filed: October 24, 2018
    Publication date: April 25, 2019
    Inventors: Hannes Stahr, Hannes Voraberger, Andreas Zluc, Bettina Schuster
  • Publication number: 20190082543
    Abstract: The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and formati
    Type: Application
    Filed: November 8, 2018
    Publication date: March 14, 2019
    Applicant: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc, Johannes Stahr
  • Publication number: 20190045636
    Abstract: A component carrier including a stack with a plurality of electrically insulating layer structures and/or a plurality of electrically conductive layer structures, and a component embedded in the stack, wherein at least a portion of a side wall of the component is exposed.
    Type: Application
    Filed: August 1, 2018
    Publication date: February 7, 2019
    Inventors: Bettina Schuster, Jonathan Silvano de Sousa, Andreas Zluc, Markus Leitgeb, Hannes Stahr
  • Patent number: 10187997
    Abstract: Methods for the bonding of a component embedded into a printed circuit board are provided. A printed circuit board is also provided with at least one insulated layer and at least one structured conductor layer with conductor paths, with at least one component, which, by means of an adhesive layer, is embedded into a recess of the printed circuit board, with its contacts essentially being situated in the plane of an outer surface of the printed circuit board exhibiting the at least one conductor layer, and with conductive connections between the contacts of the components and the conductor paths of the conductor layer.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: January 22, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc, Johannes Stahr
  • Publication number: 20180177045
    Abstract: A method of manufacturing a component carrier, wherein the method comprises covering a main surface of a base structure at least partially by a component fixation structure, mounting a component on a carrier, and inter-connecting the base structure with the carrier so that the component extends partially into the component fixation structure.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 21, 2018
    Inventors: Timo Schwarz, Andreas Zluc, Mario Schober
  • Patent number: 9967972
    Abstract: A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: May 8, 2018
    Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Andreas Zluc, Gerald Weidinger, Mario Schober, Hannes Stahr, Timo Schwarz, Benjamin Gruber
  • Publication number: 20170339784
    Abstract: A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described.
    Type: Application
    Filed: December 10, 2015
    Publication date: November 23, 2017
    Inventors: Andreas Zluc, Gerald Weidinger, Mario Schober, Hannes Stahr, Timo Schwarz, Benjamin Gruber
  • Publication number: 20170339783
    Abstract: A circuit board and a method of manufacturing a circuit board or two circuit boards are illustrated and described. The circuit board includes (a) a dielectric layer with a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto and a layer thickness along a z-direction which is perpendicular with respect to the x-axis and to the y-axis; (b) a metallic layer which is attached to the dielectric layer in a planar manner; and (c) a component which is embedded in the dielectric layer and/or in a dielectric core-layer of the circuit board. The dielectric layer includes a dielectric material which has (i) an elastic modulus E in a range between 1 and 20 GPa and (ii) a coefficient of thermal expansion in a range between 0 and 17 ppm/K along the x-axis and along the y-axis.
    Type: Application
    Filed: December 10, 2015
    Publication date: November 23, 2017
    Inventors: Hannes Stahr, Andreas Zluc, Timo Schwarz, Gerald Weidinger