Patents by Inventor Andrew Anderson

Andrew Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110244480
    Abstract: The invention provides kits and methods for detecting or monitoring the number of cells in sample. The cell comprises a cell surface associated protein (CSAP) comprising a cytoplasmic (cytosolic) and an extracellular (ecto) domain. The kit comprises: (i) a chromatographic device; and (ii) a CSAP-binding agent. The method comprises: (i) optionally contacting the sample with an agent capable of lysing or permeabilizing CSAP bearing cells; (ii) contacting the sample with a CSAP-binding agent that binds to the cytoplasmic domain of the CSAP; and (iii) directly or indirectly evaluating the level or presence of bound CSAP in the sample.
    Type: Application
    Filed: September 28, 2007
    Publication date: October 6, 2011
    Applicant: The Macfarlane Burnet Institute for Medical Research and Public Health Limited
    Inventors: David Andrew Anderson, Robyn Elizabeth Lloyd, Suzanne Mary Crowe, Mary Louise Garcia, Alan Lee Landay
  • Patent number: 8019795
    Abstract: Various technologies and techniques are disclosed for providing a data warehouse test automation framework system. A data generation module is provided that is operable to generate data scenarios that ensure specific logic is being validated against a data warehouse. A data validation module is provided that has data validation blocks that provide a framework for validating data completeness and data integrity of a data warehouse. The data validation blocks are represented by query templates that provide specifications for how queries that perform the validating of the data completeness and the data integrity should be structured. Dimensions in the data warehouse are modeled using an object oriented programming syntax.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: September 13, 2011
    Assignee: Microsoft Corporation
    Inventors: Andrew Anderson, Kanmin Zhang, Steven Long, Joseph Heiniger, Ashutosh Badwe
  • Patent number: 7785773
    Abstract: This invention is directed to diagnostic methods detecting the presence of an antibody to a virus in a sample from a subject and kits for using the methods.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: August 31, 2010
    Assignee: Hepgenics Pty Ltd.
    Inventors: David Andrew Anderson, Teresa Sylvia Howard, Anne Healy, Katherine Anders, Mary Louise Garcia
  • Publication number: 20100120092
    Abstract: The specification discloses chimeric or recombinant virus-like particles comprising (i) S polypeptide of an avian hepadnavirus and (ii) a chimeric fusion protein comprising a polypeptide of interest covalently attached to a particle-associating portion of L polypeptide of an avian hepadnavirus, wherein the polypeptide of interest comprises a transmembrane domain or a protein binding domain or motif and wherein the chimeric fusion protein further comprises a second or further polypeptide of interest comprising a transmembrane domain and/or a protein binding domain or motif, wherein the second or further polypeptide is associated with the virus-like particle via non-peptide bonds. It is proposed that such VLPs more closely resemble the naturally occurring configuration of antigenic complexes or pathogens. The chimeric virus-like particles are illustrated using viral envelope proteins from measles, hepatitis C virus, influenza A and HIV and by polyproteins from Plasmodium surface proteins.
    Type: Application
    Filed: August 29, 2007
    Publication date: May 13, 2010
    Applicant: HEPGENICS PTY LTD.
    Inventors: Elizabeth Vera Ludmilla Grgacic, David Andrew Anderson, Paxton Loke, Robin Fredric Anders
  • Patent number: 7678374
    Abstract: The present invention provides a virus-like particle (VLP) comprising i) a polypeptide comprising a polypeptide of interest (POI) and at least a particle-associating portion of a large envelope (L) polypeptide of an avian hepadnavirus or a functional derivative or homolog thereof, and ii) a small envelope (S) polypeptide of an avian hepadnavirus or a functional derivative or homolog thereof. By introducing one or more POIs into the L polypeptide, the POI is translocated along with L into a particle structure made up primarily of S polypeptide. The present invention furthermore provides methods for producing a recombinant virus-like particle.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: March 16, 2010
    Assignee: Hepgenics Pty Ltd
    Inventors: David Andrew Anderson, Elizabeth Vera Ludmila Grgacic
  • Publication number: 20090150447
    Abstract: Various technologies and techniques are disclosed for providing a data warehouse test automation framework system. A data generation module is provided that is operable to generate data scenarios that ensure specific logic is being validated against a data warehouse. A data validation module is provided that has data validation blocks that provide a framework for validating data completeness and data integrity of a data warehouse. The data validation blocks are represented by query templates that provide specifications for how queries that perform the validating of the data completeness and the data integrity should be structured. Dimensions in the data warehouse are modeled using an object oriented programming syntax.
    Type: Application
    Filed: December 5, 2007
    Publication date: June 11, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Andrew Anderson, Kanmin Zhang, Steven Long, Joseph Heiniger, Ashutosh Badwe
  • Patent number: 7341723
    Abstract: A method for enhancing an immune response to a nucleic acid vaccine comprising administering to an animal a nucleic acid construct encoding a fusion protein comprising a processing component and an antigenic polypeptide of interest wherein said processing component provides heterogeneous processing of the antigenic polypeptide when the nucleic acid construct is expressed in a host cell and a resulting enhancement of the immune response. The processing component is derived from an N-terminal portion of PORF2 of Hepatitis E virus.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: March 11, 2008
    Assignee: Macfarlane Burnet Institute for Medical Research and Public Health Ltd.
    Inventors: Fan Li, David Andrew Anderson, Damian Francis John Purcell
  • Publication number: 20080014898
    Abstract: A module for radio frequency signal circuits includes an electrically conductive housing. Coax connectors are secured to the rear face of the housing. A circuit board is contained within the interior spaced between sidewalls of the housing. A ground side of the circuit board includes a layer of electrically conductive material which is electrically connected to the housing. Coax cables extend within the interior of the housing from the coax connectors and between the ground side of the circuit board and an opposing sidewall. An opposite side of the circuit board contains circuit components interconnected with one another through a plurality of circuit paths.
    Type: Application
    Filed: February 28, 2007
    Publication date: January 17, 2008
    Applicant: ADC Telecommunications, Inc.
    Inventors: Andrew Anderson, Glen Backes, Richard Demulling, Dominic Louwagie, Todd Ortberg, Edward Sansone
  • Publication number: 20080005447
    Abstract: In a virtualization system comprising a guest machine, a host machine, and a virtual machine monitor (VMM), the host machine further including a processor including hardware support for virtualization the hardware support for virtualization at least in part to control operation of the guest machine, the VMM dynamically installing a mapping for a guest address to be accessed by the VMM in a page table of the VMM, prior to the VMM accessing the guest physical address.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventors: Sebastian Schoenberg, Andrew Anderson, Steven M. Bennett, Rajesh Sankaran
  • Publication number: 20070157198
    Abstract: Embodiments of apparatuses, methods, and systems for processing interrupts in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a recognition logic, window logic, and evaluation logic. The event logic is to recognize an interrupt request. The window logic is to determine whether an interrupt window is open. The evaluation logic is to determine whether to transfer control to one of at least two virtual machine monitors in response to the interrupt request if the interrupt window is open.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Steven Bennett, Andrew Anderson, Gilbert Neiger, Dion Rodgers, Richard Uhlig, Lawrence Smith, Barry Huntley
  • Publication number: 20070157197
    Abstract: Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor. The exit logic is to transfer control to a host if the delivery logic determines that the interrupt request is not to be delivered to the virtual processor.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Gilbert Neiger, Rajesh Madukkarumukumana, Richard Uhlig, Udo Steinberg, Sebastian Schoenberg, Sridhar Muthrasanallur, Steven Bennett, Andrew Anderson, Erik Cota-Robles
  • Publication number: 20070156986
    Abstract: Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to the device and based on an access type, whether the access is allowed. The exit logic is to transfer control to a host if the evaluation logic determines that the access is not allowed.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Gilbert Neiger, Andrew Anderson, Steven Bennett, Rajesh Madukkarumukumana, Richard Uhlig, Rajesh Parthasarathy, Sebastian Schoenberg
  • Publication number: 20070044409
    Abstract: A siding product especially suitable for use as lap siding is formed by attaching a weather-resistant barrier sheet to a siding board along the length of the top portion of the board in a partially overlapping arrangement and the weather-resistant barrier sheet can be used to protect the front face of pre-finished siding boards during shipping and remains attached to the siding product after installation to provide improved drainage of water that may infiltrate behind the siding.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 1, 2007
    Inventor: Andrew Anderson
  • Publication number: 20070028238
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and evaluation logic. The event logic is to recognize a virtualization event. The evaluation logic is to determine whether to transfer control from a child guest to a parent guest in response to the virtualization event.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 1, 2007
    Inventors: Steven Bennett, Andrew Anderson, Gilbert Neiger, Dion Rodgers, Richard Uhlig, Lawrence Smith, Barry Huntley
  • Publication number: 20070005870
    Abstract: A processor, capable of operation in a host machine, including memory management logic to support a plurality of memory types for a physical memory access by the processor, and virtualization support logic to determine a host memory type for a reference to a memory location by a guest in a virtual machine executable on the processor based at least in part on a memory type field stored in an entry of an extended paging table of a virtualization support system of the host machine (extended memory type field), to determine a guest memory type for the reference to the memory location, and to determine an effective memory type based on at least one of the host memory type and the guest memory type.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Gilbert Neiger, Steven Bennett, Andrew Anderson, Dion Rodgers, David Koufaty, Richard Uhlig, Camron Rust, Larry Smith, Rupin Vakharwala
  • Publication number: 20060288130
    Abstract: A apparatus is disclosed. The apparatus includes a remapping circuit to facilitate access of one or more I/O devices to a memory device for direct memory access (DMA) transactions. The remapping circuit includes a translation mechanism to perform memory address translations for I/O DMA transactions via address window-based translations.
    Type: Application
    Filed: June 21, 2005
    Publication date: December 21, 2006
    Inventors: Rajesh Madukkarumukumana, Udo Steinberg, Steven Bennett, Andrew Anderson, Gilbert Neiger
  • Publication number: 20060174053
    Abstract: In one embodiment, a method includes receiving control transitioned from a virtual machine (VM) due to a privileged event pertaining to a translation-lookaside buffer (TLB), and determining which entries in a guest translation data structure were modified by the VM. The determination is made based on metadata extracted from a shadow translation data structure maintained by a virtual machine monitor (VMM) and attributes associated with entries in the shadow translation data structure. The method further includes synchronizing entries in the shadow translation data structure that correspond to the modified entries in the guest translation data structure with the modified entries in the guest translation data structure.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 3, 2006
    Inventors: Andrew Anderson, Alain Kagi
  • Publication number: 20060161719
    Abstract: A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to host-physical memory of the host machine.
    Type: Application
    Filed: January 14, 2005
    Publication date: July 20, 2006
    Inventors: Steven Bennett, Andrew Anderson, Gilbert Neiger, Rajesh Madukkarumukumana, Richard Uhlig, Larry Smith, Dion Rodgers
  • Publication number: 20060130059
    Abstract: In one embodiment, a method includes receiving a request to transition control to a virtual machine (VM) from a virtual machine monitor (VMM), calculating an offset value, receiving, during operation of the VM, a request for a current value of the timer, adjusting the current value of the timer based on the offset value, and providing the adjusted timer value to the VM.
    Type: Application
    Filed: October 29, 2004
    Publication date: June 15, 2006
    Inventors: Steven Bennett, Gilbert Neiger, Andrew Anderson
  • Publication number: 20060130060
    Abstract: In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines (SVMs) to handle selected trapped events. An embodiment of the invention is a hybrid VMM operating on a platform with hardware virtualization support. The hybrid VMM utilizes features from both hypervisor-based and host-based VMM architectures. In at least one embodiment, the functionality of a traditional VMM is partitioned into a small platform-dependent part called a micro-hypervisor (MH) and one or more platform-independent parts called service virtual machines (SVMs). The micro-hypervisor operates at a higher virtual machine (VM) privilege level than any SVM, while the SVM and other VMs may still have access to any instruction set architecture (ISA) privilege level. Other embodiments are described and claimed.
    Type: Application
    Filed: December 10, 2004
    Publication date: June 15, 2006
    Inventors: Andrew Anderson, Steven Bennett, Erik Cota-Robles, Alain Kagi, Gilbert Neiger, Rajesh Madukkarumukumana, Sebastian Schoenberg, Richard Uhlig, Michael Rothman, Vincent Zimmer, Stalinselvaraj Jeyasingh