Patents by Inventor Andrew Ward Beale

Andrew Ward Beale has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210357254
    Abstract: A system and method for the dynamic, run-time configuration of logic core register files, and the provision of an associated execution context. The dynamic register files as well as the associated execution context information are software-defined so as to be virtually configured in random-access memory. This virtualization of both the processor execution context and register files enables the size, structure and performance to be specified at run-time and tailored to the specific processing, instructions and data associated with a given processor state or thread, thereby minimizing both the aggregate memory required and the context switching time. In addition, the disclosed system and method provides for processor virtualization which further enhances the flexibility and efficiency.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 18, 2021
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Publication number: 20210357224
    Abstract: A system and method for the dynamic, run-time configuration of logic core register files, and the provision of an associated execution context. The dynamic register tiles as well as the associated execution context information are software-defined so as to be virtually configured in random-access memory. This virtualization of both the processor execution context and register files enables the size, structure and performance to be specified at run-time and tailored to the specific processing, instructions and data associated with a given processor state or thread, thereby minimizing both the aggregate memory required and the context switching time. In addition, the disclosed system and method provides for processor virtualization which further enhances the flexibility and efficiency.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 18, 2021
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Publication number: 20210357240
    Abstract: A system and method for the dynamic, run-time configuration of logic core register files, and the provision of an associated execution context. The dynamic register files as well as the associated execution context information are software-defined so as to be virtually configured in random-access memory. This virtualization of both the processor execution context and register files enables the size, structure and performance to be specified at run-time and tailored to the specific processing, instructions and data associated with a given processor state or thread, thereby minimizing both the aggregate memory required and the context switching time. In addition, the disclosed system and method provides for processor virtualization which further enhances the flexibility and efficiency.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 18, 2021
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Publication number: 20210243180
    Abstract: Methods and systems for mapping a sharable resource using a one-time password are disclosed. An identifier included in a set of provided credentials uniquely associates the one-time password with an executable within a computing environment that hosts the sharable resource. When credentials are received in association with a mapping request, it is determined whether a supplied username corresponds to a user authorized to access the sharable resource and whether a representation of a supplied password received in association with the mapping request matches a representation of the one-time password. Validating the mapping request provides access to the sharable resource.
    Type: Application
    Filed: February 5, 2020
    Publication date: August 5, 2021
    Inventors: ANDREW WARD BEALE, ANTHONY P. MATYOK, CLARK C. KOGEN, DAVID STRONG
  • Publication number: 20210072786
    Abstract: Methods and systems for implementing independent time in a hosted operating environment are disclosed. The hosted, or guest, operating environment, can be seeded with a guest time value by a guest operating environment manager that maintains a time delta between a host clock time and an enterprise time. The guest operating environment can subsequently manage its guest clock from the guest time value. If the guest operating environment is halted, the guest operating environment manager can manage correspondence between the host clock time and the enterprise time by periodically assessing divergence between actual and expected values of the host clock time.
    Type: Application
    Filed: September 10, 2019
    Publication date: March 11, 2021
    Inventors: ROBERT F. INFORZATO, DWAYNE E. EBERSOLE, DARYL R. SMITH, GRACE W. LIN, ANDREW WARD BEALE, LOREN C. WILTON
  • Patent number: 10509686
    Abstract: Systems and methods for distributing computing tasks are disclosed. One system includes a first computing system and a second computing system. The first computing system includes a processing unit and a memory, the memory storing a computer-executable workload including a plurality of procedures including at least one distributable procedure, the at least one distributable procedures capable of execution independent of underlying operating system or platform resources of the first computing system and configured for execution on an architecture of the first computing system. The system further includes a distributable computation unit executable on a second computing system, the distributable computation unit including the at least one distributable procedure, a state of computing resources of the first computing system, and an application capable of execution on the second computing system to perform the at least one distributable procedure.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: December 17, 2019
    Assignee: Unisys Corporation
    Inventor: Andrew Ward Beale
  • Publication number: 20190110172
    Abstract: A mesh network system and method for use in an area affected by a natural disaster. The system includes a first network node that has Wi-Fi capability and a first Wi-Fi coverage area. The system also includes at least one second network node, coupled to the first network node, with the at least one second network node having Wi-Fi capability and a second Wi-Fi coverage area outside of the first Wi-Fi coverage area. The first network node and the at least one second network node are coupled together via at least one radio transceiver to form a network route within the mesh network. A first communication device located within the area affected by the natural disaster and operably coupled to the first network node communicates with a second communication device located within the area affected by the natural disaster and coupled to the at least one second network node via the network route within the mesh network.
    Type: Application
    Filed: October 5, 2017
    Publication date: April 11, 2019
    Inventors: DAVID STRONG, ANDREW WARD BEALE, DEREK W. PAUL
  • Patent number: 9965192
    Abstract: Methods and systems for implementing a secure migratable architecture having improved performance features over existing virtualization systems are disclosed. One method includes allocating a portion of a memory for use by a process, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method includes associating area descriptors with each of a plurality of memory areas within the portion of the memory used by the process, and receiving a request within the firmware environment to store data within a first memory area of the plurality of memory areas, the first memory area defined by a first area descriptor of the area descriptors, the request being associated with a plurality of memory addresses within the first memory area.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: May 8, 2018
    Assignee: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Patent number: 9823851
    Abstract: Methods and systems for implementing a secure migratable architecture are disclosed. One method includes, upon initiating execution of a process, allocating a portion of a memory for use by the process during execution, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method also includes executing the process hosted by the operating system, wherein the firmware environment manages the portion of the memory using one or more area descriptors to describe the portion of the memory, each of the one or more area descriptors defining to the firmware environment a base address at which a memory area is located, the base address translated to an address in the memory managed by the operating system, the memory area being within the portion of memory allocated for use by the process.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: November 21, 2017
    Assignee: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Patent number: 9817580
    Abstract: Methods and systems for implementing a secure migratable architecture having improved performance features over existing virtualization systems are disclosed. One method includes allocating a portion of a memory for use by a process, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method includes associating area descriptors with each of a plurality of memory areas within the portion of the memory used by the process, and receiving a request within the firmware environment to store data within a first memory area of the plurality of memory areas, the first memory area defined by a first area descriptor of the area descriptors, the request being associated with a plurality of memory addresses within the first memory area.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: November 14, 2017
    Assignee: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Patent number: 9760291
    Abstract: Systems and methods are disclosed that ensure high availability of such an architecture hosted on commodity platforms. One method includes initializing, by an operating system, execution of a process by the programmable circuit, the process including a firmware environment representing a virtual computing system, the process further including one or more workloads to be executed within the process. The method also includes allocating a portion of the memory for use by the process, the portion of memory including a plurality of memory segments, and generating a plurality of area descriptors associated with the plurality of memory segments, each of the area descriptors defining a location and length of a corresponding memory segment. The method includes quiescing execution of the process and capturing contents of the portion of memory and the plurality of area descriptors associated with the process.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: September 12, 2017
    Assignee: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Patent number: 9760408
    Abstract: Systems and methods for managing input/output operations of a first computing system at a second computing system are disclosed. One method includes receiving an input/output control block at a distributed input/output processor separate from a first computing system, the input/output control block built by the first computing system in response to initiation of an input/output operation at the first computing system. The method also includes enqueueing an input/output operation at the distributed input/output processor, and processing, by the distributed input/output processor, the input/output operation from memory of the first computing system. The method includes returning results from the distributed input/output processor to the first computing system.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: September 12, 2017
    Assignee: Unisys Corporation
    Inventor: Andrew Ward Beale
  • Patent number: 9684545
    Abstract: Systems and methods for continuous computing are disclosed. One such system includes a plurality of communicatively interconnected computing systems, and a workload including a plurality of tasks executing on a first computing system of the plurality of communicatively interconnected computing systems. The system includes a task management system executing on at least one of the plurality of communicatively interconnected computing systems, the task management component configured to encapsulate a task of the plurality of tasks with a current system state of the first computing system, wherein encapsulating the task includes associating metadata defining an association between the task and resources of the first computing system. The task management system is configured to transfer the encapsulated task to a second computing system among the plurality of communicatively interconnected computing systems for execution, the metadata used to associate the task with resources of a second computing system.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: June 20, 2017
    Assignee: Unisys Corporation
    Inventor: Andrew Ward Beale
  • Publication number: 20170024128
    Abstract: Methods and systems for implementing a secure migratable architecture having improved performance features over existing virtualization systems are disclosed. One method includes allocating a portion of a memory for use by a process, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method includes associating area descriptors with each of a plurality of memory areas within the portion of the memory used by the process, and receiving a request within the firmware environment to store data within a first memory area of the plurality of memory areas, the first memory area defined by a first area descriptor of the area descriptors, the request being associated with a plurality of memory addresses within the first memory area.
    Type: Application
    Filed: February 19, 2016
    Publication date: January 26, 2017
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Publication number: 20170024131
    Abstract: Methods and systems for implementing a secure migratable architecture having improved performance features over existing virtualization systems are disclosed. One method includes allocating a portion of a memory for use by a process, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method includes associating area descriptors with each of a plurality of memory areas within the portion of the memory used by the process, and receiving a request within the firmware environment to store data within a first memory area of the plurality of memory areas, the first memory area defined by a first area descriptor of the area descriptors, the request being associated with a plurality of memory addresses within the first memory area.
    Type: Application
    Filed: February 19, 2016
    Publication date: January 26, 2017
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Publication number: 20170024130
    Abstract: Methods and systems for implementing a secure migratable architecture are disclosed. One method includes, upon initiating execution of a process, allocating a portion of a memory for use by the process during execution, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method also includes executing the process hosted by the operating system, wherein the firmware environment manages the portion of the memory using one or more area descriptors to describe the portion of the memory, each of the one or more area descriptors defining to the firmware environment a base address at which a memory area is located, the base address translated to an address in the memory managed by the operating system, the memory area being within the portion of memory allocated for use by the process.
    Type: Application
    Filed: February 19, 2016
    Publication date: January 26, 2017
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Publication number: 20170024129
    Abstract: Methods and systems for executing virtualized processes on a computing system are disclosed, including techniques for memory management when executing such processes. One method includes allocating a portion of memory to a process hosted by an operating system of a computing system having a first computing architecture, the process comprising a firmware environment implementing a second computing architecture different from the first computing architecture, the first computing architecture applying virtual addressing to the portion of memory. The method further includes receiving a memory access request within the process, the memory access request including a direct address of a memory location within the portion of memory, according to the second computing architecture, and passing to the operating system the memory access request from the process.
    Type: Application
    Filed: February 19, 2016
    Publication date: January 26, 2017
    Applicant: UNISYS CORPORATION
    Inventors: ANDREW WARD BEALE, DAVID STRONG
  • Publication number: 20160371101
    Abstract: Systems and methods are disclosed that ensure high availability of such an architecture hosted on commodity platforms. One method includes initializing, by an operating system, execution of a process by the programmable circuit, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the operating system and process reside, the process further including one or more workloads to be executed within the process. The method also includes allocating a portion of the memory for use by the process, the portion of memory including a plurality of memory segments, and generating a plurality of area descriptors associated with the plurality of memory segments, each of the area descriptors defining a location and length of a corresponding memory segment.
    Type: Application
    Filed: February 19, 2016
    Publication date: December 22, 2016
    Applicant: Unisys Corporation
    Inventors: Andrew Ward Beale, David Strong
  • Patent number: 9465591
    Abstract: Systems and methods for validating operation of a compiler are disclosed. One method includes receiving a definition of language syntax at an automated source code generator, and generating program code at the automated source code generator, the program code represented in source code including constructed self-validating code and syntactically-correct automatically generated code. The method also includes providing the source code to the compiler to be compiled into object code. Based on execution of the self-validating code as object code in a computing system, a computing system executing the object code outputs an indication of the correctness of compilation of the program code.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: October 11, 2016
    Assignee: Unisys Corporation
    Inventors: Andrew Ward Beale, Steven Hurlock, Patricia Nichols
  • Publication number: 20160283512
    Abstract: Systems and methods for accessing files in a distributed computing network are disclosed. One method includes issuing, at an application executing on a first computing system, a file access request to access a file, the file access request issued to an input/output subsystem of the first computing system, the first computing system operating using a first operating system, the file access request identifying the file and a location within the file. The method also includes receiving, at an input/output processor of the first computing system, the file access request, and routing the file access request from the input/output processor to a remote computing system for managing the file access request based on a determination by the input/output processor that the file is stored at a computing system remote from the first computing system.
    Type: Application
    Filed: March 26, 2015
    Publication date: September 29, 2016
    Applicant: UNISYS CORPORATION
    Inventor: Andrew Ward Beale