Patents by Inventor Angelo Visconti
Angelo Visconti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210210130Abstract: Methods, systems, and devices for memory management associated with charge leakage in a memory device are described. A memory device may identify a charge leakage associated with one or more memory cells or access lines, and may determine whether to invert a logic state stored by a memory cell or a set of memory cells to improve the likelihood that the memory cells are read properly in the presence of charge leakage. In some examples, the memory device may also store an indication that the complement of the detected logic state was written, such as a bit flip indication, which may correspond to one memory cell or a set of memory cells.Type: ApplicationFiled: March 22, 2021Publication date: July 8, 2021Inventor: Angelo Visconti
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Patent number: 11056178Abstract: Methods, systems, and devices for read operations based on a dynamic reference are described. A memory device may include a set of memory cells each associated with a capacitive circuit including a first and second capacitor. After receiving a read command, the memory device may couple each capacitive circuit with a respective memory cell (e.g., to transfer a charge stored by each respective memory cell to a capacitive circuit) and may couple the second capacitor of each capacitive circuit to a reference voltage bus. Thus, a reference voltage on the reference voltage bus may be based on an average charge across the second capacitors of each capacitive circuit. The memory device may then compare a charge stored by the first and second capacitors of each capacitive circuit with the reference voltage bus and may output a set of values stored by the set of memory cells based on the comparing.Type: GrantFiled: July 20, 2020Date of Patent: July 6, 2021Assignee: Micron Technology, Inc.Inventors: Ferdinando Bedeschi, Umberto Di Vincenzo, Riccardo Muzzetto, Angelo Visconti
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Publication number: 20210193210Abstract: Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activate pulse may be applied to the memory cell during the access phase. The memory cell may be biased to a non-zero voltage after applying the activate pulse and before a pre-charge phase. The pre-charge phase of the access phase may be initiated after biasing the memory cell to the non-zero voltage.Type: ApplicationFiled: January 7, 2021Publication date: June 24, 2021Inventors: Angelo Visconti, Andrea Locatelli, Giorgio Servalli
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Patent number: 10984847Abstract: Methods, systems, and devices for memory management associated with charge leakage in a memory device are described. A memory device may identify a charge leakage associated with one or more memory cells or access lines, and may determine whether to invert a logic state stored by a memory cell or a set of memory cells to improve the likelihood that the memory cells are read properly in the presence of charge leakage. In some examples, the memory device may also store an indication that the complement of the detected logic state was written, such as a bit flip indication, which may correspond to one memory cell or a set of memory cells.Type: GrantFiled: June 14, 2019Date of Patent: April 20, 2021Assignee: Micron Technology, Inc.Inventor: Angelo Visconti
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Patent number: 10964372Abstract: Methods, systems, and devices for memory cell biasing techniques are described. A memory cell may be accessed during an access phase of an access operation. A pre-charge phase of the access phase may be initiated. The memory cell may be biased to a voltage (e.g., a non-zero voltage) after the pre-charge phase. In some examples, the memory cell may be biased to the voltage when a word line is unbiased and the memory cell is isolated from the digit line.Type: GrantFiled: June 14, 2019Date of Patent: March 30, 2021Assignee: Micron Technology, Inc.Inventors: Angelo Visconti, Giorgio Servalli, Andrea Locatelli
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Publication number: 20210027842Abstract: Memory devices might include a controller configured to cause the memory device to apply a first plurality of incrementally increasing programming pulses to control gates of a particular plurality of memory cells selected for programming to respective intended data states, determine a first occurrence of a criterion being met, store a representation of a voltage level corresponding to a particular programming pulse in response to the first occurrence of the criterion being met, set a starting programming voltage for a second plurality of incrementally increasing programming pulses in response to the stored representation of the voltage level corresponding to the particular programming pulse, and apply the second plurality of incrementally increasing programming pulses to control gates of a different plurality of memory cells selected for programming to respective intended data states.Type: ApplicationFiled: October 12, 2020Publication date: January 28, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Silvia Beltrami, Angelo Visconti
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Patent number: 10896712Abstract: Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activate pulse may be applied to the memory cell during the access phase. The memory cell may be biased to a non-zero voltage after applying the activate pulse and before a pre-charge phase. The pre-charge phase of the access phase may be initiated after biasing the memory cell to the non-zero voltage.Type: GrantFiled: June 14, 2019Date of Patent: January 19, 2021Assignee: Micron Technology, Inc.Inventors: Angelo Visconti, Andrea Locatelli, Giorgio Servalli
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Publication number: 20200395059Abstract: Methods, systems, and devices for memory management associated with charge leakage in a memory device are described. A memory device may identify a charge leakage associated with one or more memory cells or access lines, and may determine whether to invert a logic state stored by a memory cell or a set of memory cells to improve the likelihood that the memory cells are read properly in the presence of charge leakage. In some examples, the memory device may also store an indication that the complement of the detected logic state was written, such as a bit flip indication, which may correspond to one memory cell or a set of memory cells.Type: ApplicationFiled: June 14, 2019Publication date: December 17, 2020Inventor: Angelo Visconti
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Publication number: 20200395056Abstract: Methods, systems, and devices for memory cell biasing techniques are described. A memory cell may be accessed during an access phase of an access operation. A pre-charge phase of the access phase may be initiated. The memory cell may be biased to a voltage (e.g., a non-zero voltage) after the pre-charge phase. In some examples, the memory cell may be biased to the voltage when a word line is unbiased and the memory cell is isolated from the digit line.Type: ApplicationFiled: June 14, 2019Publication date: December 17, 2020Inventors: Angelo Visconti, Giorgio Servalli, Andrea Locatelli
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Publication number: 20200395057Abstract: Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activate pulse may be applied to the memory cell during the access phase. The memory cell may be biased to a non-zero voltage after applying the activate pulse and before a pre-charge phase. The pre-charge phase of the access phase may be initiated after biasing the memory cell to the non-zero voltage.Type: ApplicationFiled: June 14, 2019Publication date: December 17, 2020Inventors: Angelo Visconti, Andrea Locatelli, Giorgio Servalli
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Patent number: 10811098Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.Type: GrantFiled: July 30, 2019Date of Patent: October 20, 2020Assignee: Micron Technology, Inc.Inventors: Silvia Beltrami, Angelo Visconti
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Patent number: 10586597Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.Type: GrantFiled: June 27, 2018Date of Patent: March 10, 2020Assignee: Micron Technology, Inc.Inventors: Silvia Beltrami, Angelo Visconti
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Publication number: 20190355423Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.Type: ApplicationFiled: July 30, 2019Publication date: November 21, 2019Applicant: MICRON TECHNOLOGY, INC.Inventors: Silvia Beltrami, Angelo Visconti
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Publication number: 20180308552Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.Type: ApplicationFiled: June 27, 2018Publication date: October 25, 2018Applicant: MICRON TECHNOLOGY, INC.Inventors: Silvia Beltrami, Angelo Visconti
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Patent number: 10074432Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.Type: GrantFiled: September 16, 2015Date of Patent: September 11, 2018Assignee: Micron Technology, Inc.Inventors: Silvia Beltrami, Angelo Visconti
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Patent number: 9454427Abstract: This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a data pattern such that a value to be stored by the selected memory cell matches a value associated with a hard error, and programming the shifted data pattern to memory array such that the value programmed to the selected memory cell matches the value associated with the hard error.Type: GrantFiled: September 15, 2015Date of Patent: September 27, 2016Assignee: MICRON TECHNOLOGY, INC.Inventors: Aswin Thiruvengadam, Angelo Visconti, Mauro Bonanomi, Richard E. Fackenthal, William Melton
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Patent number: 9349481Abstract: A method of operating a semiconductor memory device includes performing a first program operation in order to raise threshold voltages of memory cells, performing a program verification operation for detecting fast program memory cells, each having a threshold voltage risen higher than a first sub-verification voltage from a second sub-verification voltage or lower, by using a target verification voltage and the first sub-verification voltage and the second sub-verification voltage which are sequentially lower than the target verification voltage, and performing a second program operation under a condition that an increment of each of threshold voltages of memory cells, which is lower than the target verification voltage, is greater than an increment of the threshold voltage of each of the fast program memory cells.Type: GrantFiled: March 6, 2014Date of Patent: May 24, 2016Assignee: SK Hynix Inc.Inventors: Seiichi Aritome, Soo Jin Wi, Angelo Visconti, Mattia Robustelli
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Publication number: 20160005473Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.Type: ApplicationFiled: September 16, 2015Publication date: January 7, 2016Applicant: MICRON TECHNOLOGY, INC.Inventors: Silvia Beltrami, Angelo Visconti
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Publication number: 20160004595Abstract: This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a data pattern such that a value to be stored by the selected memory cell matches a value associated with a hard error, and programming the shifted data pattern to memory array such that the value programmed to the selected memory cell matches the value associated with the hard error.Type: ApplicationFiled: September 15, 2015Publication date: January 7, 2016Inventors: Aswin Thiruvengadam, Angelo Visconti, Mauro Bonanomi, Richard E. Fackenthal, William Melton
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Patent number: 9183941Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.Type: GrantFiled: December 29, 2014Date of Patent: November 10, 2015Assignee: Micron Technology, Inc.Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin