Patents by Inventor Ansheng Liu
Ansheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11940678Abstract: An optical modulator includes a substrate, a first dielectric layer over the substrate, a rib waveguide including a PN junction on the first dielectric, a second dielectric layer over the rib waveguide and a stressor layer including a metal, where the first or the second dielectric is between the stressor layer and the PN junction.Type: GrantFiled: December 22, 2020Date of Patent: March 26, 2024Assignee: Intel CorporationInventors: Mengyuan Huang, David Patel, Kejia Li, Wei Qian, Ansheng Liu
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Patent number: 11906777Abstract: Embodiments may relate to a wavelength-division multiplexing (WDM) transceiver that has a silicon waveguide layer coupled with a silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may include a tapered portion that is coupled with the silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may be coupled with a first oxide layer with a first z-height, and the silicon nitride waveguide layer may be coupled with a second oxide layer with a second z-height that is greater than the first z-height. Other embodiments may be described or claimed.Type: GrantFiled: February 21, 2020Date of Patent: February 20, 2024Assignee: Intel CorporationInventors: John Heck, Lina He, Sungbong Park, Olufemi Isiade Dosunmu, Harel Frish, Kelly Christopher Magruder, Seth M. Slavin, Wei Qian, Ansheng Liu, Nutan Gautam, Mark Isenberger
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Publication number: 20230087429Abstract: Embodiments herein relate to a photonic integrated circuit (PIC). The PIC may include a transmit module and a receive module. An optical port of the PIC may be coupled to the transmit module or the receive module. A semiconductor optical amplifier (SOA) may be positioned in a signal pathway between the optical port and the transmit module or the receive module. Other embodiments may be described and/or claimed.Type: ApplicationFiled: November 29, 2022Publication date: March 23, 2023Inventors: Giovanni Gilardi, Haijiang Yu, Ansheng Liu, Xiaoxing Zhu, Yuliya Akulova, Raghuram Narayan, Pierre Doussiere, Christian Malouin, Olufemi Dosunmu
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Publication number: 20220416097Abstract: A photodetector structure over a partial length of a silicon waveguide structure within a photonic integrated circuit (PIC) chip. The photodetector structure is embedded within a cladding material surrounding the waveguide structure. The photodetector structure includes an absorption region, for example comprising Ge. A sidewall of the cladding material may be lined with a sacrificial spacer. After forming the absorption region, the sacrificial spacer may be removed and passivation material formed over a sidewall of the absorption region. Between the absorption region an impurity-doped portion of the waveguide structure there may be a carrier multiplication region, for example comprising crystalline silicon. If present, edge facets of the carrier multiplication region may be protected by a spacer material during the formation of an impurity-doped charge carrier layer. Occurrence of edge facets may be mitigated by embedding a portion of the photodetector structure with a thickness of the waveguide structure.Type: ApplicationFiled: June 25, 2021Publication date: December 29, 2022Applicant: Intel CorporationInventors: David Kohen, Kelly Magruder, Parastou Fakhimi, Zhi Li, Cung Tran, Wei Qian, Mark Isenberger, Mengyuan Huang, Harel Frish, Reece DeFrees, Ansheng Liu
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Publication number: 20220065994Abstract: A light detection and ranging system that may include a light source configured to provide a second optical input signal to a second input port of a multimode interferometer that is phase shifted to a first optical input signal provided to a first input port of the multimode interferometer. The multimode interferometer is configured to provide a second optical output signal to a second optical channel coupled to a second output port of the multimode interferometer, and to provide a first optical output signal to a first optical channel coupled to a first output port of the multimode interferometer. Each of the first optical channel and the second optical channel is configured to emit light to an outside of the light detection and ranging system, and wherein the multimode interferometer is configured to generate a frequency difference between the first optical output signal and the second optical output signal.Type: ApplicationFiled: November 10, 2021Publication date: March 3, 2022Inventors: Zhi LI, Jonathan DOYLEND, Ansheng LIU, Faraz MONIFI
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Patent number: 11251228Abstract: Optical receiver packages and device assemblies that include photodetector (PD) chips having focus lenses monolithically integrated on PD die backsides are disclosed. An example receiver package includes a support structure, a PD die, and an optical input device. The PD die includes a PD, integrated proximate to a first face of the PD die, and further includes a lens, integrated on, or proximate to, an opposite second face. The first face of the PD die faces the support structure, while the second face (“backside”) faces the optical input device. The optical receiver architectures described herein may provide an improvement for the optical alignment tolerance issues, especially for high-speed operation in which the active aperture of the PD may have to be very small. Furthermore, architectures described herein advantageously enable integrating a focus lens in a PD die that may be coupled to the support structure in a flip-chip arrangement.Type: GrantFiled: December 19, 2018Date of Patent: February 15, 2022Assignee: Intel CorporationInventors: Boping Xie, Ansheng Liu, Olufemi Isiade Dosunmu, Alexander Krichevsky, Kelly Christopher Magruder, Harel Frish
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Publication number: 20220019098Abstract: An optical modulator includes a substrate, a first dielectric layer over the substrate, a rib waveguide including a PN junction on the first dielectric, a second dielectric layer over the rib waveguide and a stressor layer including a metal, where the first or the second dielectric is between the stressor layer and the PN junction.Type: ApplicationFiled: December 22, 2020Publication date: January 20, 2022Applicant: Intel CorporationInventors: Mengyuan Huang, David Patel, Kejia Li, Wei Qian, Ansheng Liu
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Publication number: 20210302652Abstract: Techniques for photonic demultiplexers are disclosed. In the illustrative embodiment, an output of an unbalanced interferometer formed from waveguides is positioned to the input of a slab grating, with several output waveguides collecting light in different wavelength ranges to create different channels for the demultiplexer system. In some embodiments, one or more auxiliary structures may be positioned near the input of the grating to change the structure of the spatial modes being provided as an input to the grating in order to alter the spectra of the output channels.Type: ApplicationFiled: June 9, 2021Publication date: September 30, 2021Applicant: Intel CorporationInventors: Boris M. Vulovic, Tiehui Su, Nutan Gautam, Wenhua Lin, Mehbuba Tanzid, Ansheng Liu, Wei Qian
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Publication number: 20210175974Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to fully integrated optical coherent modulators on a silicon chip. These coherent modulators may be used to enable transmitters, receivers, transceivers, tunable lasers and other optical or electro-optical devices to be integrated on a silicon chip. In embodiments, the optical coherent modulators may be based on differential microring modulators that may be nested in a Mach-Zehnder Interferometer (MZI) configuration. Embodiments may also be directed to a miniaturized and fully integrated coherent modulators, which can enable terabit per second (Tbps) transceivers in a small form factor based on coherent modulation on a silicon chip. Other embodiments may be described and/or claimed.Type: ApplicationFiled: February 19, 2021Publication date: June 10, 2021Inventors: Aliasghar EFTEKHAR, Duanni HUANG, Meer Nazmus SAKIB, Haisheng RONG, Ansheng LIU, Peicheng LIAO, Hao LI
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Patent number: 11029205Abstract: Embodiments described herein relate to techniques and configurations associated with a photonic apparatus (e.g., PIC) having a photodiode and a bypass capacitor disposed in a channel. In one instance, the apparatus includes a substrate in which at least first and second channels are formed. The first channel includes a first photodiode and a first capacitor coupled to the first photodiode, and the second channel includes a second photodiode and a second capacitor coupled with the second photodiode. The first and second capacitors are provided to assist with biasing the first and second photodiodes respectively and to isolate a signal output by the first and second photodiodes from interference provided by the power supply associated with the apparatus. Additional embodiments can be described and claimed.Type: GrantFiled: July 16, 2019Date of Patent: June 8, 2021Assignee: Intel CorporationInventors: Sungbong Park, Ansheng Liu
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Publication number: 20210006044Abstract: Embodiments of the present disclosure are directed to a silicon photonics integrated apparatus that includes an input to receive an optical signal, a splitter optically coupled to the input to split the optical signal at a first path and a second path, a polarization beam splitter and rotator (PBSR) optically coupled with the first path or the second path, and a semiconductor optical amplifier (SOA) optically coupled with the first path or the second path and disposed between the splitter and the PBSR. Other embodiments may be described and/or claimed.Type: ApplicationFiled: September 17, 2020Publication date: January 7, 2021Inventors: Jin Hong, Ranjeet Kumar, Meer Nazmus Sakib, Haisheng Rong, Kimchau Nguyen, Mengyuan Huang, Aliasghar Eftekhar, Christian Malouin, Siamak Amiralizadeh Asl, Saeed Fathololoumi, Ling Liao, Yuliya Akulova, Olufemi Dosunmu, Ansheng Liu
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Publication number: 20200192026Abstract: Embodiments may relate to a wavelength-division multiplexing (WDM) transceiver that has a silicon waveguide layer coupled with a silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may include a tapered portion that is coupled with the silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may be coupled with a first oxide layer with a first z-height, and the silicon nitride waveguide layer may be coupled with a second oxide layer with a second z-height that is greater than the first z-height. Other embodiments may be described or claimed.Type: ApplicationFiled: February 21, 2020Publication date: June 18, 2020Applicant: Intel CorporationInventors: John Heck, Lina He, Sungbong Park, Olufemi Isiade Dosunmu, Harel Frish, Kelly Christopher Magruder, Seth M. Slavin, Wei Qian, Ansheng Liu, Nutan Gautam, Mark Isenberger
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Publication number: 20190339122Abstract: Embodiments described herein relate to techniques and configurations associated with a photonic apparatus (e.g., PIC) having a photodiode and a bypass capacitor disposed in a channel. In one instance, the apparatus includes a substrate in which at least first and second channels are formed. The first channel includes a first photodiode and a first capacitor coupled to the first photodiode, and the second channel includes a second photodiode and a second capacitor coupled with the second photodiode. The first and second capacitors are provided to assist with biasing the first and second photodiodes respectively and to isolate a signal output by the first and second photodiodes from interference provided by the power supply associated with the apparatus. Additional embodiments can be described and claimed.Type: ApplicationFiled: July 16, 2019Publication date: November 7, 2019Inventors: Sungbong Park, Ansheng Liu
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Publication number: 20190123109Abstract: Optical receiver packages and device assemblies that include photodetector (PD) chips having focus lenses monolithically integrated on PD die backsides are disclosed. An example receiver package includes a support structure, a PD die, and an optical input device. The PD die includes a PD, integrated proximate to a first face of the PD die, and further includes a lens, integrated on, or proximate to, an opposite second face. The first face of the PD die faces the support structure, while the second face (“backside”) faces the optical input device. The optical receiver architectures described herein may provide an improvement for the optical alignment tolerance issues, especially for high-speed operation in which the active aperture of the PD may have to be very small. Furthermore, architectures described herein advantageously enable integrating a focus lens in a PD die that may be coupled to the support structure in a flip-chip arrangement.Type: ApplicationFiled: December 19, 2018Publication date: April 25, 2019Applicant: Intel CorporationInventors: Boping Xie, Ansheng Liu, Olufemi Isiade Dosunmu, Alexander Krichevsky, Kelly Christopher Magruder, Harel Frish
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Publication number: 20180231728Abstract: A single hybrid electrical/optical connector simultaneously forms both electrical and optical input/output connections by a single step engagement between elements on a connector and corresponding elements of the opposite gender on a mating connector. The connector can be surface-mounted on a circuit board, and a mating connector can be vertically pluggable onto the connector. The optical elements on the connector and/or the mating connector can be detachable, which can simplify assembly of a system that includes the circuit board. The hybrid electrical/optical connector has applications for optical transceivers. The hybrid electrical/optical connector includes a housing that extends laterally along a housing plane. The housing includes electrical and optical sockets thereon. In some examples, the electrical sockets and the optical sockets are laterally arranged on opposite sides of a division plane perpendicular to the housing plane.Type: ApplicationFiled: January 11, 2018Publication date: August 16, 2018Inventors: Donald Faw, Zining Huang, Ansheng Liu
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Patent number: 10014654Abstract: Optoelectronic packaging assemblies are provided that are useful for optical data, transfer In high performance computing applications, board to board in data centers, memory to CPU, switch/FPGA (field programmable gate array) for chip to chip interconnects, and memory extension. The packaging assemblies provide fine pitch flip chip interconnects and chip stacking assemblies with good thermo-mechanical reliability. Underfill dams and optical overhang regions and are provided for optical interconnection.Type: GrantFiled: December 27, 2013Date of Patent: July 3, 2018Assignee: Intel CorporationInventors: Myung Jin Yim, Ansheng Liu, Valentin Yepanechnikov
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Patent number: 9900102Abstract: Embodiments of the present disclosure provide an apparatus comprising an integrated circuit with a chip-on-chip and chip-on-substrate configuration. In one instance, the apparatus may include an optical transceiver with an opto-electronic component disposed in a first portion of a die, and a trace coupled with the opto-electronic component and disposed to extend to a surface in a second portion of the die adjacent to the first portion, to provide electrical connection for the integrated circuit and another integrated circuit to be coupled with the second portion of the die in a chip-on-chip configuration. The apparatus may include a second trace disposed in the second portion of the die to extend to the surface in the second portion, to provide electrical connection for the other integrated circuit and a substrate to be coupled with the second portion of the die in a chip-on-substrate configuration. Other embodiments may be described and/or claimed.Type: GrantFiled: December 1, 2015Date of Patent: February 20, 2018Assignee: Intel CorporationInventors: Olufemi I. Dosunmu, Myung Jin Yim, Ansheng Liu
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Patent number: 9880367Abstract: A single hybrid electrical/optical connector simultaneously forms both electrical and optical input/output connections by a single step engagement between elements on a connector and corresponding elements of the opposite gender on a mating connector. The connector can be surface-mounted on a circuit board, and a mating connector can be vertically pluggable onto the connector. The optical elements on the connector and/or the mating connector can be detachable, which can simplify assembly of a system that includes the circuit board. The hybrid electrical/optical connector has applications for optical transceivers. The hybrid electrical/optical connector includes a housing that extends laterally along a housing plane. The housing includes electrical and optical sockets thereon. In some examples, the electrical sockets and the optical sockets are laterally arranged on opposite sides of a division plane perpendicular to the housing plane.Type: GrantFiled: December 19, 2013Date of Patent: January 30, 2018Assignee: Intel CorporationInventors: Donald Faw, Zining Huang, Ansheng Liu
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Publication number: 20170336565Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for a single mode optical coupler device. In some embodiments, the device may include a multi-stage optical taper to convert light from a first mode field diameter to a second mode field diameter larger than the first mode field diameter, and a mirror formed in a dielectric layer under an approximately 45 degree angle with respect to a plane of the dielectric layer to reflect light from the multi-stage optical taper substantially perpendicularly to propagate the light in a single mode fashion. Other embodiments may be described and/or claimed.Type: ApplicationFiled: September 30, 2016Publication date: November 23, 2017Inventors: Judson D. Ryckman, Harel Frish, George A. Ghiurcan, Ansheng Liu, Haisheng Rong, Pradeep Srinivasan, Carsten Brandt, Isako Hoshino, Michael A. Creighton
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Publication number: 20170288780Abstract: Apparatuses including integrated circuit (IC) optical assemblies and processes for fabrication of IC optical assemblies are disclosed herein. In some embodiments, the IC optical assemblies include an optical transmitter component electrically coupled to a first portion of a packaging substrate. The IC optical assemblies further include an optical transmitter driver component between the optical transmitter component and a second portion of the packaging substrate, wherein a first side of the optical transmitter driver component is electrically coupled to the optical transmitter component. The IC optical assemblies further include a plurality of bumps between a second side of the optical transmitter driver component and proximate the second portion of the packaging substrate, wherein the plurality of bumps are not directly coupled to the optical transmitter driver component.Type: ApplicationFiled: March 31, 2016Publication date: October 5, 2017Inventors: Myung Jin Yim, Quan A. Tran, SeungJae Lee, Sandeep Razdan, Yigit O. Yilmaz, Pradeep Srinivasan, Jincheng Wang, Ansheng Liu