Patents by Inventor Ansheng Liu

Ansheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9761746
    Abstract: A low voltage APD is disposed at an end of a waveguide extending laterally within a silicon device layer of a PIC chip. The APD is disposed over an inverted re-entrant mirror co-located at the end of the waveguide to couple light by internal reflection from the waveguide to an under side of the APD. In exemplary embodiments, a 45°-55° facet is formed in the silicon device layer by crystallographic etch. In embodiments, the APD includes a silicon multiplication layer, a germanium absorption layer over the multiplication layer, and a plurality of ohmic contacts disposed over the absorption layer. An overlying optically reflective metal film interconnects the plurality of ohmic contacts and returns light transmitted around the ohmic contacts to the absorption layer for greater detector responsivity.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: September 12, 2017
    Assignee: Intel Corporation
    Inventors: Yimin Kang, Han-Din D. Liu, Ansheng Liu
  • Publication number: 20170155450
    Abstract: Embodiments of the present disclosure provide an apparatus comprising an integrated circuit with a chip-on-chip and chip-on-substrate configuration. In one instance, the apparatus may include an optical transceiver with an opto-electronic component disposed in a first portion of a die, and a trace coupled with the opto-electronic component and disposed to extend to a surface in a second portion of the die adjacent to the first portion, to provide electrical connection for the integrated circuit and another integrated circuit to be coupled with the second portion of the die in a chip-on-chip configuration. The apparatus may include a second trace disposed in the second portion of the die to extend to the surface in the second portion, to provide electrical connection for the other integrated circuit and a substrate to be coupled with the second portion of the die in a chip-on-substrate configuration. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 1, 2015
    Publication date: June 1, 2017
    Inventors: Olufemi I. Dosunmu, Myung Jin Yim, Ansheng Liu
  • Publication number: 20170005453
    Abstract: Optoelectronic packaging assemblies are provided that are useful for optical data, transfer In high performance computing applications, board to board in data centers, memory to CPU, switch/FPGA (field programmable gate array) for chip to chip interconnects, and memory extension. The packaging assemblies provide fine pitch flip chip interconnects and chip stacking assemblies with good thermo-mechanical reliability. Underfill dams and optical overhang regions and are provided for optical interconnection.
    Type: Application
    Filed: December 27, 2013
    Publication date: January 5, 2017
    Inventors: Myung Jin YIM, Ansheng LIU, Valentin YEPANECHNIKOV
  • Publication number: 20160238808
    Abstract: A single hybrid electrical/optical connector simultaneously forms both electrical and optical input/output connections by a single step engagement between elements on a connector and corresponding elements of the opposite gender on a mating connector. The connector can be surface-mounted on a circuit board, and a mating connector can be vertically pluggable onto the connector. The optical elements on the connector and/or the mating connector can be detachable, which can simplify assembly of a system that includes the circuit board. The hybrid electrical/optical connector has applications for optical transceivers. The hybrid electrical/optical connector includes a housing that extends laterally along a housing plane. The housing includes electrical and optical sockets thereon. In some examples, the electrical sockets and the optical sockets are laterally arranged on opposite sides of a division plane perpendicular to the housing plane.
    Type: Application
    Filed: December 19, 2013
    Publication date: August 18, 2016
    Inventors: Donald Faw, Zining Huang, Ansheng Liu
  • Patent number: 9099352
    Abstract: Embodiments of the present disclosure describe semiconductor substrate techniques and configurations for an optical receiver. In one embodiment, a system includes a semiconductor substrate having one or more optical alignment features formed in a surface of the semiconductor substrate and an optical receiver assembly coupled with the semiconductor substrate, the optical receiver assembly including a photodetector device coupled with the surface of the semiconductor substrate, wherein the one or more optical alignment features facilitate precise optical alignment between a lens assembly and the photodetector device when the lens assembly is coupled with the semiconductor substrate using the one or more optical alignment features. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: August 4, 2015
    Assignee: Intel Corporation
    Inventors: John Heck, Ansheng Liu, Brian H. Kim
  • Patent number: 9076902
    Abstract: An integrated optical receiver architecture may be used to couple light between a multi-mode fiber (MMF) and silicon chip which includes integration of a silicon de-multiplexer and a high-speed Ge photo-detector. The proposed architecture may be used for both parallel and wavelength division multiplexing (WDM) based optical links with a data rate of 25 Gb/s and beyond.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: July 7, 2015
    Assignee: Intel Corporation
    Inventor: Ansheng Liu
  • Publication number: 20140367740
    Abstract: A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region including a first type of semiconductor region proximate to a second type of semiconductor region. The first type of semiconductor is to absorb light in a first range of wavelengths and the second type of semiconductor to absorb light in a second range of wavelengths. A multiplication region is defined proximate to and separate from the absorption region. The multiplication region includes an intrinsic semiconductor region in which there is an electric field to multiply the electrons created in the absorption region.
    Type: Application
    Filed: August 28, 2014
    Publication date: December 18, 2014
    Inventors: Micheal T. Morse, Olufemi I. Dosunmu, Ansheng Liu, Mario J. Paniccia
  • Patent number: 8866247
    Abstract: Described are embodiments of apparatuses and systems including photonic devices having a conductive shunt layer, and methods for making such apparatuses and systems. A photonic device may include a device substrate, a photo-active region disposed on a first region of the device substrate, an isolation region in the device substrate, a contact disposed on a second region of the substrate such that the isolation region is located between the contact and the photo-active region, and a conductive material overlying the isolation region to shunt the first region with the second region. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: October 21, 2014
    Assignee: Intel Corporation
    Inventors: Avi Feshali, Tao Sherry Yin, Ansheng Liu
  • Publication number: 20140252411
    Abstract: A low voltage APD is disposed at an end of a waveguide extending laterally within a silicon device layer of a PIC chip. The APD is disposed over an inverted re-entrant mirror co-located at the end of the waveguide to couple light by internal reflection from the waveguide to an under side of the APD. In exemplary embodiments, a 45°-55° facet is formed in the silicon device layer by crystallographic etch. In embodiments, the APD includes a silicon multiplication layer, a germanium absorption layer over the multiplication layer, and a plurality of ohmic contacts disposed over the absorption layer. An overlying optically reflective metal film interconnects the plurality of ohmic contacts and returns light transmitted around the ohmic contacts to the absorption layer for greater detector responsivity.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Inventors: Yimin Kang, Han-Din D. Liu, Ansheng Liu
  • Patent number: 8829566
    Abstract: A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region including a first type of semiconductor region proximate to a second type of semiconductor region. The first type of semiconductor is to absorb light in a first range of wavelengths and the second type of semiconductor to absorb light in a second range of wavelengths. A multiplication region is defined proximate to and separate from the absorption region. The multiplication region includes an intrinsic semiconductor region in which there is an electric field to multiply the electrons created in the absorption region.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: September 9, 2014
    Assignee: Intel Corporation
    Inventors: Michael T. Morse, Olufemi I. Dosunmu, Ansheng Liu, Mario J. Paniccia
  • Patent number: 8803268
    Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: August 12, 2014
    Assignee: Intel Corporation
    Inventors: John Heck, Ansheng Liu, Michael T. Morse, Haisheng Rong
  • Publication number: 20140008750
    Abstract: Described are embodiments of apparatuses and systems including photonic devices having a conductive shunt layer, and methods for making such apparatuses and systems. A photonic device may include a device substrate, a photo-active region disposed on a first region of the device substrate, an isolation region in the device substrate, a contact disposed on a second region of the substrate such that the isolation region is located between the contact and the photo-active region, and a conductive material overlying the isolation region to shunt the first region with the second region. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 29, 2012
    Publication date: January 9, 2014
    Inventors: Avi Feshali, Tao Sherry Yin, Ansheng Liu
  • Publication number: 20130328145
    Abstract: An integrated optical receiver architecture may be used to couple light between a multi-mode fiber (MMF) and silicon chip which includes integration of a silicon de-multiplexer and a high-speed Ge photo-detector. The proposed architecture may be used for both parallel and wavelength division multiplexing (WDM) based optical links with a data rate of 25 Gb/s and beyond.
    Type: Application
    Filed: November 27, 2012
    Publication date: December 12, 2013
    Inventor: Ansheng Liu
  • Publication number: 20130299932
    Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.
    Type: Application
    Filed: April 26, 2013
    Publication date: November 14, 2013
    Inventors: JOHN HECK, ANSHENG LIU, MICHAEL T. MORSE, HAISHENG RONG
  • Publication number: 20130273672
    Abstract: Embodiments of the present disclosure describe semiconductor substrate techniques and configurations for an optical receiver. In one embodiment, a system includes a semiconductor substrate having one or more optical alignment features formed in a surface of the semiconductor substrate and an optical receiver assembly coupled with the semiconductor substrate, the optical receiver assembly including a photodetector device coupled with the surface of the semiconductor substrate, wherein the one or more optical alignment features facilitate precise optical alignment between a lens assembly and the photodetector device when the lens assembly is coupled with the semiconductor substrate using the one or more optical alignment features. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 8, 2011
    Publication date: October 17, 2013
    Inventors: John Heck, Ansheng Liu, Brian H. Kim
  • Patent number: 8530818
    Abstract: Techniques and architectures for providing a reflective target area of an integrated circuit die assembly. In an embodiment, a reflective bevel surface of a die allows an optical signal to be received from the direction of a side surface of a die assembly for reflection into a photodetector. In another embodiment, one or more grooves in a coupling surface of the die provide respective leverage points for aligning a target area of the bevel surface with a detecting surface of the photodetector.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: September 10, 2013
    Assignee: Intel Corporation
    Inventors: John Heck, Ansheng Liu, Mario J. Paniccia
  • Patent number: 8450186
    Abstract: Optical modulator utilizing wafer bonding technology. An embodiment of a method includes etching a silicon on insulator (SOI) wafer to produce a first part of a silicon waveguide structure on a first surface of the SOI wafer, and preparing a second wafer, the second wafer including a layer of crystalline silicon, the second wafer including a first surface of crystalline silicon. The method further includes bonding the first surface of the second wafer with a thin oxide to the first surface of the SOI wafer using a wafer bonding technique, wherein a second part of the silicon waveguide structure is etched in the layer of crystalline silicon.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 28, 2013
    Assignee: Intel Corporation
    Inventors: Haisheng Rong, Ansheng Liu
  • Patent number: 8435809
    Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 7, 2013
    Assignee: Intel Corporation
    Inventors: John Heck, Ansheng Liu, Michael T. Morse, Haisheng Rong
  • Patent number: 8338857
    Abstract: A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region including a first type of semiconductor region proximate to a second type of semiconductor region. The first type of semiconductor is to absorb light in a first range of wavelengths and the second type of semiconductor to absorb light in a second range of wavelengths. A multiplication region is defined proximate to and separate from the absorption region. The multiplication region includes an intrinsic semiconductor region in which there is an electric field to multiply the electrons created in the absorption region.
    Type: Grant
    Filed: August 28, 2010
    Date of Patent: December 25, 2012
    Assignee: Intel Corporation
    Inventors: Michael T. Morse, Olufemi I. Dosunmu, Ansheng Liu, Mario J. Paniccia
  • Patent number: 8330171
    Abstract: A single optical receiver having a photo-detector with a wide optical bandwidth and high efficiency within the wide optical bandwidth, the photo-detector comprising: a first diode region of first doping type for receiving light; a second diode region of second doping type and of second thickness; an active region for converting the received light to an electronic signal, the active region having a third thickness and configured to reside between the first diode region and the second diode region; and a reflector coupled to the second diode region and having a silicon layer with a fourth thickness, the silicon layer residing between silicon oxide layers of fifth thicknesses, wherein the active region is configured to absorb the light of wavelengths of less than 900 nm, and wherein the reflector is configured to reflect the light of wavelengths from a range of 1260 nm to 1380 nm.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: December 11, 2012
    Assignee: Intel Corporation
    Inventors: Olufemi I. Dosunmu, Ansheng Liu