Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.

Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.

Abstract: Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.

Abstract: Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.

Abstract: A method of making a magnetic random access memory (MRAM) device includes depositing a spacer material on an electrode; forming a magnetic tunnel junction (MTJ) on the spacer material that includes a reference layer in contact with the spacer material, a free layer, and a tunnel barrier layer; patterning a hard mask on the free layer; etching the MTJ and the spacer material to transfer a pattern of the hard mask into the MTJ and the spacer material; forming an insulating layer along a sidewall of the hard mask, the MTJ, and the spacer material; disposing an interlayer dielectric (ILD) on and around the hard mask, MTJ, and spacer material; etching through the ILD to form a trench that extends to a surface and sidewall of the hard mask and a sidewall of a portion of the MTJ; and disposing a metal in the trench to form a contact electrode.

Abstract: A method of forming a pillar includes masking a photoresist material using a reticle and a developer having a polarity opposite that of the photoresist to provide an island of photoresist material. A layer under the island of photoresist material is etched to establish a pillar defined by the island of photoresist material.

Abstract: A method of making a magnetic random access memory device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer, a tunnel barrier layer, and a free layer; disposing a hard mask on the MTJ; etching sidewalls of the hard mask and MTJ to form a stack with a first width and redeposit metal along the MTJ sidewall; depositing a sacrificial dielectric layer on the hard mask, surface of the electrode, exposed sidewall of the hard mask and the MTJ, and on redeposited metal along the sidewall of the MTJ; removing a portion of the sacrificial dielectric layer from sidewalls of the hard mask and MTJ and redeposited metal from the MTJ sidewalls; and removing a portion of a sidewall of the MTJ and hard mask to provide a second width to the stack; wherein the second width is less than the first width.

Abstract: A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.

Abstract: Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.

Abstract: A method of magnetic tunnel junction patterning for magnetoresistive random access memory devices using low atomic weight ion sputtering. The method includes: providing a magnetoresistive random access memory device including a hard mask metal, a MTJ element, and a semiconductor substrate, wherein the hard mask metal is disposed on the MTJ element and, wherein the MTJ element is disposed on the semiconductor substrate; and etching back the MTJ element into a plurality of MTJ element pillars using a low atomic weight ion sputtering. A magnetoresistive random access memory device using low atomic weight ion sputtering. The device includes: a semiconductor substrate; a plurality of MTJ element pillars disposed on the semiconductor substrate, wherein the plurality of MTJ element pillars is etched from a MTJ element using a low atomic weight ion sputtering; and a hard mask metal disposed on the MTJ element pillars.

Abstract: A magnetic memory device includes a magnetic memory stack including a bottom electrode and having a hard mask formed thereon. An encapsulation layer is formed over sides of the magnetic memory stack and has a thickness adjacent to the sides formed on the bottom electrode. A dielectric material is formed over the encapsulation layer and is removed from over the hard mask and gapped apart from the encapsulation layer on the sides of the magnetic memory stack to form trenches between the dielectric material and the encapsulation layer at the sides of the magnetic memory stack. A top electrode is formed over the hard mask and in the trenches such that the top electrode is spaced apart from the bottom electrode by at least the thickness.

Abstract: A method of making a magnetic random access memory (MRAM) device includes depositing a spacer material on an electrode; forming a magnetic tunnel junction (MTJ) on the spacer material that includes a reference layer in contact with the spacer material, a free layer, and a tunnel barrier layer; patterning a hard mask on the free layer; etching the MTJ and the spacer material to transfer a pattern of the hard mask into the MTJ and the spacer material; forming an insulating layer along a sidewall of the hard mask, the MTJ, and the spacer material; disposing an interlayer dielectric (ILD) on and around the hard mask, MTJ, and spacer material; etching through the ILD to form a trench that extends to a surface and sidewall of the hard mask and a sidewall of a portion of the MTJ; and disposing a metal in the trench to form a contact electrode.

Abstract: A magnetic memory device includes a magnetic memory stack including a bottom electrode and having a hard mask formed thereon. An encapsulation layer is formed over sides of the magnetic memory stack and has a thickness adjacent to the sides formed on the bottom electrode. A dielectric material is formed over the encapsulation layer and is removed from over the hard mask and gapped apart from the encapsulation layer on the sides of the magnetic memory stack to form trenches between the dielectric material and the encapsulation layer at the sides of the magnetic memory stack. A top electrode is formed over the hard mask and in the trenches such that the top electrode is spaced apart from the bottom electrode by at least the thickness.

Abstract: Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.

Abstract: A method of making a magnetic random access memory device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer, a tunnel barrier layer, and a free layer; disposing a hard mask on the MTJ; etching sidewalls of the hard mask and MTJ to form a stack with a first width and redeposit metal along the MTJ sidewall; depositing a sacrificial dielectric layer on the hard mask, surface of the electrode, exposed sidewall of the hard mask and the MTJ, and on redeposited metal along the sidewall of the MTJ; removing a portion of the sacrificial dielectric layer from sidewalls of the hard mask and MTJ and redeposited metal from the MTJ sidewalls; and removing a portion of a sidewall of the MTJ and hard mask to provide a second width to the stack; wherein the second width is less than the first width.

Abstract: A method for forming a memory device includes masking a photoresist material using a reticle and a developer having a polarity opposite that of the photoresist to provide an island of photoresist material. A planarizing layer is etched to establish a pillar of planarizing material defined by the island of photoresist material. A metal layer is etched to form a metal pillar having a diameter about the same as the pillar of planarizing material. A memory stack is etched to form a memory stack pillar having a diameter about the same as the metal pillar. A magnetoresistive memory cell includes a magnetic tunnel junction pillar having a circular cross section. The pillar has a pinned magnetic layer, a tunnel barrier layer, and a free magnetic layer. A first conductive contact is disposed above the magnetic tunnel junction pillar. A second conductive contact is disposed below the magnetic tunnel junction pillar.

Abstract: The present invention provides integrated circuit chips having chip identification aspects. The chips include magnetic tunnel junction (MTJ) structures, and more specifically, include permanent bit strings used for chip identification and/or authentication. Systems and processes for chip identification are also disclosed herein. The MTJ element structures provided herein can have a defined resistance profile such that the intrinsic variability of the MTJ element structure is used to encode and generate a bit string that becomes a fingerprint for the chip. In some embodiments, an oxygen treatment covering all or a selected portion of an array of MTJ elements can be used to create a mask or secret key that can be used and implemented to enhance chip identification.

Abstract: Embodiments are directed to an electromagnetic memory device having a memory cell and an encapsulation layer formed over the memory cell. The memory cell may include a magnetic tunnel junction (MTJ), and the encapsulation layer may be formed from a layer of hydrogenated amorphous silicon. Amorphous silicon improves the coercivity of the MTJ but by itself is conductive. Adding hydrogen to amorphous silicon passivates dangling bonds of the amorphous silicon, thereby reducing the ability of the resulting hydrogenated amorphous silicon layer to provide a parasitic current path to the MTJ. The hydrogenated amorphous silicon layer may be formed using a plasma-enhanced chemical vapor deposition, which can be tuned to enable a hydrogen level of approximately 10 to approximately 20 percent. By keeping subsequent processing operations at or below about 400 Celsius, the resulting layer of hydrogenated amorphous silicon can maintain its hydrogen level of approximately 10 to 20 percent.

Abstract: Embodiments are directed to an electromagnetic memory device having a memory cell and an encapsulation layer formed over the memory cell. The memory cell may include a magnetic tunnel junction (MTJ), and the encapsulation layer may be formed from a layer of hydrogenated amorphous silicon. Amorphous silicon improves the coercivity of the MTJ but by itself is conductive. Adding hydrogen to amorphous silicon passivates dangling bonds of the amorphous silicon, thereby reducing the ability of the resulting hydrogenated amorphous silicon layer to provide a parasitic current path to the MTJ. The hydrogenated amorphous silicon layer may be formed using a plasma-enhanced chemical vapor deposition, which can be tuned to enable a hydrogen level of approximately 10 to approximately 20 percent. By keeping subsequent processing operations at or below about 400 Celsius, the resulting layer of hydrogenated amorphous silicon can maintain its hydrogen level of approximately 10 to 20 percent.

Abstract: A method of making a MRAM device includes forming a magnetic tunnel junction on an electrode, the magnetic tunnel junction comprising a reference layer positioned in contact with the electrode, a tunnel barrier layer arranged on the reference layer, and a free layer arranged on the tunnel barrier layer; and depositing an encapsulating layer on and along sidewalls of the magnetic tunnel junction; wherein the exposing of the magnetic tunnel junction to hydrogen plasma is performed at a temperature from about 150 to about 250° C. An MRAM device including an encapsulating layer comprising either silicon nitride or aluminum oxide is also provided.