Abstract: An online system accesses a model trained based on a topic associated with a set of content items and the content of the set of content items. The online system applies the model to predict a probability that each of multiple content items is associated with the topic based on its content and identifies (a) content item(s) associated with at least a threshold probability. The online system retrieves information describing user engagement with the identified content item(s) and determines a value of a performance metric for the topic based on this information. If the value is at least a threshold value and the online system receives content from an entity describing an item associated with the topic, the online system communicates a recommendation to the entity to create a content item describing the item and to add a tag associated with the item upon determining an opportunity to do so.

Abstract: An online system accesses and applies a trained item detection model to attributes of each of one or more content items received from one or more content-providing users to predict a probability that each content item includes an image of an item associated with an entity. If the probability is at least a threshold probability for each of a set of content items, the online system identifies a content-providing user from whom the set of content items was received and determines a number of content items included among the set of content items. The online system computes a score for the content-providing user based on the number and ranks the content-providing user among additional content-providing users based on the score. The online system provides an option to the entity to select a set of content-providing users from the ranking authorized to create content items on behalf of the entity.

Abstract: A user identifies products offered by the user to an online system. The online system identifies a product offered by the user in an image by applying a identification model to the image. If the online system identifies a product in the image with at least a maximum confidence value, the online system automatically tags the post with metadata about the product or suggests a tag to the user. If an object in the image could be one of multiple products, the online system identifies the multiple products to the user, which may be ordered based on confidences of matching the object, allowing the user to select which product is in the image. If the unlisted identifies a product in the image with less than a minimum confidence value, the online system identifies the user's offered products and suggests that the user select a product.

Abstract: A radio-frequency (RF) switch includes a field-effect transistor (FET) disposed between a first node and a second node, the FET having a source, a drain, a gate, and a body. The RF switch further includes a coupling circuit including a first path and a second path, the first path being connected between the gate and one of the source or the drain via a first resistor in series with a first capacitor, the second path being connected between the body and the one of the source or the drain via a second resistor in series with a second capacitor, the coupling circuit configured to allow discharge of interface charge from either or both of the gate and body.

Abstract: A radio-frequency (RF) switch includes a field-effect transistor (FET) disposed between a first node and a second node, the FET having a source, a drain, a gate, and a body. The RF switch further includes a coupling circuit including a first path and a second path, the first path being connected between the gate and one of the source or the drain via a first resistor in series with a first capacitor, the second path being connected between the body and the one of the source or the drain via a second resistor in series with a second capacitor, the coupling circuit configured to allow discharge of interface charge from either or both of the gate and body.

Abstract: A radio frequency (RF) switch arrangement that improves the voltage handling capacity of a stack of switching elements (e.g., field-effect transistors (FETs)). The RF switch arrangement can include a ground plane and a stack arranged in relation to the ground plane, the stack including a plurality of switching elements coupled in series with one another. The RF switch arrangement can also include a plurality of capacitive elements, each of the plurality of capacitive elements providing a capacitive path across respective terminals of a corresponding one of the plurality of switching elements.

Abstract: A radio frequency (RF) switch arrangement that improves the voltage handling capacity of a stack of switching elements (e.g., field-effect transistors (FETs)). The RF switch arrangement can include a ground plane and a stack arranged in relation to the ground plane, the stack including a plurality of switching elements coupled in series with one another. The RF switch arrangement can also include a plurality of capacitive elements, each of the plurality of capacitive elements providing a capacitive path across respective terminals of a corresponding one of the plurality of switching elements.

Abstract: Radio-frequency (RF) devices are disclosed having transistor gate voltage compensation to provide improved switching performance. RF devices, such as switches, include a plurality of field-effect transistors (FETs) connected in series between first and second nodes, each FET having a gate. A compensation network including a coupling circuit couples the gates of each pair of neighboring FETs.

Abstract: Fabricating a radio-frequency switching circuit involves providing a substrate, forming, on the substrate, one or more field-effect transistors connected in series to define a radio-frequency signal path between an input end and an output end, each field-effect transistor having a source, a drain, a gate node, and a body node, and forming an element coupled to a selected body node of the one or more field-effect transistors connected in series to thereby provide reduced voltage distribution variation across the switching circuit.

Abstract: Apparatus and methods for tunable filters are provided. In certain configurations, a tunable filter includes a semiconductor die attached to a laminated substrate, such as a substrate of a multi-chip module (MCM). The tunable filter includes a vector inductor implemented using two or more conductors arranged on different conductive layers of the laminated substrate. The vector inductor's conductors are inductively coupled to one another and electrically connected in parallel to provide the vector inductor with high quality factor (Q-factor). The semiconductor die includes a variable capacitor that is electrically connected with the vector inductor to operate as a tunable resonator. Additionally, a frequency characteristic of the tunable filter, such as a passband, can be controlled by selecting a capacitance value of the variable capacitor, thereby tuning a resonance of the resonator.

Abstract: A radio-frequency (RF) switch includes a field-effect transistor (FET) disposed between a first node and a second node, the FET having a source, a drain, a gate, and a body. The RF switch further includes a coupling circuit including a first path and a second path, the first path being connected between the gate and one of the source or the drain via a first resistor in series with a first capacitor, the second path being connected between the body and the one of the source or the drain via a second resistor in series with a second capacitor, the coupling circuit configured to allow discharge of interface charge from either or both of the gate and body.

Abstract: Radio-frequency (RF) switch circuits are disclosed providing improved switching performance. An RF switch system includes at least one field-effect transistor (FET) disposed between a first node and a second node, each having a respective source, drain, gate, and body. The system includes a coupling circuit including a first path and a second path, the first path being between the respective source or the respective drain and the respective gate of the at least one FET, the second path being between the respective source or the respective drain and the respective body of the at least one FET. The coupling circuit may be configured to allow discharge of interface charge from either or both of the coupled gate and body.

Abstract: Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.

Abstract: Apparatus and methods for temperature compensation of variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array, an array biasing circuit that biases cells of the variable capacitor array to control the array's capacitance, and a bias voltage level control circuit that generates one or more temperature dependent bias voltages used by the array biasing circuit to bias the variable capacitor array's cells. The bias voltage level control circuit controls the one or more temperature dependent bias voltages to change with temperature so as to compensate the variable capacitor array for changes to capacitance arising from temperature variation.

Abstract: Apparatus and methods for variable capacitor arrays are provided herein. In certain configurations, an apparatus includes a variable capacitor array and a bias voltage generation circuit. The variable capacitor array includes a plurality of metal oxide semiconductor (MOS) variable capacitor cells, which include one or more pairs of MOS capacitors implemented in anti-parallel and/or anti-series configurations. In certain implementations, the MOS variable capacitor cells are electrically connected in parallel with one another between a radio frequency (RF) input and an RF output of the variable capacitor array. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the MOS variable capacitor cells.

Abstract: Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.

Abstract: Radio-frequency (RF) switch circuits are disclosed including at least one first field-effect transistor (FET) disposed between first and second nodes, each of the at least one first FET having a respective body and gate. The RF switch circuit may include a coupling circuit that couples the respective body and gate of the at least one first FET, the coupling circuit configured to be switchable between a resistive-coupling mode and a body-floating mode, as well as an adjustable-resistance circuit connected to either or both of the respective gate and body of the at least one FET, the adjustable-resistance circuit including a resistor in parallel with a bypass switch.

Abstract: Fabricating a radio-frequency switching circuit involves providing a substrate, forming, on the substrate, one or more field-effect transistors connected in series to define a radio-frequency signal path between an input end and an output end, each field-effect transistor having a source, a drain, a gate node, and a body node, and forming an element coupled to a selected body node of the one or more field-effect transistors connected in series to thereby provide reduced voltage distribution variation across the switching circuit.

Abstract: Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.

Abstract: Circuits are disclosed providing uniform voltage swing across transmit switches for improved device performance. An integrated circuit (IC) formed on a die includes a switch having one or more field effect transistors (FETs) defining an RF signal path between an input port and an output port, each FET having a body node, and the switch being configured to be capable of being in ON and OFF states. The IC further includes a voltage distribution circuit coupled to the switch and configured to reduce voltage distribution variation across the switch, the voltage distribution circuit including one or more elements coupled to a selected body node of one or more FETs to reduce voltage distribution variation across the switch when the switch is in an ON state and is encountered by a respective RF signal at the input port.