Patents by Inventor Arichika Ishida
Arichika Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200117035Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.Type: ApplicationFiled: December 12, 2019Publication date: April 16, 2020Applicant: Japan Display Inc.Inventors: Yohei YAMAGUCHI, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
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Patent number: 10608016Abstract: A display device has a thin film transistor on a substrate. The thin film transistor includes a first transistor having an oxide semiconductor film, a first gate insulating film, and a first gate electrode and a second transistor having a silicon semiconductor film, a second gate insulating film, and a second gate electrode. The first gate insulating film includes a first insulating film and a second insulating film. The oxide semiconductor film is positioned between the first insulating film and the substrate. The first insulating film is positioned between the silicon semiconductor film and the substrate and between the second insulating film and the substrate. The second gate insulating film includes an insulating film made of the same material in the same layer as the second insulating film. The first gate electrode and the second gate electrode are in the same layer.Type: GrantFiled: February 26, 2019Date of Patent: March 31, 2020Assignee: Japan Display Inc.Inventors: Yuichiro Hanyu, Arichika Ishida, Masahiro Watabe
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Patent number: 10539846Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.Type: GrantFiled: August 23, 2018Date of Patent: January 21, 2020Assignee: Japan Display Inc.Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
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Patent number: 10495803Abstract: According to one embodiment, provided is a liquid crystal display device with a reduced size and little restriction for incorporation into other devices. The liquid crystal display device includes an array substrate that includes multiple thin film transistors for pixel driving, a scanning line and a signal line. The liquid crystal display device also includes a counter substrate disposed on the display side in a manner opposed to the array substrate. The liquid crystal display device further includes an FPC arranged to transmit an external signal for driving of the thin film transistors. One end portion of the FPC is connected to the scanning line and the signal line, while the other end portion is extended inward. The scanning line, the signal line and the FPC are disposed within an outline of the counter substrate.Type: GrantFiled: September 14, 2017Date of Patent: December 3, 2019Assignee: Japan Display Inc.Inventors: Yoshiro Aoki, Yasushi Kawata, Arichika Ishida
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Publication number: 20190361273Abstract: According to one embodiment, a display device includes a first substrate including a first resin substrate having a first thermal expansion coefficient, and a first barrier layer having a second thermal expansion coefficient which is lower than the first thermal expansion coefficient, a second substrate including a second resin substrate having a third thermal expansion coefficient which is equal to the first thermal expansion coefficient, and a second barrier layer having a fourth thermal expansion coefficient which is lower than the third thermal expansion coefficient and is equal to the first thermal expansion coefficient, and a display element located between the first resin substrate and the second resin substrate.Type: ApplicationFiled: August 7, 2019Publication date: November 28, 2019Applicant: Japan Display Inc.Inventors: Arichika ISHIDA, Yasushi KAWATA
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Patent number: 10416485Abstract: According to one embodiment, a display device includes a first substrate including a first resin substrate having a first thermal expansion coefficient, and a first barrier layer having a second thermal expansion coefficient which is lower than the first thermal expansion coefficient, a second substrate including a second resin substrate having a third thermal expansion coefficient which is equal to the first thermal expansion coefficient, and a second barrier layer having a fourth thermal expansion coefficient which is lower than the third thermal expansion coefficient and is equal to the first thermal expansion coefficient, and a display element located between the first resin substrate and the second resin substrate.Type: GrantFiled: November 30, 2017Date of Patent: September 17, 2019Assignee: Japan Display Inc.Inventors: Arichika Ishida, Yasushi Kawata
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Patent number: 10374096Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.Type: GrantFiled: September 22, 2017Date of Patent: August 6, 2019Assignee: Japan Display Inc.Inventors: Miyuki Ishikawa, Arichika Ishida, Masayoshi Fuchi, Hajime Watakabe, Takashi Okada
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Publication number: 20190198533Abstract: A display device has a thin film transistor on a substrate. The thin film transistor includes a first transistor having an oxide semiconductor film, a first gate insulating film, and a first gate electrode and a second transistor having a silicon semiconductor film, a second gate insulating film, and a second gate electrode. The first gate insulating film includes a first insulating film and a second insulating film. The oxide semiconductor film is positioned between the first insulating film and the substrate. The first insulating film is positioned between the silicon semiconductor film and the substrate and between the second insulating film and the substrate. The second gate insulating film includes an insulating film made of the same material in the same layer as the second insulating film. The first gate electrode and the second gate electrode are in the same layer.Type: ApplicationFiled: February 26, 2019Publication date: June 27, 2019Applicant: Japan Display Inc.Inventors: Yuichiro Hanyu, Arichika Ishida, Masahiro Watabe
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Patent number: 10290657Abstract: A display device has a thin film transistor on a substrate. The thin film transistor includes a first transistor having an oxide semiconductor film, a first gate insulating film, and a first gate electrode and a second transistor having a silicon semiconductor film, a second gate insulating film, and a second gate electrode. The first gate insulating film includes a first insulating film and a second insulating film. The oxide semiconductor film is positioned between the first insulating film and the substrate. The first insulating film is positioned between the silicon semiconductor film and the substrate and between the second insulating film and the substrate. The second gate insulating film includes an insulating film made of the same material in the same layer as the second insulating film. The first gate electrode and the second gate electrode are in the same layer.Type: GrantFiled: January 11, 2018Date of Patent: May 14, 2019Assignee: Japan Display Inc.Inventors: Yuichiro Hanyu, Arichika Ishida, Masahiro Watabe
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Patent number: 10276601Abstract: According to one embodiment, a display device includes an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole.Type: GrantFiled: August 22, 2017Date of Patent: April 30, 2019Assignee: Japan Display Inc.Inventors: Noriyoshi Kanda, Arichika Ishida, Masayoshi Fuchi
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Publication number: 20190067399Abstract: A display device including TFTs in a pixel area and in a peripheral driving area in which the number of through-holes in a TFT circuit is decreased, and the mounting density of the TFTs is improved, so that a high-resolution display can be achieved. The display device includes a display area in which pixels are disposed in a matrix form, and a TFT substrate, on which a peripheral driving circuit is disposed, on the outer side of the display area. The pixels or the peripheral driving circuit includes TFTs (thin film transistors) each of which is formed in such a way that a first gate electrode of each TFT is formed relative to a semiconductor layer with a first gate insulating film therebetween, and a drain electrode and a source electrode of each TFT that are connected to the semiconductor layer are formed at layers different from each other.Type: ApplicationFiled: August 14, 2018Publication date: February 28, 2019Applicant: Japan Display Inc.Inventor: Arichika Ishida
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Publication number: 20180364509Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.Type: ApplicationFiled: August 23, 2018Publication date: December 20, 2018Applicant: Japan Display Inc.Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
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Patent number: 10088728Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.Type: GrantFiled: July 28, 2017Date of Patent: October 2, 2018Assignee: Japan Display Inc.Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
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Publication number: 20180219029Abstract: A display device has a thin film transistor on a substrate. The thin film transistor includes a first transistor having an oxide semiconductor film, a first gate insulating film, and a first gate electrode and a second transistor having a silicon semiconductor film, a second gate insulating film, and a second gate electrode. The first gate insulating film includes a first insulating film and a second insulating film. The oxide semiconductor film is positioned between the first insulating film and the substrate. The first insulating film is positioned between the silicon semiconductor film and the substrate and between the second insulating film and the substrate. The second gate insulating film includes an insulating film made of the same material in the same layer as the second insulating film. The first gate electrode and the second gate electrode are in the same layer.Type: ApplicationFiled: January 11, 2018Publication date: August 2, 2018Applicant: Japan Display Inc.Inventors: Yuichiro Hanyu, Arichika Ishida, Masahiro Watabe
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Patent number: 9964824Abstract: According to one embodiment, a display device includes a TFT on an insulating substrate. The TFT includes a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a source electrode and a drain electrode each provided in contact with at least a part of the semiconductor layer. The source and drain electrodes have a laminated structure including a lower layer, an intermediate layer and an upper layer. The source and drain electrodes include sidewalls each including a first tapered portion on the upper layer side, a second tapered portion on the lower layer side and a sidewall protective film attached to the second tapered portion. The taper angle of the first tapered portion is smaller than that of the second tapered portion.Type: GrantFiled: July 7, 2015Date of Patent: May 8, 2018Assignee: Japan Display Inc.Inventors: Isao Suzumura, Arichika Ishida, Norihiro Uemura, Hidekazu Miyake, Hiroto Miyake, Yohei Yamaguchi
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Patent number: 9947798Abstract: According to one embodiment, a display device includes thin-film transistor. The thin-film transistor includes a first semiconductor layer, a first insulating film, a gate electrode, a second insulating film, a second semiconductor layer, a first electrode and a second electrode. The gap between the bottom surface of the gate electrode and the upper surface of the first channel region of the first semiconductor layer is larger than the gap between the upper surface of the gate electrode and the bottom surface of the second channel region of the second semiconductor layer.Type: GrantFiled: July 21, 2015Date of Patent: April 17, 2018Assignee: Japan Display Inc.Inventors: Hidekazu Miyake, Arichika Ishida, Norihiro Uemura, Hiroto Miyake, Isao Suzumura, Yohei Yamaguchi
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Publication number: 20180081211Abstract: According to one embodiment, a display device includes a first substrate including a first resin substrate having a first thermal expansion coefficient, and a first barrier layer having a second thermal expansion coefficient which is lower than the first thermal expansion coefficient, a second substrate including a second resin substrate having a third thermal expansion coefficient which is equal to the first thermal expansion coefficient, and a second barrier layer having a fourth thermal expansion coefficient which is lower than the third thermal expansion coefficient and is equal to the first thermal expansion coefficient, and a display element located between the first resin substrate and the second resin substrate.Type: ApplicationFiled: November 30, 2017Publication date: March 22, 2018Applicant: Japan Display Inc.Inventors: Arichika ISHIDA, Yasushi KAWATA
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Patent number: 9911859Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.Type: GrantFiled: November 18, 2015Date of Patent: March 6, 2018Assignee: Japan Display Inc.Inventors: Hajime Watakabe, Arichika Ishida, Takashi Okada, Masayoshi Fuchi, Akihiro Hanada
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Publication number: 20180061857Abstract: According to one embodiment, a display device includes an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole.Type: ApplicationFiled: August 22, 2017Publication date: March 1, 2018Applicant: Japan Display Inc.Inventors: Noriyoshi KANDA, Arichika Ishida, Masayoshi Fuchi
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Publication number: 20180013006Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.Type: ApplicationFiled: September 22, 2017Publication date: January 11, 2018Applicant: Japan Display Inc.Inventors: Miyuki ISHIKAWA, Arichika ISHIDA, Masayoshi FUCHI, Hajime WATAKABE, Takashi OKADA