Patents by Inventor Arito Ogawa
Arito Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190096663Abstract: A method for improving a film formation rate and forming a film having a high dry etching resistance is disclosed. The method includes forming a metal nitride layer containing the metal element and the nitrogen element by performing a predetermined number of times in a time division manner supplying a halogen-based source gas containing the metal element to the substrate and supplying a reaction gas containing the nitrogen element and reacting with the metal element to the substrate; and forming a metal carbonitride layer containing the metal element, the carbon element, and the nitrogen element by performing a predetermined number of times in a time division manner supplying an organic-based source gas containing the metal element and the carbon element to the substrate and supplying the reaction gas to the substrate.Type: ApplicationFiled: September 19, 2018Publication date: March 28, 2019Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Arito OGAWA, Yukinao KAGA, Kazuhiro HARADA, Motomu DEGAI
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Publication number: 20190019673Abstract: There is provided a process of forming a film containing a metal element, an additional element different from the metal element and at least one of nitrogen and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a) supplying a first precursor gas containing the metal element and a second precursor gas containing the additional element to the substrate so that supply periods of the first precursor gas and the second precursor gas at least partially overlap with each other; and (b) supplying a reaction gas containing the at least one of nitrogen and carbon to the substrate.Type: ApplicationFiled: September 18, 2018Publication date: January 17, 2019Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Arito OGAWA, Atsuro SEINO
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Patent number: 10121651Abstract: A technique capable of forming a side wall of a gate electrode having high resistance-to-etching and low leakage current is provided. A method of manufacturing a semiconductor device according to the technique includes: (a) loading a substrate into a processing space in a process vessel, the substrate having thereon a gate electrode and an insulating film formed on a side surface of the gate electrode as a side wall; and (b) forming an etching-resistant film containing carbon and nitrogen on a surface of the insulating film by supplying a carbon-containing gas into the processing space.Type: GrantFiled: September 14, 2017Date of Patent: November 6, 2018Assignee: Hitachi Kokusai Electric Inc.Inventors: Arito Ogawa, Shin Hiyama
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Publication number: 20180247819Abstract: Provided is a technique of adjusting a work function. A method of manufacturing a semiconductor device includes forming a film having a predetermined thickness and containing a first metal element, carbon and nitrogen on a substrate by: (a) forming a first layer containing the first metal element and carbon by supplying a metal-containing gas containing the first metal element and a carbon-containing gas to the substrate M times and (b) forming a second layer containing the first metal element, carbon and nitrogen by supplying a nitrogen-containing gas to the substrate having the first layer formed thereon N times to nitride the first layer, wherein M and N are selected in a manner that a work function of the film has a predetermined value (where M and N are natural numbers).Type: ApplicationFiled: April 24, 2018Publication date: August 30, 2018Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Arito OGAWA, Kazuhiro HARADA, Yukinao KAGA, Hideharu ITATANI, Hiroshi ASHIHARA
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Publication number: 20180211843Abstract: A technique capable of controlling in-plane uniformity of a film formed on a substrate includes a step of forming a film on a substrate by performing a predetermined number of cycles in which a step of supplying a metal-containing gas to the substrate and a step of supplying a reducing gas containing an element that becomes a solid by itself to the substrate are performed in a time-division manner. The reducing gas has a property of changing a deposition rate of the film from an increasing rate to a decreasing rate in accordance with the exposure amount of the reducing gas with respect to the substrate. In the step of supplying the reducing gas, the exposure amount of the reducing gas with respect to the substrate is adjusted in accordance with the property of the reducing gas.Type: ApplicationFiled: March 19, 2018Publication date: July 26, 2018Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Atsuro SEINO, Arito OGAWA
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Patent number: 10014226Abstract: A process of forming a first mask on a first region of a metal film formed on a surface of a substrate, a process of modulating a work function of a first exposed region of the metal film, using plasma of a first process gas, a process of removing the first mask, a process of forming a second mask on a second region of the metal film, and a process of modulating the work function of a second exposed region of the metal film, using plasma of a second process gas are executed.Type: GrantFiled: March 22, 2017Date of Patent: July 3, 2018Assignee: Hitachi Kokusai Electric Inc.Inventor: Arito Ogawa
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Publication number: 20180182619Abstract: A technique capable of forming a side wall of a gate electrode having high resistance-to-etching and low leakage current is provided. A method of manufacturing a semiconductor device according to the technique includes: (a) loading a substrate into a processing space in a process vessel, the substrate having thereon a gate electrode and an insulating film formed on a side surface of the gate electrode as a side wall; and (b) forming an etching-resistant film containing carbon and nitrogen on a surface of the insulating film by supplying a carbon-containing gas into the processing space.Type: ApplicationFiled: September 14, 2017Publication date: June 28, 2018Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Arito OGAWA, Shin HIYAMA
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Patent number: 9970107Abstract: A technique for forming a metal film having a high work function while suppressing an increase in EOT is provided. According to the technique, there is provided a method of manufacturing a semiconductor device, including: (a) performing a first cycle a first number of times to form a first metal layer containing a first metal element; and (b) performing a second cycle to form a second metal layer containing a second metal element directly on the first metal layer, wherein a binding energy of second metal element with oxygen is higher than that of the first metal element with oxygen, wherein a cycle including (a) and (b) is performed a second number of times to form a conductive film containing the first metal element and the second metal element on a substrate, the conductive film having: a work function higher than the first metal layer; and a binding energy with oxygen higher than that of the first metal element with oxygen.Type: GrantFiled: August 9, 2017Date of Patent: May 15, 2018Assignee: Hitachi Kokusai Electric Inc.Inventors: Arito Ogawa, Atsuro Seino
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Patent number: 9972500Abstract: The present invention is provided to improve quality or manufacturing throughput of a semiconductor device. A method includes supplying a source gas to a substrate in a process chamber; exhausting an inside of the process chamber; supplying a reaction gas to the substrate; and exhausting the inside of the process chamber, wherein the source gas and/or the reaction gas is supplied in temporally separated pulses in the supply of the source gas and/or in the supply of the reaction gas. Then, the source gas and/or the reaction gas is supplied in temporally separated pulses to form a film during a gas supply time determined by a concentration distribution of by-products formed on a surface of the substrate.Type: GrantFiled: October 26, 2016Date of Patent: May 15, 2018Assignee: Hitachi Kokusai Electric, Inc.Inventors: Yukinao Kaga, Arito Ogawa, Atsuro Seino, Atsuhiko Ashitani, Ryohei Maeno, Masanori Sakai
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Patent number: 9966268Abstract: Provided are a method of manufacturing a semiconductor device capable of forming a high-quality film having low roughness and resistivity and a substrate processing apparatus and program. The method includes (a) forming an amorphous metal film on a substrate while maintaining the substrate by performing steps (a-1) and (a-2) in a time-divisional manner wherein the step (a-1) includes supplying in the time-divisional manner a metal-containing gas and a first reducing gas to the substrate a predetermined number of times to form a first amorphous metal film on the substrate, and the step (a-2) includes simultaneously supplying the metal-containing gas and a second reducing gas to the substrate having the first amorphous metal film formed thereon to form a second amorphous metal film on the first amorphous metal film; and (b) heating the substrate having the amorphous metal film formed thereon to.Type: GrantFiled: September 30, 2014Date of Patent: May 8, 2018Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Arito Ogawa, Atsuro Seino
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Publication number: 20180080122Abstract: A technique for forming a metal film having a high work function while suppressing an increase in EOT is provided. According to the technique, there is provided a method of manufacturing a semiconductor device, including: (a) performing a first cycle a first number of times to form a first metal layer containing a first metal element; and (b) performing a second cycle to form a second metal layer containing a second metal element directly on the first metal layer, wherein a binding energy of second metal element with oxygen is higher than that of the first metal element with oxygen, wherein a cycle including (a) and (b) is performed a second number of times to form a conductive film containing the first metal element and the second metal element on a substrate, the conductive film having: a work function higher than the first metal layer; and a binding energy with oxygen higher than that of the first metal element with oxygen.Type: ApplicationFiled: August 9, 2017Publication date: March 22, 2018Inventors: Arito OGAWA, Atsuro SEINO
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Patent number: 9824883Abstract: A method of manufacturing a semiconductor device by processing a substrate by supplying a processing space with a gas dispersed in a buffer space disposed at an upstream side of the processing space is provided. The method includes (a) transferring the substrate into the processing space while exhausting a transfer space of the substrate by a first vacuum pump; (b) closing a first valve disposed at a downstream side of the first vacuum pump; (c) supplying the gas into the processing space via the buffer space; and (d) exhausting the buffer space through an exhaust pipe connected to a downstream side of the first valve.Type: GrantFiled: July 21, 2015Date of Patent: November 21, 2017Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Hiroshi Ashihara, Arito Ogawa
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Publication number: 20170309490Abstract: A method of manufacturing a semiconductor device includes: forming an amorphous metal film on a substrate by time-divisionally conducting a cycle a predetermined number of times, the cycle including: (a) simultaneously supplying a metal-containing gas and a first reducing gas to the substrate to form a first amorphous metal layer on the substrate, and (b) forming a second amorphous metal layer on the first amorphous metal layer by time-divisionally supplying, a predetermined number of times, the metal-containing gas and a second reducing gas to the substrate on which the first amorphous metal layer is formed; and forming a crystallized metal layer on the substrate by simultaneously supplying the metal-containing gas and the first reducing gas to the substrate on which the amorphous metal film is formed.Type: ApplicationFiled: September 24, 2014Publication date: October 26, 2017Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventor: Arito OGAWA
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Publication number: 20170287786Abstract: A process of forming a first mask on a first region of a metal film formed on a surface of a substrate, a process of modulating a work function of a first exposed region of the metal film, using plasma of a first process gas, a process of removing the first mask, a process of forming a second mask on a second region of the metal film, and a process of modulating the work function of a second exposed region of the metal film, using plasma of a second process gas are executed.Type: ApplicationFiled: March 22, 2017Publication date: October 5, 2017Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventor: Arito OGAWA
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Patent number: 9745656Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.Type: GrantFiled: June 23, 2016Date of Patent: August 29, 2017Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Arito Ogawa, Tsuyoshi Takeda
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Patent number: 9666439Abstract: A method of manufacturing a semiconductor device includes forming a seed layer containing a metal element on a substrate by performing a first process and a second process in a time-division manner. The first process supplying and exhausting organic metal-containing gas containing the metal element to the substrate. The second process supplying and exhausting inorganic metal-containing gas containing the metal element to the substrate, and forming a metal-containing nitride film on the substrate on which the seed layer is formed using the seed layer as a seed by performing a third process and a fourth process in a time-division manner. The third process supplying and exhausting the inorganic metal-containing gas to the substrate. The fourth process supplying and exhausting nitrogen-containing gas to the substrate.Type: GrantFiled: March 15, 2016Date of Patent: May 30, 2017Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventor: Arito Ogawa
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Patent number: 9653301Abstract: Provided is a semiconductor device including a metal film which can be formed with lower costs but still manage to have a necessary work function and oxidation resistance. The semiconductor device includes an insulating film disposed on a substrate; and a metal film disposed on the insulating film. The metal film includes a stacked structure of: a first metal film disposed on the insulating film to directly contact the insulating film; a second metal film disposed on the first metal film to directly contact the first metal film; and the first metal film disposed on the second metal film to directly contact the second metal film, the second metal film having a work function greater than 4.8 eV and being different from the first metal film in material, wherein an oxidation resistance of the first metal film is greater than that of the second metal film.Type: GrantFiled: August 4, 2016Date of Patent: May 16, 2017Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Sadayoshi Horii, Arito Ogawa, Hideharu Itatani
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Patent number: 9653351Abstract: A method of manufacturing a semiconductor device may include: (a) loading a substrate into a process chamber, the substrate having: a process surface provided with a first metal film containing at least a first metal element; (b) forming a second metal film on the substrate loaded in the process chamber by alternately supplying a metal compound and a first reactive gas reactive with the metal compound to the substrate a plurality of times; (c) alternately performing steps (c-1) and (c-2) a plurality of times wherein the step (c-1) includes: forming an amorphous third metal film on the second metal film, and the step (c-2) includes: forming a fourth metal film on the third metal film; and (d) forming an amorphous fifth metal film on the fourth metal film by supplying the metal compound mixed with the second reactive gas to the substrate.Type: GrantFiled: September 22, 2016Date of Patent: May 16, 2017Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Arito Ogawa, Atsuro Seino
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Publication number: 20170047227Abstract: The present invention is provided to improve quality or manufacturing throughput of a semiconductor device. A method includes supplying a source gas to a substrate in a process chamber; exhausting an inside of the process chamber; supplying a reaction gas to the substrate; and exhausting the inside of the process chamber, wherein the source gas and/or the reaction gas is supplied in temporally separated pulses in the supply of the source gas and/or in the supply of the reaction gas. Then, the source gas and/or the reaction gas is supplied in temporally separated pulses to form a film during a gas supply time determined by a concentration distribution of by-products formed on a surface of the substrate.Type: ApplicationFiled: October 26, 2016Publication date: February 16, 2017Inventors: Yukinao KAGA, Arito OGAWA, Atsuro SEINO, Atsuhiko ASHITANI, Ryohei MAENO, Masanori SAKAI
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Publication number: 20170011958Abstract: A method of manufacturing a semiconductor device may include: (a) loading a substrate into a process chamber, the substrate having: a process surface provided with a first metal film containing at least a first metal element; (b) forming a second metal film on the substrate loaded in the process chamber by alternately supplying a metal compound and a first reactive gas reactive with the metal compound to the substrate a plurality of times; (c) alternately performing steps (c-1) and (c-2) a plurality of times wherein the step (c-1) includes: forming an amorphous third metal film on the second metal film, and the step (c-2) includes: forming a fourth metal film on the third metal film; and (d) forming an amorphous fifth metal film on the fourth metal film by supplying the metal compound mixed with the second reactive gas to the substrate.Type: ApplicationFiled: September 22, 2016Publication date: January 12, 2017Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Arito OGAWA, Atsuro SEINO