Patents by Inventor Arthur R. Zingher
Arthur R. Zingher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7332919Abstract: One embodiment of the present invention provides a system for distributing signals through a jig-plate in a computer system. The jig-plate contains alignment features that assist in positioning semiconductor chips in relation to the jig-plate. In addition, the jig-plate contains one or more embedded signal routing layers. These metal routing layers provide one or more signal routes for the distribution of signals through the jig-plate to semiconductor chips which have been aligned with the jig-plate. Note that routing the signals through the jig-plate facilitates the distribution of the signals without requiring that the signals be routed through the semiconductor chips in the jig-plate.Type: GrantFiled: September 21, 2005Date of Patent: February 19, 2008Assignee: Sun Microsystems, Inc.Inventors: Ronald Ho, Robert J. Drost, Arthur R. Zingher
-
Publication number: 20070288844Abstract: One embodiment of the present invention provides a system that automates context-compensated rendering of text in a graphical environment. First, the system receives a specification of the graphical environment that includes text to be rendered in the graphical environment. Next, the system determines the parameters of the local environment near the text. Then, the system dynamically renders text to compensate for those parameters, in order to display the text more clearly.Type: ApplicationFiled: June 9, 2006Publication date: December 13, 2007Inventors: Arthur R. Zingher, Hideya Kawahara
-
Patent number: 7067910Abstract: One embodiment of the present invention provides a technique for assembling semiconductor chips. First, multiple semiconductor chips are permanently laminated together into a plurality of laminated chip assemblies, wherein the semiconductor chips within the laminated chip assembly communicate with each other through electrically conductive connections. Next, laminated chip assemblies are stacked together to form a stack of semiconductor chips without permanently bonding the laminated chip assemblies together, wherein the laminated chip assemblies communicate with each other using capacitive coupling.Type: GrantFiled: October 14, 2004Date of Patent: June 27, 2006Assignee: SUN Microsystems, Inc.Inventors: Robert J. Drost, Ronald Ho, Arthur R. Zingher
-
Patent number: 7015570Abstract: A multi-connect substrate, module including the substrate and an Integrated Circuit (IC) chip packaged in the module. The multi-connect substrate includes a multilayered substrate with at least one edge terminal array and one inboard terminal array on one face. An exterior terminal array is located on an opposite face. Signal wires pass through the multilayered substrate, connecting edge terminals to inboard terminals and inboard terminals with a exterior array terminals.Type: GrantFiled: December 9, 2002Date of Patent: March 21, 2006Assignee: International Business Machines Corp.Inventors: Philip G. Emma, Arthur R. Zingher
-
Patent number: 6952352Abstract: A formable wiring structure, an interposer with the formable wiring structure, a multichip module including the interposer and in particular a microprocessor and L2, L3 cache memory mounted on the interposer. The formable wiring structure includes wiring layers separated by dielectric layers. Attachment locations for attaching to module substrates, printed circuit cards or for mounting chips (microprocessor and cache) are provided on at least one interposer surface. The microprocessor is centrally located opposite a module attach location and the cache chips are on portions that are bent away from the module attach location to reduce and minimize module real estate required.Type: GrantFiled: December 9, 2002Date of Patent: October 4, 2005Assignee: International Business Machines Corp.Inventors: Philip G. Emma, Robert K. Montoye, Arthur R. Zingher
-
Publication number: 20040136436Abstract: This invention relates to digitally measuring operating parameters, for example, temperature, within a semiconductor chip and making those measurements internally available to hardware, firmware, and software.Type: ApplicationFiled: January 10, 2003Publication date: July 15, 2004Applicant: International Business Machines CorporationInventors: Herschel Ainspan, Philip G. Emma, Rick A. Rand, Arthur R. Zingher
-
Patent number: 6763432Abstract: A cache memory system for use with an external cache system comprising at least one data array includes one or more cache data arrays and corresponding cache directory arrays. The cache memory system operates in one of at least two modes of operation. In a first mode of operation, the cache data arrays store data relating to directory information stored in the corresponding cache directory arrays. In a second mode of operation, at least a portion of the cache data arrays stores directory information corresponding to the at least one data array of the external cache system.Type: GrantFiled: August 28, 2000Date of Patent: July 13, 2004Assignee: International Business Machines CorporationInventors: Mark Jay Charney, Philip George Emma, Robert K. Montoye, Arthur R. Zingher
-
Publication number: 20040108591Abstract: An “Edge Flower” (EdgFlr) Substrate with a Top Face with a Long Edge with an EdgFlr Terminal Array. The Array connects to an EdgFlr Printed Wire Vehicle (PWV), that connects to an external component. The EdgFlr Few Chip Module (FCM) connects through an EdgFlr Terminal Array and through a Flexible EdgFlr PWV to an Edge Flower electrical component (e.g., a cache or memory chip) and also through the Module top center to an Inboard IC Chip (e.g., a microprocessor). Further, an EdgFlr Plural Substrate Module (PSM) has EdgFlwr Substrates mutually connected through a Rigid Global EdgFlr PWV. An EdgFlr Compound Engine Network combines an EdgFlr PSM and EdgFlr Engine Modules.Type: ApplicationFiled: December 9, 2002Publication date: June 10, 2004Inventors: Philip G. Emma, Arthur R. Zingher
-
Publication number: 20040109283Abstract: A formable wiring structure, an interposer with the formable wiring structure, a multichip module including the interposer and in particular a microprocessor and L2, L3 cache memory mounted on the interposer. The formable wiring structure includes wiring layers separated by dielectric layers. Attachment locations for attaching to module substrates, printed circuit cards or for mounting chips (microprocessor and cache) are provided on at least one interposer surface. The microprocessor is centrally located opposite a module attach location and the cache chips are on portions that are bent away from the module attach location to reduce and minimize module real estate required.Type: ApplicationFiled: December 9, 2002Publication date: June 10, 2004Inventors: Philip G. Emma, Robert K. Montoye, Arthur R. Zingher
-
Patent number: 6603921Abstract: An archive system for records with an audio component, which uses automated speech recognition to create a multi-layered archive pyramid. The archive pyramid includes successive layers of data stored at varying data rates such as original video data, compressed video data, original audio, compressed audio data, recognized word-lattices, recognized word-bags and a global word index. The disclosed system uses automatic speech recognition to transcribe from audio to searchable index layers. During a search operation, automatic and semi-automatic techniques are used to search the archive pyramid from the smallest narrowest layers to the largest widest layers, to identify a moderate subset of records. This subset is further refined by a manual survey of regenerated compressed audio. Finally, the selected records are retrieved from the original audio archive layer.Type: GrantFiled: July 1, 1998Date of Patent: August 5, 2003Assignee: International Business Machines CorporationInventors: Dimitri Kanevsky, Stephane H. Maes, Mukund Padmanabhan, Arthur R. Zingher
-
Patent number: 6400128Abstract: A system and method for locating a circuit defect, such as a short or an incipient open, in an electric circuit in a workpiece, such a Printed Circuit Board (PCB) or MultiChip Module (MCM). The circuit is connected to a device for sensitively measuring any resistance change. A thermal stimulus is applied to various subsets of the surface of the workpiece, the thermal stimulus being temporally modulated, and the resistance change measurement correlated with this modulation. By applying well-designed thermal stimulus subsets, resistance measurements may be logically combined which correspond to the plural thermal stimulus subsets. Further, the search region where the defect may be located may be iteratively refined. By measuring the time delay between the thermal stimulus and corresponding resistance change, the depth of a defect below the surface of the workpiece is further determined.Type: GrantFiled: March 19, 2001Date of Patent: June 4, 2002Assignee: International Business Machines CorporationInventors: Daniel Guidotti, Arnold Halperin, Michael E. Scaman, Arthur R. Zingher
-
Publication number: 20010035748Abstract: A system and method for locating a circuit defect, such as a short or an incipient open, in an electric circuit in a workpiece, such a Printed Circuit Board (PCB) or MultiChip Module (MCM). The circuit is connected to a device for sensitively measuring any resistance change. A thermal stimulus is applied to various subsets of the surface of the workpiece, the thermal stimulus being temporally modulated, and the resistance change measurement correlated with this modulation. By applying well-designed thermal stimulus subsets, resistance measurements may be logically combined which correspond to the plural thermal stimulus subsets. Further, the search region where the defect may be located may be iteratively refined. By measuring the time delay between the thermal stimulus and corresponding resistance change, the depth of a defect below the surface of the workpiece is further determined.Type: ApplicationFiled: March 19, 2001Publication date: November 1, 2001Inventors: Daniel Guidotti, Arnold Halperin, Michael E. Scaman, Arthur R. Zingher
-
Patent number: 6236196Abstract: A system and method for locating a circuit defect, such as a short or an incipient open, in an electric circuit in a workpiece, such a Printed Circuit Board (PCB) or MultiChip Module (MCM). The circuit is connected to a device for sensitively measuring any resistance change. A thermal stimulus is applied to various subsets of the surface of the workpiece, the thermal stimulus being temporally modulated, and the resistance change measurement correlated with this modulation. By applying well-designed thermal stimulus subsets, resistance measurements may be logically combined which correspond to the plural thermal stimulus subsets. Further, the search region where the defect may be located may be iteratively refined. By measuring the time delay between the thermal stimulus and corresponding resistance change, the depth of a defect below the surface of the workpiece is further determined.Type: GrantFiled: June 3, 1999Date of Patent: May 22, 2001Assignee: International Business Machines CorporationInventors: Daniel Guidotti, Arnold Halperin, Michael E. Scaman, Arthur R. Zingher
-
Patent number: 5409200Abstract: A thin sheet of metal is patterned, folded, and joined to produce an array of compression springs, each of which exhibits constant force characteristics over a useful range of deflections to allow the array to apply nearly constant specified forces to closely spaced items which may be of varying size or height. As the springs are loaded from a relaxed state, the rate of force increase per unit of increased deflection is initially high, tapering off to nearly zero force increase with subsequent increases in deflection. This region of minimal force increase per unit of increased deflection (i.e. a "near constant force" band) extends over a useful range of deflections. The springs are self guiding and balanced, producing no lateral force on a perpendicularly applied load.Type: GrantFiled: October 1, 1993Date of Patent: April 25, 1995Inventors: Arthur R. Zingher, Anthony J. Liberko
-
Patent number: 5388635Abstract: A cooling hat for transferring heat from a surface or plurality of heat generating components to a flowing fluid includes a coldsheet, a plurality of manifold layers and springs. The coldsheet is typically a medium-thin metal sheet usually with fine fins or grooves to readily transfer heat to a coolant. Each manifold layer is typically molded rubber with conduits for coolant supply and return. The conduits form a branched hierarchy. The fluid flow is highly parallel and streamlined which achieves ample flow with small hydraulic differential pressure. Springs gently urge the cooling hat against the thermal joints hence against the components. The hat can bend slightly to conform to a curved surface. Typically some compliance is provided by the hat, and other compliance is provided by a thermal joint between each component and the coldsheet. The system is highly self-aligned for counteracting variations.Type: GrantFiled: May 8, 1992Date of Patent: February 14, 1995Assignee: International Business Machines CorporationInventors: Peter A. Gruber, Arthur R. Zingher
-
Patent number: 5346518Abstract: During wafer fabrication, a transportable enclosure, such as a Standard Manufacturing InterFace (SMIF) pod encloses a nascent product, such as a semiconductor wafer, to protect the wafer against contamination during manufacture, storage or transportation. However chemical vapors emitted inside the pod can accumulate in the air and degrade wafers during subsequent fabrication. In order to absorb the vapors inside a closed pod, a vapor removal element typically including an activated carbon absorber, covered by a particulate-filtering vapor-permeable barrier, and covered by a guard plate with holes is disposed within the enclosure. A vapor removal element is disposed closely adjacent to each respective wafer. Alternatively, a single vapor removal element is located inside the enclosure. In certain instances, a fan or thermo-buoyant circulation causes any vapors located inside the enclosure to a vapor removal element for removal.Type: GrantFiled: March 23, 1993Date of Patent: September 13, 1994Assignee: International Business Machines CorporationInventors: Robert J. Baseman, Charles A. Brown, Benjamin N. Eldridge, Laura B. Rothman, Herman R. Wendt, James T. Yeh, Arthur R. Zingher
-
Patent number: 5310440Abstract: A system provides for convective transferring of material between a workpiece and a flowing fluid which chemically reacts with the workpiece. A gap is formed between the workpiece and a facesheet. The fluid is fed to supply nozzles, travels a short distance within the gap adjacent to the facesheet and exits via return nozzles. The flow cross section and flow density facilitate convective transfer at a moderate flow rate and low fluid pressure. The system is also applicable for chemical transfer such as plating or etching printed circuit boards.Type: GrantFiled: April 2, 1992Date of Patent: May 10, 1994Assignee: International Business Machines CorporationInventor: Arthur R. Zingher
-
Patent number: 5291371Abstract: A thermal joint for transferring heat from a first object to a second object contains a first relatively thick layer of high bulk thermal conductivity material and a second relatively thin layer of lubricant. In a preferred embodiment an anti-adhesion coating is also present in the joint. The thermal joint completely fills the gap between the first and second objects while enabling relative sliding motion to compensate for any lateral distortion.Type: GrantFiled: April 27, 1990Date of Patent: March 1, 1994Assignee: International Business Machines CorporationInventors: Peter A. Gruber, Arthur R. Zingher
-
Patent number: 5265670Abstract: A system provides convective transfer from a workpiece to a flowing fluid. A gap is formed between the workpiece and a facesheet containing fluid supply nozzles and fluid return nozzles. The fluid is fed to the supply nozzles, travels a short distance within the gap adjacent to the facesheet, and exits via return nozzles. The flow cross section and flow density facilitate heat transfer at a moderate flow rate and low fluid pressure. The system is also applicable for chemical transfer such as plating or etching printed circuit boards and for transfer through a semi-permeable membrane.Type: GrantFiled: April 27, 1990Date of Patent: November 30, 1993Assignee: International Business Machines CorporationInventor: Arthur R. Zingher
-
Patent number: 5244143Abstract: An apparatus and method are described for injection molding solder mounds onto electronic devices. The apparatus has a reservoir for molten solder which is disposed over a cavity in an injection plate. The injection plate is disposed over a mold having an array of cavities therein into which solder in injection molded. The mold is disposed over a workpiece, such as a semiconductor chip or a semiconductor chip packaging substrate. The cavities in the mold are aligned with electrical contact locations on the chip or substrate. The workpiece is heated and the molten solder is forced under gas pressure into the cavity in the injection plate disposed above the array of cavities in the mold. The molten solder is forced into the array of cavities in the mold. The injection plate is advanced to slide over the mold to wipe away the excess solder above the mold at a plurality of wiping apertures in the injection plate.Type: GrantFiled: April 16, 1992Date of Patent: September 14, 1993Assignee: International Business Machines CorporationInventors: Thomas G. Ference, Peter A. Gruber, Bernardo Hernandez, Michael J. Palmer, Arthur R. Zingher