Abstract: A boosted voltage generator may include a difference voltage generator, a first charging circuit, a second charging circuit and a switch circuit. The difference voltage generator generates a difference voltage to a first node, based on a reference voltage and a power supply voltage. The first charging circuit, connected between the first node and a ground voltage, charges the difference voltage therein during a first phase in response to a first pulse signal. The second charging circuit, connected between the first node and the ground voltage, charges the difference voltage therein during a second phase in response to a second pulse signal. The switch circuit, connected to a second node in the first charging circuit, a third node in the second charging circuit and an output node, provides a boosted voltage following a target level to the output node during each of the first phase and the second phase.

Abstract: A sense amplifier is provided which includes a first load supplied with a selection cell current from a read bit line connected to a selected memory cell; a second load supplied with a reference current from a reference read bit line connected to a reference cell, a resistance value of the second load being different from a resistance value of the first load; and a sensing unit configured to correct a level of the reference current based on a resistance ratio of the first and second loads and to compare the selection cell current and the corrected reference current.

Abstract: A voltage generator comprises a reference voltage providing unit, a comparison voltage providing unit and a comparison unit. The reference voltage providing unit comprises a reference element and a current source series-connected between a power supply voltage and a ground voltage, and outputs a reference voltage through a reference voltage node, which couples the reference element to the current source. The comparison voltage providing unit comprises a magnetic tunnel junction unit coupled between the power supply voltage and a comparison voltage node, and a transistor switch unit coupled between the ground voltage and the comparison voltage node. The comparison unit provides a write voltage to the transistor switch unit by comparing the reference voltage and the comparison voltage. The voltage generator according to example embodiments may increase the performance of the memory device by performing the write operation using stable multi voltages that are applied to a word line.

Abstract: A sense amplifier, a nonvolatile memory device including the sense amplifier and a sensing method of the sense amplifier are provided. The sense amplifier includes a first comparator that generates a first comparison signal by comparing a first reference signal received from a first reference cell with a sensing target signal received from the selected memory cell, and generates a second comparison signal by comparing the sensing target signal with a second reference signal received from a second reference cell written in different state from the first reference cell, and a second comparator that senses data stored in the selected memory cell by comparing the first comparison signal and the second comparison signal.

Abstract: A sense amplifier is provided which includes a first load supplied with a selection cell current from a read bit line connected to a selected memory cell; a second load supplied with a reference current from a reference read bit line connected to a reference cell, a resistance value of the second load being different from a resistance value of the first load; and a sensing unit configured to correct a level of the reference current based on a resistance ratio of the first and second loads and to compare the selection cell current and the corrected reference current.

Abstract: A voltage generator comprises a reference voltage providing unit, a comparison voltage providing unit and a comparison unit. The reference voltage providing unit comprises a reference element and a current source series-connected between a power supply voltage and a ground voltage, and outputs a reference voltage through a reference voltage node, which couples the reference element to the current source. The comparison voltage providing unit comprises a magnetic tunnel junction unit coupled between the power supply voltage and a comparison voltage node, and a transistor switch unit coupled between the ground voltage and the comparison voltage node. The comparison unit provides a write voltage to the transistor switch unit by comparing the reference voltage and the comparison voltage. The voltage generator according to example embodiments may increase the performance of the memory device by performing the write operation using stable multi voltages that are applied to a word line.

Abstract: A memory device includes a memory array including a plurality of sections, each including a plurality of memory cells and at least one reference cell. The memory device may also include a plurality of sense amplifier circuits respectively corresponding to the plurality of sections, and a plurality of switch circuits, each switch circuit connected between a respective section and sense amplifier circuit. Each switch circuit may be configured to select between communicatively connecting a first column of memory cells or a reference cell to a corresponding sense amplifier.

Abstract: A sense amplifier is provided which includes a first load supplied with a selection cell current from a read bit line connected to a selected memory cell; a second load supplied with a reference current from a reference read bit line connected to a reference cell, a resistance value of the second load being different from a resistance value of the first load; and a sensing unit configured to correct a level of the reference current based on a resistance ratio of the first and second loads and to compare the selection cell current and the corrected reference current.

Abstract: A sense amplifier, a nonvolatile memory device including the sense amplifier and a sensing method of the sense amplifier are provided. The sense amplifier includes a first comparator that generates a first comparison signal by comparing a first reference signal received from a first reference cell with a sensing target signal received from the selected memory cell, and generates a second comparison signal by comparing the sensing target signal with a second reference signal received from a second reference cell written in different state from the first reference cell, and a second comparator that senses data stored in the selected memory cell by comparing the first comparison signal and the second comparison signal.

Abstract: A write and/or read current generator for nonvolatile memory device, especially for Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM), may include a current supplying circuit which changes a level of a sample current, determines a resistance state change current of a sample bit cell based on a feedback signal obtained through the sample bit cell whose resistance state is changed according to a level of the sample current. The current supplying circuit may calibrate a write and/or read current of a memory cell in response to a sample current applied at a point of time when a resistance state of the sample bit cell is switched into another resistance state. A calibration circuit may generate the feedback signal indicating a resistance area of a predetermined resistance range to which a resistance state of the sample bit cell belongs.

Abstract: A nonvolatile memory device is provided comprising a memory cell array including first and second memory cells. Data is stored at the first memory cell. The device further comprises an access control circuit configured to read the data stored at the first memory cell and to subsequently perform a data processing operation on the second memory cell contemporaneously with a reprogramming operation performed on the first memory cell. The reprogramming operation on the first memory cell is selectively performed based on a determination whether a state of the first memory cell is changed while the data stored at the first memory cell is read.

Abstract: A write and/or read current generator for nonvolatile memory device, especially for Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM), may include a current supplying circuit which changes a level of a sample current, determines a resistance state change current of a sample bit cell based on a feedback signal obtained through the sample bit cell whose resistance state is changed according to a level of the sample current. The current supplying circuit may calibrate a write and/or read current of a memory cell in response to a sample current applied at a point of time when a resistance state of the sample bit cell is switched into another resistance state. A calibration circuit may generate the feedback signal indicating a resistance area of a predetermined resistance range to which a resistance state of the sample bit cell belongs.