Patents by Inventor Arun Sharma

Arun Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8127255
    Abstract: A method of characterizing an organic substrate including a plurality of circuit layers is provided includes the steps of: receiving an image of the organic substrate, the image including a geometric description of the circuit layers of the substrate; segmenting the substrate into multiple processing regions based, at least in part, on geometric coordinates of circuit structures defined in the image of the substrate; generating a circuit layer image corresponding to a selected one of the processing regions of the substrate; identifying one or more geometric features in the circuit layer image; estimating at least one thermomechanical property of the circuit layer image as a function of the identified geometric features; repeating the steps of receiving an image, generating a circuit layer image, identifying one or more geometric features in the circuit layer image, and estimating at least one thermomechanical property of the circuit layer image until all circuit layers in the substrate have been processed; an
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: February 28, 2012
    Assignee: International Business Machines Corporation
    Inventors: Hien Phu Dang, Vijayeshwar Das Khanna, Arun Sharma, Sri M. Sri-Jayantha
  • Publication number: 20120045763
    Abstract: This invention relates to antibodies that specific bind to fetal CD36+ cells in preference to binding to maternal CD36+ cells and methods for using these antibodies to detect and separate fetal cells from adult biological fluids including maternal peripheral blood.
    Type: Application
    Filed: September 27, 2011
    Publication date: February 23, 2012
    Applicant: The Board of Trustees of the University of Illinois
    Inventors: Arun Sharma, Sherman Elias
  • Patent number: 8096705
    Abstract: A method of estimating temperature of a transient nature of a thermal system, including, without a temperature measurement being made available, determining a drive current and thermal parameters of the thermal system.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: January 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Hien P. Dang, Arun Sharma
  • Patent number: 8054630
    Abstract: A method of mounting an electronic component on a substrate includes forming at least one trench in a surface of the substrate. The trenches formed in the substrate reduce a stiffness of the substrate, which provides less resistance to shear. Accordingly, the trenches reduce the amount of strain on the joints, which mount the electronic component to the substrate, which enhances the life of the joints.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: David Questad, Vijayeshwar D. Khanna, Jennifer V. Muney, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit
  • Patent number: 8056027
    Abstract: A method for characterizing thermomechanical properties of an organic substrate includes the steps of: receiving an image of the substrate, the image including a geometric description of the circuit layers of the substrate; selecting a given one of the circuit layers for processing; converting the image to a 2-D FEM image of the given circuit layer; repeating the steps of selecting a given one of the circuit layers and converting the image to a 2-D FEM image of the selected layer until all of the layers have been processed; combining all of the 2-D FEM images corresponding to the layers to form a 3-D FEM image representing at least a portion of the substrate; determining a coefficient of thermal expansion (CTE), modulus and/or Poisson's ratio of the 3-D FEM image; and constructing a 3-D representation of the substrate as a function of the CTE, modulus and/or Poisson's ratio of the 3-D FEM image.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Hien Phu Dang, Vijaveshwar Das Khanna, Arun Sharma, Sri M. Sri-Jayantha
  • Patent number: 8026054
    Abstract: This invention relates to antibodies that specific bind to fetal CD36+ cells in preference to binding to maternal CD36+ cells and methods for using these antibodies to detect and separate fetal cells from adult biological fluids including maternal peripheral blood.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: September 27, 2011
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Arun Sharma, Sherman Elias
  • Patent number: 7901998
    Abstract: A pattern matched pair of a front metal interconnect layer and a back metal interconnect layer having matched thermal expansion coefficients are provided for a reduced warp packaging substrate. Metal interconnect layers containing a high density of wiring and complex patterns are first developed so that interconnect structures for signal transmission are optimized for electrical performance. Metal interconnect layers containing a low density wiring and relatively simple patterns are then modified to match the pattern of a mirror image metal interconnect layer located on the opposite side of the core and the same number of metal interconnect layer away from the core. During this pattern-matching process, the contiguity of electrical connection in the metal layers with a low density wiring may become disrupted. The disruption is healed by an additional design step in which the contiguity of the electrical connection in the low density is reestablished.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: March 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Hien P. Dang, Vijayeshwar D. Khanna, Arun Sharma
  • Patent number: 7904185
    Abstract: A MEMs-based system (and method), includes a sensor array including at least two sensors providing a basis for ensemble averaging.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: March 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Arun Sharma, Hien Dang, Evangelos S. Eleftheriou, Mark A. Lantz, Charalampos Pozidis
  • Patent number: 7884339
    Abstract: The present invention provides a color indicator dosimeter system to detect and quantify a dosage of ionizing radiation in a wide range wherein said system comprises phenolic glycoside as one of the components. The present invention also relates to a method for using dosimeter system as described hereinabove for detecting and quantifying a dosage of ionizing radiation in a wide range.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: February 8, 2011
    Assignee: Secretary, Department of Atomic Energy
    Inventors: Sumit Gupta, Suchandra Chatterjee, Prasad S. Variyar, Arun Sharma
  • Patent number: 7855430
    Abstract: A method of mounting an electronic component on a substrate includes forming at least one trench in a surface of the substrate. The trenches formed in the substrate reduce a stiffness of the substrate, which provides less resistance to shear. Accordingly, the trenches reduce the amount of strain on the joints, which mount the electronic component to the substrate, which enhances the life of the joints.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: December 21, 2010
    Assignee: International Business Machines Corporation
    Inventors: David Questad, Vijayeshwar D. Khanna, Jennifer V. Muncy, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit
  • Publication number: 20100316614
    Abstract: The present invention provides compositions and methods for the regeneration of tissue. In particular, the present invention provides mesenchymal stem cells (MSCs) and endothelial progenitor cells (EPCs) for bladder regeneration.
    Type: Application
    Filed: June 16, 2010
    Publication date: December 16, 2010
    Applicant: NORTHWESTERN UNIVERSITY
    Inventors: Arun Sharma, Partha Hota, Natalie Fuller, Derek Matoka, Earl Cheng
  • Patent number: 7843967
    Abstract: Techniques for multiple protocol cross layer customized QoS propagation and mapping are described herein. In one embodiment of the invention, a first QoS code of a packet is determined, the packet having a first encapsulation layer and a second encapsulation layer, the first QoS code being included within the first encapsulation of the packet. From application of a first cross layer QoS map to the first QoS code, determining that the second encapsulation layer of the packet should be used in determining a QoS classification. The reference point to the second encapsulation layer is stored. The QoS classification is determined with use of the reference point. A representation of the QoS classification is stored in a QoS descriptor and the QoS descriptor is used to influence processing of the packet. Other methods and apparatuses are also described.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: November 30, 2010
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Pritam Baruah, Arun Sharma, Timothy J. Lynch, Ramanathan Lakshmikanthan, Peter Arberg
  • Publication number: 20100276784
    Abstract: An electronic module including a substrate having at least one structure that reduces stress flow through the substrate, wherein the structure comprises at least one trench in a surface of the substrate.
    Type: Application
    Filed: May 20, 2010
    Publication date: November 4, 2010
    Applicant: International Business Machines Corporation
    Inventors: David Questad, Vijayeshwar D. Kharma, Jennifer V. Muncy, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit
  • Publication number: 20100278191
    Abstract: Line cards receive control packets and perform a hierarchical rate limiting on those control packets. A set of identifier keys are extracted from the control packets and the protocol of those control packets are determined. At a first level, the control packets are rate limited per unique set of identifier keys per protocol. Those packets which fail the first rate limiting level are dropped. Those packets which pass the first rate limiting level are rate limited at a second level per protocol type. Those packets which fail the second level rate limiting are dropped while those packets which pass the second level rate limiting are sent to the control card for further processing.
    Type: Application
    Filed: April 29, 2009
    Publication date: November 4, 2010
    Inventors: Anubhav Gupta, Arunkumar M. Desigan, Arun Sharma, Mukund Srinivasan
  • Publication number: 20100274522
    Abstract: A method judging a temperature of a chip including using a limited set of temperature sensors and using a knowledge of a power dissipation, estimating a temperature on a surface of a chip and predicting a future temperature of the chip knowing the instruction stream characteristics to be processed by the chip.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 28, 2010
    Applicant: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Hien P. Dang, Arun Sharma
  • Patent number: 7823151
    Abstract: Systems and methods are disclosed to support partial physical addressing modes on a virtual machine. An example method disclosed herein identifies a change of a first translation mode to a second translation mode on a host hardware platform, the host hardware platform including a processor, the processor further including region registers; identifies an address as cacheable or non-cacheable; saves contents of the region registers for the first translation mode to processor memory; updates content of the region registers corresponding to the second translation mode; identifies a change of the second translation mode to the first translation mode; and populates the region registers with the contents of the saved region registers corresponding to the first translation mode.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: October 26, 2010
    Assignee: Intel Corporation
    Inventors: Rohit Seth, Arun Sharma
  • Patent number: 7820488
    Abstract: A microelectronic device is made of a semiconductor substrate, a heat generating component in a layer thereof, and a body within the remaining semiconductor substrate. The body is made of materials which have a high thermal inertia and/or thermal conductivity. When high thermal conductivity materials are used, the body acts to transfer the heat away from the substrate to a heat sink.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Gareth Hougham, Sung Kang, Lawrence Mok, Hien Dang, Arun Sharma
  • Publication number: 20100262399
    Abstract: A method of estimating temperature of a transient nature of a thermal system, including, without a temperature measurement being made available, determining a drive current and thermal parameters of the thermal system.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 14, 2010
    Applicant: International Business Machines Corporation
    Inventors: Sri M. Sri-Jayantha, Hien P. Dang, Arun Sharma
  • Publication number: 20100218364
    Abstract: A pattern matched pair of a front metal interconnect layer and a back metal interconnect layer having matched thermal expansion coefficients are provided for a reduced warp packaging substrate. Metal interconnect layers containing a high density of wiring and complex patterns are first developed so that interconnect structures for signal transmission are optimized for electrical performance. Metal interconnect layers containing a low density wiring and relatively simple patterns are then modified to match the pattern of a mirror image metal interconnect layer located on the opposite side of the core and the same number of metal interconnect layer away from the core. During this pattern-matching process, the contiguity of electrical connection in the metal layers with a low density wiring may become disrupted. The disruption is healed by an additional design step in which the contiguity of the electrical connection in the low density is reestablished.
    Type: Application
    Filed: May 7, 2010
    Publication date: September 2, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sri M. Sri-Jayantha, Hien P. Dang, Vijayeshwar D. Khanna, Arun Sharma
  • Patent number: 7777301
    Abstract: A method of mounting an electronic component on a substrate includes forming at least one trench in a surface of the substrate. The trenches formed in the substrate reduce a stiffness of the substrate, which provides less resistance to shear. Accordingly, the trenches reduce the amount of strain on the joints, which mount the electronic component to the substrate, which enhances the life of the joints.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: David Questad, Vijayeshwar D. Khanna, Jennifer V. Muncy, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit