Patents by Inventor Arvind Kumar

Arvind Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11296612
    Abstract: A method for controlling a voltage source power converter of a renewable energy power conversion system includes providing the voltage source power converter having, at least, a rotor-side converter and a line-side converter. The method also includes generating, via a converter controller, a first set of switching pulses based on a third-harmonic phase opposition carrier-based pulse width modulation (PO_CB_PWM) scheme. Further, the method includes generating, via the converter controller, a second set of switching pulses based on a third-harmonic in phase carrier-based pulse width modulation (IP_CB_PWM) scheme. As such, the method includes implementing, via the converter controller, a pulse-width modulation scheme for the rotor-side and line-side converters using the first and second sets of switching pulses, respectively, to obtain an output voltage from the voltage source converter to a desired magnitude, shape, and/or frequency.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: April 5, 2022
    Assignee: General Electric Company
    Inventors: Joseph Kiran Banda, Kapil Jha, Hridya Ittamveettil, Arvind Kumar Tiwari
  • Patent number: 11295610
    Abstract: The present disclosure relates to system(s) and method(s) for generating an alert based on change in traffic pattern. The system receives historic traffic data and current traffic data, associated with each road segment, from a set of road segments. Further, the system identifies a change traffic pattern based on analysing the historic traffic pattern and the current traffic pattern, using data analytics and a machine learning algorithm. Furthermore, the system identifies a sub-set of road segments, from the set of road segments, based on comparison of the change in traffic pattern and a pre-defined threshold. The system further determines root cause of change in traffic pattern by analysing the sub-set of road segments. Further, the system generates an alert for updating one or more road segments, from the sub-set of road segments, based on the root cause of change in traffic pattern.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: April 5, 2022
    Assignee: HCL Technologies Limited
    Inventors: Arvind Kumar Maurya, Akhilesh Kumar Gupta
  • Publication number: 20220088094
    Abstract: The present invention relates to probiotic compositions and methods for increasing animal health. The probiotic compositions include one or more isolated strains of novel Lactobacillus reuteri strains which colonizes the gastrointestinal tract to increase the health of an animal.
    Type: Application
    Filed: October 15, 2021
    Publication date: March 24, 2022
    Inventors: Arvind KUMAR, Dharanesh Mahimapura GANGAIAH
  • Patent number: 11263566
    Abstract: Techniques are described herein for seasonal pattern determination and validation. In one or more embodiments, a set of time-series data is received to analyze for seasonal behavior. In response a plurality of patterns may be generated, including a first pattern and a second pattern, such that each of the first pattern and the second pattern approximate data points that represent a same sub-period of multiple instances of a season within the set of time-series data. One or more other instances of the season may then be analyzed to determine whether at least part of the first pattern or the second pattern is detected. Based at least in part on determining that the at least part of the first pattern is detected in the at least part of the same sub-period, a responsive action that is associated with the first pattern may be performed.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: March 1, 2022
    Assignee: Oracle International Corporation
    Inventors: Arvind Kumar Maheshwari, Raghav Ravichandran, Vladimir Volchegursky, Tse-Han Huang
  • Patent number: 11263572
    Abstract: An example method for rendering a dynamic dashboard for an electronic computing device includes receiving data regarding a server computing device. The data indicates whether there are any current or potential problems that impact an operation of the server computing device. Information is obtained regarding any business applications currently running on the server computing device. Information is obtained regarding customers using the business applications currently running on the server computing device. The dynamic dashboard is created to include the information regarding the customers and the business applications currently running on the server computing device and that describes any current or potential problems based on the data. Content of the dynamic dashboard is tailored based upon an identity of an individual who is accessing the dynamic dashboard. The dynamic dashboard is rendered on the electronic computing device.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: March 1, 2022
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Parul Ghosh, Shishir Vasant Rao, Niravkumar N. Bajaj, Priyanka Dixit, Arvind Kumar Gottapally, Abhishek Kumar
  • Patent number: 11264460
    Abstract: The present disclosure provides methods for forming a channel structure in a film stack for manufacturing three dimensional (3D) stacked memory cell semiconductor devices. In one embodiment, a memory cell device includes a film stack comprising alternating pairs of dielectric layers and conductive structures horizontally formed on a substrate, and a channel structure formed in the film stack, wherein the channel structure is filled with a channel layer and a protective blocking layer, wherein the channel layer has a gradient dopant concentration along a vertical stacking of the film stack.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: March 1, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Arvind Kumar, Sanjeev Manhas, Mahendra Pakala, Ellie Y. Yieh
  • Patent number: 11250344
    Abstract: The present subject matter discloses a system and method to enable a machine learning based analytics platform. The method may comprise generating a graphical user interface to enable one or more stakeholders to generate and manage a model for predictive analysis. The method may further comprise enabling a business user to define the business problem, and generate models to perform predictive analysis. The method may further comprise deploying the model, in a distributed environment, over a target platform. The method may further comprise monitoring the model to identify at least one error in the model and re-training the model for performing predictive analysis based on the at least one error, thereby enabling the machine learning based analytics platform.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: February 15, 2022
    Assignee: HCL Technologies Limited
    Inventors: Arvind Kumar Maurya, Yogesh Gupta, Parveen Jain, S U M Prasad Dhanyamraju
  • Patent number: 11244525
    Abstract: A method can include obtaining access code data corresponding to an access code transmitted to a user device. The method can further include monitoring the user device. The method can further include determining, based on the monitoring, that the access code is shared. The method can further include initiating, in response to the determining that the access code is shared, an invalidation of the access code.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: February 8, 2022
    Assignee: International Business Machines Corporation
    Inventors: Saurabh Yadav, Raghuveer Prasad Nagar, Arvind Kumar
  • Publication number: 20220029424
    Abstract: A hybrid power plant including a plurality of power sources and controllers, a hybrid plant controller, and a computing system. The controllers operate the power sources according to operating set points. The hybrid plant controller transmits the operating set points to the controllers. The computing system is coupled to the hybrid plant controller and receives a first set of input parameters from a first subscriber, and carries out a first level of services to which the first subscriber subscribes to determine operating parameters for the first subscriber. The computing system receives a second set of input parameters from a second subscriber and carries out a second level of services to which the second subscriber subscribes to determine operating parameters for the second subscriber. The computing system then computes the operating set points based on aggregate operating parameters for the first and second subscribers.
    Type: Application
    Filed: December 12, 2019
    Publication date: January 27, 2022
    Inventors: Rajni Burra, Deepak Raj Sagi, Arvind Kumar Tiwari
  • Publication number: 20220020706
    Abstract: A tamper-resistant memory is formed by placing a solid-state memory array between metal wiring layers in the upper portion of an integrated circuit (back-end of the line). The metal layers form a mesh that surrounds the memory array to protect it from picosecond imaging circuit analysis, side channel attacks, and delayering with electrical measurement. Interconnections between a memory cell and its measurement circuit are designed to protect each layer below, i.e., an interconnecting metal portion in a particular metal layer is no smaller than the interconnecting metal portion in the next lower layer. The measurement circuits are shrouded by the metal mesh. The substrate, metal layers and memory array are part of a single monolithic structure. In an embodiment adapted for a chip identification protocol, the memory array contains a physical unclonable function identifier that uniquely identifies the tamper-resistant integrated circuit, a symmetric encryption key and a release key.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Inventors: Jean-Olivier Plouchart, Dirk Pfeiffer, Arvind Kumar, Takashi Ando, Peilin Song
  • Publication number: 20220019703
    Abstract: An obfuscation circuit relies on a tamper-resistant nonvolatile memory which encodes a trusted Boolean function. The Boolean function is used to enable several operations relating to circuit obfuscation, including obfuscation of logic circuitry, obfuscation of operand data, and release of IP blocks. The tamper-resistant nonvolatile memory is part of a trusted integrated circuit structure, i.e., one fabricated by a trusted foundry, separate from another integrated circuit structure which contains the various operational logic circuits of the design and is fabricated by an untrusted foundry. The Boolean function is encoded based on a look-up table implemented as a cascaded multiplexer circuit. Multiple obfuscation functions can be so encoded. The obfuscation functions may be reprogrammed using a protocol that relies on symmetric keys, one of which is stored in the tamper-resistant nonvolatile memory.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Inventors: Jean-Olivier Plouchart, Dirk Pfeiffer, Arvind Kumar, Takashi Ando, Peilin Song
  • Patent number: 11221687
    Abstract: One embodiment provides a method. The method includes receiving, with a computing system, stylus orientation data representing an orientation of a stylus. The method includes receiving, with a computing system, grip characteristics data representing a grip on the stylus by a user. The method includes identifying, with the computing system, a stylus mode for use by the computing system, at least partially based on the stylus orientation data and the grip characteristics data. The method includes applying the stylus mode to the computing system to interpret interaction data representing interactions of the stylus with the computing system.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: January 11, 2022
    Assignee: Intel Corporation
    Inventors: Arvind Kumar, Amy Wiles
  • Patent number: 11223208
    Abstract: A hybrid power generation system is presented. The hybrid power generation system includes a generator operable via a prime mover and configured to generate an alternating current (AC) power. The hybrid power generation system further includes a first power converter electrically coupled to the generator, where the first power converter includes a direct current (DC) link. Furthermore, the hybrid power generation system includes a DC power source configured to be coupled to the DC-link. Moreover, the hybrid power generation system also includes a second power converter. Additionally, the hybrid power generation system includes an integration control sub-system operatively coupled to the first power converter and the DC power source. The integration control sub-system includes at least one bypass switch disposed between the DC power source and the DC-link and configured to connect the DC power source to the DC-link via the second power converter or bypass the second power converter.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: January 11, 2022
    Assignee: General Electric Company
    Inventors: Govardhan Ganireddy, Arvind Kumar Tiwari, Yashomani Y. Kolhatkar
  • Patent number: 11216463
    Abstract: A relational database system for performing a join operation between a first table and a second table may include a query analyzer and an optimization engine. The query analyzer may compare predicates of a join operation query for an American National Standards Institute (ANSI) compliant database. The optimization engine, based upon comparison of the predicates, is to bypass a scan of the second table as part of outputting semantically correct results for the join operation.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: January 4, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Shine Mathew, Ashish Dange, Arvind Kumar
  • Publication number: 20210403988
    Abstract: A biomarker signal amplifier amplifies chemical analyte binding and includes: a surface strand disposed on an analysis substrate and including an exchange region; a particle strand hybridized to the surface strand in an absence of a chemical analyte that preferentially hybridizes to the exchange region as compared with the particle strand, and the particle strand is dissociated from the surface strand when the surface strand is in a presence of the chemical analyte; and a reporter particle attached to the particle strand and disposed proximate to the analysis substrate when the particle strand is hybridized to the surface strand in absence of the chemical analyte and that changes the electrical potential of the analysis substrate depending on whether the particle strand is hybridized to the surface strand.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 30, 2021
    Inventors: Arvind Kumar Balijepalli, Jacob Michael Majikes
  • Patent number: 11211378
    Abstract: Three-dimensional (3D) semiconductor memory structures and methods of forming 3D semiconductor memory structures are provided. The 3D semiconductor memory structure includes a chip comprising a memory and Through-Silicon Vias (TSVs). The 3D semiconductor memory structure further includes a hardware accelerator arranged on and coupled face-to-face to the above chip. The 3D semiconductor memory structure also includes a substrate arranged under the under the (3D) semiconductor memory structure and the hardware accelerator and attached to the TSVs and external inputs and outputs of the memory chip and the hardware accelerator.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: December 28, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mukta G. Farooq, Arvind Kumar
  • Publication number: 20210390991
    Abstract: Methods and apparatus for duty cycle adjuster optimization training algorithms to minimize jitter associated with DDR5 DRAM transmitters. Basic and Advanced Duty Cycle Adjuster (DCA) training algorithms are implemented to reduce duty cycle error and hence reduce phase mismatch translated jitter in the transmitter DQS signals. In accordance with aspects of the Basic DCA training algorithm, duty cycles for QCLK, IBQCLK, and QBCLK are adjusted by a memory controller that utilizes a DCA function implemented on a memory module (e.g., DDR5 SDRAM DIMM) to obtain a first set of optimized DCA code settings. The first set of optimized DCA code settings are then used as initial settings for the Advance DCA training algorithm to further optimize the DCA code settings for QCLK, IBQCLK, and QBCLK. A similar technical may be employed to reduce duty cycle error and jitter for DQ signals.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 16, 2021
    Inventors: Arvind KUMAR, Dean-Dexter R. EUGENIO, Santhosh MUSKULA
  • Patent number: 11201244
    Abstract: Embodiments of the invention are directed to a resistive switching device (RSD). A non-limiting example of the RSD includes a fin-shaped element formed on a substrate, wherein the fin-shaped element includes a source region, a central channel region, and a drain region. A gate is formed over a top surface and sidewalls of the central channel region. The fin-shaped element is doped with impurities that generate interstitial charged particles configured to move interstitially through a lattice structure of the fin-shaped element under the influence of an electric field applied to the RSD.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joel P. de Souza, Babar Khan, Arvind Kumar, Yun Seog Lee, Ning Li, Devendra K. Sadana
  • Patent number: 11196260
    Abstract: A method for operating a power generation system that supplies real and reactive power to a grid includes receiving a reactive power demand made on the power generation system at an operating state of the power generation system and a grid state. Further, the method includes decoupling reactive power control and voltage control between a generator and a reactive power compensation device so as to reduce an oscillatory response of a reactive power output from the reactive power compensation device and the generator. Moreover, the method includes operating, via a device controller, the reactive power compensation device in a reactive power control mode to generate at least a portion of the reactive power demand.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: December 7, 2021
    Assignee: General Electric Company
    Inventors: Jayanti Navilgone Ganesh, Arvind Kumar Tiwari, Kasi Viswanadha Raju Gadiraju, Igor Berroteran, Robert Gregory Wagoner, Cornelius Edward Holliday, III
  • Publication number: 20210366789
    Abstract: One or more die stacks are disposed on a redistribution layer (RDL) to make an electronic package. The die stacks include a die and one or more Through Silicon Via (TSV) dies. Other components and/or layers, e.g. interposes layers, can be included in the structure. An epoxy layer disposed on the RDL top surface and surrounds and attached to all the TSV die sides and all the die sides. Testing circuitry is located in various locations in some embodiments. Locations including in the handler, die, TSV dies, interposes, etc. Testing methods are disclosed, Methods of making including “die first” and “die last” methods are also disclosed. Methods of making heterogenous integrated structure and the resulting structures are also disclosed, particularly for large scale, e.g. wafer and panel size, applications.
    Type: Application
    Filed: May 25, 2020
    Publication date: November 25, 2021
    Inventors: John Knickerbocker, Bing Dang, Qianwen Chen, Joshua M. Rubin, Arvind Kumar