Patents by Inventor Ashish .

Ashish . has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Poly aryl ether ketone polymer blends
    Patent number: 9006348
    Abstract: Phase separated blends of polyaryl ether ketones, polyaryl ketones, polyether ketones, polyether ether ketones and mixtures thereof with at least one polysulfone etherimide, wherein the polysulfone etherimide has greater than or equal to 50 mole % of the polymer linkages contain at least one aryl sulfone group are described. Such blends have improved load bearing capability at high temperature. In another aspect a high crystallization temperature, especially at fast cooling rates, is achieved.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: April 14, 2015
    Assignee: Sabic Global Technologies B.V.
    Inventors: Ashish Aneja, Robert Russell Gallucci, Roy Ray Odle, Kapil Chandrakant Sheth
  • Manual welding electrode
    Patent number: 9006611
    Abstract: An electrode for use in a welding process may comprise a finite length electrode core. The electrode core may be encapsulated at least partially within a coating comprising a flux material. One end of the electrode core may be tapered from a first diameter D to a second smaller diameter D1. The tapered end may further be covered with a coating that enhances the arc starting capabilities of the electrode.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: April 14, 2015
    Assignee: Lincoln Global, Inc.
    Inventors: Ashish Kapoor, Michael Morlock
  • Power Supply Engagement and Method Therefor Data
    Publication number: 20150100806
    Abstract: A system includes power supply units (PSUs) to supply power to components. For each PSU, a power conversion efficiency profile is determined. A maximum amount of power consumed during operation of the components is determined. A minimum number of PSUs capable of providing the maximum amount of power is determined. A first amount of power consumed at inputs of the minimum number of PSUs is calculated based on the maximum amount of power and based on the determined power conversion efficiency profile of each of the PSUs. A first number of PSUs to engage is determined, the first number greater than the minimum number of PSUs, wherein a total amount of power consumed at inputs of the first number of PSUs during operation of the system is less than the first amount of power, the determining based on the power conversion efficiency profile of each PSU.
    Type: Application
    Filed: December 18, 2014
    Publication date: April 9, 2015
    Inventors: Ashish Munjal, Jaydev Reddy, Michael J. Roberts
  • Field effect transistor-based bio-sensor
    Patent number: 8999739
    Abstract: An apparatus comprises: a sensing element formed on a buried oxide layer of a substrate and providing communication between a source region and a drain region; a gate dielectric layer on the sensing element, the gate dielectric layer defining a sensing surface on the sensing element; a passive surface surrounding the sensing surface; and a compound bound to the sensing surface and not bound to the passive surface, the compound having a ligand specifically configured to preferentially bind a target molecule to be sensed. An electrolyte solution in contact with the sensing surface and the passive surface forms a top gate of the apparatus.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Christopher P. D'Emic, Ashish Jagtiani, Sufi Zafar
  • Process for producing cemented and skinned ceramic honeycomb structures
    Patent number: 8999448
    Abstract: Organic polymer particles are provided in a cement composition that is used to apply a skin to a ceramic honeycomb, or to bond the ceramic honeycomb to another honeycomb or another material. The presence of the organic polymer particles reduces the penetration of the cement composition through porous walls of the honeycomb. In this way, less blocking of the honeycomb cells is seen, and the reduction in thermal shock performance that is often seen when cement compositions are applied to ceramic honeycombs is reduced.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: April 7, 2015
    Assignee: Dow Global Technologies LLC
    Inventors: Paul C. Vosejpka, Jun Cai, Ashish Kotnis
  • Method, system, user equipment and program for dynamically selecting proxies for communication with servers using known paths
    Patent number: 9003058
    Abstract: Method, User equipment, system and program for limiting an amount of information transmitted between a plurality of user equipments and a server. The method comprising establishing communication links between a plurality of user equipments based upon a proximity of the plurality of user equipments, determining a tactical common mission group selected from the linked plurality of user equipments using a mission profile stored in each of the plurality of user equipments; and selecting a proxy for the tactical common mission group. The proxy communicates with a server on behalf of the tactical common mission group. A proxy is selected based upon a ranking.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: April 7, 2015
    Assignee: Telcordia Technologies, Inc.
    Inventors: Chit Chung, Ashish Jain, Dennis Egan, John R. Wullert, II, Hyong Sop Shim
  • Self-elevating platform employing actuators
    Patent number: 8997435
    Abstract: A method including arranging a plurality of actuators into an operating position, arranging a first upper frame and a second upper frame proximate the actuators, attaching a support to the first upper frame and the second upper frame, wherein the support is located above the actuators, and extending the actuators to engage the support. The method also includes extending the actuators to raise the support, the first upper frame, and the second upper frame to a first position, arranging a first middle frame below the first upper frame and a second middle frame below the second upper frame, retracting the actuators to lower the support, the first upper frame, and the second upper frame to a second position, and attaching the first upper frame to the first middle frame and attaching the second upper frame to the second middle frame.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 7, 2015
    Assignee: Nabors Drilling International Limited
    Inventors: Padira Reddy, Ashish Gupta, Sean M. Bailey
  • METHODS FOR DEPOSITING AN ALUMINUM OXIDE LAYER OVER GERMANIUM SUSBTRATES IN THE FABRICATION OF INTEGRATED CIRCUITS
    Publication number: 20150093914
    Abstract: Methods for fabricating integrated circuits are provided in various exemplary embodiments. In one embodiment, a method for fabricating an integrated circuit includes providing a germanium-based semiconductor substrate comprising a GeOx layer formed thereon and exposing the semiconductor substrate to first and second atomic layer deposition (ALD) processes. The first ALD process includes exposing the semiconductor substrate to a first gaseous precursor comprising aluminum and exposing the semiconductor substrate to a second gaseous precursor comprising a first oxygen-containing precursor. The second ALD process includes exposing the semiconductor substrate to a first gaseous precursor comprising aluminum and exposing the semiconductor substrate to a second gaseous precursor comprising a second oxygen-containing precursor.
    Type: Application
    Filed: October 2, 2013
    Publication date: April 2, 2015
    Applicants: Intermolecular, GLOBALFOUNDRIES, Inc.
    Inventors: Bin Yang, Abhijit Pethe, Albert Lee, Amol Joshi, Ashish Bodke, Kevin Kashefi, Salil Mujumdar
  • METHOD AND APPARATUS FOR REMOTELY DELIVERING SOFTWARE
    Publication number: 20150095905
    Abstract: A computer implemented method and apparatus for remotely delivering software. The method comprises installing a provisioning application on a first device, in response to accessing an advertisement for a software product; determining one or more second devices that are synchronized with the first device, wherein the one or more second devices are remote from the first device, and wherein the one or more synchronized second devices are not registered with a software provider of the software product; registering the one or more synchronized second devices with the software provider of the software product; receiving, from the first device, a selection of one or more of the registered devices for installation of the software product; and directing installation of the software product on the one or more selected registered devices.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 2, 2015
    Applicant: Adobe Systems Incorporated
    Inventors: Amrita Chakrabarti, Ashish Kumar Agarwal, Priyank Jain, Sanjeev Kumar Biswas, Vikalp Gupta
  • CONTINUOUS TUNING OF ERBIUM SILICIDE METAL GATE EFFECTIVE WORK FUNCTION VIA A PVD NANOLAMINATE APPROACH FOR MOSFET APPLICATIONS
    Publication number: 20150091105
    Abstract: Erbium silicide layers can be used in CMOS transistors in which the work function of the erbium silicide layers can be tuned for use in PMOS and NMOS devices. A nano-laminate sputtering approach can be used in which silicon and erbium layers are alternatingly deposited to determine optimum layer properties, composition profiles, and erbium to silicon ratios for a particular gate stack.
    Type: Application
    Filed: November 26, 2013
    Publication date: April 2, 2015
    Applicant: Intermolecular Inc.
    Inventors: Zhendong Hong, Ashish Bodke, Olov Karlsson
  • RECONFIGURABLE PASSIVE FILTER
    Publication number: 20150091640
    Abstract: A passive filter for connection between an AC source and a load, in either three-phases or in a single-phase arrangement. The filter includes, for each phase, a trap circuit having an inductor in series with a capacitor, the trap circuit having at least two terminals. A line reactor is connected between the AC source and the load, the line reactor having at least an input terminal, an output terminal and a tap terminal. A switch selectively connects at least one of the trap circuit terminals to a selected one of the line reactor terminals. The switch is capable of selecting which of the trap circuit terminals to connect to which of the line reactor terminals on the basis of a level of voltage distortion being experienced by the AC source, or on the basis of a calculated level of background voltage total harmonic distortion.
    Type: Application
    Filed: September 30, 2014
    Publication date: April 2, 2015
    Applicant: TCI, LLC
    Inventors: Ian Wallace, Ashish Bendre, Neil Wood, William Kranz
  • METHODS FOR REMOVING A NATIVE OXIDE LAYER FROM GERMANIUM SUSBTRATES IN THE FABRICATION OF INTEGRATED CIRCUITSI
    Publication number: 20150093887
    Abstract: Methods for fabricating integrated circuits are provided in various exemplary embodiments. In one embodiment, a method for fabricating an integrated circuit includes providing a germanium-based semiconductor substrate including a GeOx layer formed thereon having a first thickness, removing a portion of the GeOx layer by exposing the semiconductor substrate to a NF3/NH3 plasma dry etch so as to reduce the first thickness of the GeOx layer to a second thickness, and depositing a high-k material over the GeOx layer of the semiconductor substrate.
    Type: Application
    Filed: April 15, 2014
    Publication date: April 2, 2015
    Applicant: GLOBALFOUNDRIES, INC.
    Inventors: Bin Yang, Shurong Liang, Kristina Young-Fisher, Kevin Kashefi, Amol Joshi, Salil Mujumdar, Abhijit Pethe, Albert Lee, Ashish Bodke
  • METHODS FOR REMOVING A NATIVE OXIDE LAYER FROM GERMANIUM SUSBTRATES IN THE FABRICATION OF INTEGRATED CIRCUITS
    Publication number: 20150093889
    Abstract: Methods for fabricating integrated circuits are provided in various exemplary embodiments. In one embodiment, a method for fabricating an integrated circuit includes providing a germanium-based semiconductor substrate comprising a GeOx layer formed thereon having a first thickness, removing a portion of the GeOx layer by exposing the semiconductor substrate to a hydrogen-plasma dry etch so as to reduce the first thickness of the GeOx layer to a second thickness, and depositing a high-k material over the GeOx layer of the semiconductor substrate.
    Type: Application
    Filed: October 2, 2013
    Publication date: April 2, 2015
    Applicants: Intermolecular, GLOBALFOUNDRIES, Inc.
    Inventors: Bin Yang, Abhijit Pethe, Albert Lee, Amol Joshi, Ashish Bodke, Kevin Kashefi, Salil Mujumdar
  • Method and Apparatus for Electrical Keying of an Integrated Circuit Package Having Rotationally Symmetric Footprint
    Publication number: 20150091390
    Abstract: A method and apparatus for adjusting circuit operation in response to physical orientation of an integrated circuit (IC) coupled to a host site via direct soldering or a socket. The IC can be installed in a correct orientation or rotated and installed in an incorrect orientation. The IC may have a square, substantially symmetric footprint and the incorrect orientation may correspond to 90 or 180 degree rotation of the IC from the correct orientation. The orientations may be discerned by sensing electrical characteristics of the installed IC. For example, the IC may ground a detection line when installed in the correct orientation, while the detection line may be floating when the IC is installed in an incorrect orientation. The IC may be switchably connected to other components such as a power supply only when it is detected as being installed in the correct orientation.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 2, 2015
    Inventors: ASHISH SYAL, PAUL DAVID NEWMAN
  • MERCHANT LOAN MANAGEMENT AND PROCESSING
    Publication number: 20150095210
    Abstract: Methods and systems are provided for determining creditworthiness, such as for online merchants. For example, a system can comprise one or more memories that store sales performance information regarding an online merchant. One or more hardware processors can be in communication with the one or more memories and can be operable to access the sales performance information in the one or more memories. The one or more hardware processors can be further operable to determine, at least in part from the sales performance information, a creditworthiness of the online merchant.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Inventors: Brian Grech, Ashish Nayyar, Brian M. Hale
  • AUTOMATED PIPE SLIPS
    Publication number: 20150090463
    Abstract: An automated pipe slips includes a pipe slips body having a generally frustoconically tapered inner wall. A plurality of wedges is positioned to slide along the tapered inner wall and may be hydraulically driven. In some embodiments, the wedges alternate between long and short wedges, such that only long wedges are used to engage a tubular member having a small diameter, and both long and short wedges are used to engage a tubular member having a large diameter. In some embodiments, the automated pipe slips may include a centralizer assembly. In some embodiments, the automated pipe slips may include a wiper assembly.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 2, 2015
    Inventors: Ashish Gupta, Vladimir Scekic, Padira Reddy, Brian Ellis, Faisal Yousef, Chris Magnuson, Larry Heighington
  • Device for leveling ink under a thermal gradient
    Patent number: 8991997
    Abstract: An ink leveling device for controlling a temperature difference across a substrate having ink disposed on the upper surface, the device including a cooling device cooling a bottom of a substrate to a first temperature that is lower than a viscosity threshold temperature of the ink, a heating device heating the upper surface of the ink layer to a second temperature that is greater than the viscosity threshold temperature of the ink and a device applying shear force across the upper surface of the ink layer.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 31, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Ashish V. Pattekar, Lars Erik Swartz, David K. Biegelsen, Armin R. Volkel, Gregory J. Kovacs
  • Small block write operations in non-volatile memory systems
    Patent number: 8996796
    Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 31, 2015
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
  • Overlapping experiments
    Patent number: 8996497
    Abstract: User queries are received, with each query requesting a service from a server. Overlapping experiments are performed on at least a portion of the queries, with each experiment modifying one or more parameters associated with the queries or parameters associated with processing of the queries, and with the experiments organized into layers. Two or more experiments in different layers are allowed to be performed on the same query, and for any given layer, at most one experiment is allowed to be performed on the same query.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: March 31, 2015
    Assignee: Google Inc.
    Inventors: Ashish Agarwal, Eric Bauer Arbanovella, Diane Lambert, Ilia Mirkin, Michael M. Meyer, James A. Morrison, Daryl Pregibon, Susan Shannon, Diane L. Tang
  • Managing electrical stimulation therapy based on variable electrode combinations
    Patent number: 8996123
    Abstract: Various programming techniques are described for medical devices that deliver electrical stimulation therapy that may include mapping between discrete electrical stimulation parameters and a graphical view of the electrical stimulation representing a stimulation zone generated by the parameters. In one example, a method includes receiving, via a programmer for an electrical stimulator, user input that graphically manipulates at least one of size and a shape of a graphical representation of at least one electrical stimulation zone displayed on the programmer, and defining a program to control delivery of electrical stimulation therapy based on the user input.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: March 31, 2015
    Assignee: Medtronic, Inc.
    Inventors: Steven M. Goetz, Jon P. Davis, Nathan A. Torgerson, Shyam Gokaldas, Ashish Singal, Rajeev M. Sahasrabudhe, Brent A. Huhta