Patents by Inventor Asif Khan
Asif Khan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8222669Abstract: A device for forming a Group III-V semiconductor on a substrate. The device has a primary chamber comprising a substrate and a heat source for heating the substrate to a first temperature. A secondary chamber comprises a metal source and a second heat source for heating the secondary chamber to a second temperature. A first source is provided which is capable of providing HCl to the secondary chamber wherein the HCl and the metal form metal chloride. A metal-organic source is provided. A metal chloride source is provided which comprises a metal chloride. At least one of the metal chloride, the metal-organic and the second metal chloride react with the nitrogen containing compound to form a Group III-V semiconductor on the substrate.Type: GrantFiled: March 27, 2009Date of Patent: July 17, 2012Assignee: Nitek, Inc.Inventors: Asif Khan, Qhalid Fareed
-
Publication number: 20120145994Abstract: An improved process for forming a UV emitting diode is described. The process includes providing a substrate. A super-lattice is formed directly on the substrate at a temperature of at least 800 to no more than 1,300° C. wherein the super-lattice comprises AlxInyGa1-x-yN wherein 0<x?1, 0?y?1 and 0<x+y?1. A first conductive layer with a first type of conductivity is formed on the super-lattice wherein the first conductive layer comprises AlxInyGa1-x-yN wherein 0<x?1, 0?y?1 and 0<x+y?1. A quantum well region is formed on the first conductive layer wherein the quantum well region comprises AlxInyGa1-x-yN wherein 0<x?1, 0?y?1 and 0<x+y?1. A second conductive layer is formed on the quantum well with a second type of conductivity wherein the second conductive layer comprises AlxInyGa1-x-yN wherein 0<x?1, 0?y?1 and 0<x+y?1.Type: ApplicationFiled: February 23, 2012Publication date: June 14, 2012Applicant: Nitek, IncInventors: Vinod ADIVARAHAN, Qhalid Fareed, Asif Khan
-
Publication number: 20120034718Abstract: A vertical geometry light emitting diode with a strain relieved superlattice layer on a substrate comprising doped AlXInYGa1-X-YN. A first doped layer is on the strain relieved superlattice layer AlXInYGa1-X-YN and the first doped layer has a first conductivity. A multilayer quantum well is on the first doped layer comprising alternating layers quantum wells and barrier layers. The multilayer quantum well terminates with a barrier layer on each side thereof. A second doped layer is on the quantum well wherein the second doped layer comprises AlXInYGa1-X-YN and said second doped layer has a different conductivity than said first doped layer. A contact layer is on the third doped layer and the contact layer has a different conductivity than the third doped layer. A metallic contact is in a vertical geometry orientation.Type: ApplicationFiled: September 7, 2011Publication date: February 9, 2012Applicant: Nitek, Inc.Inventor: Asif Khan
-
Patent number: 8102843Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus has a first plurality of I/O ports, a second I/O port, and core logic. The first plurality of I/O ports is coupled to a plurality of operating system domains through a PCI Express fabric. Each of the first plurality of I/O ports is configured to route PCI Express transactions between said plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint, where the first shared input/output endpoint is configured to request/complete said PCI Express transactions for each of the plurality of operating system domains. The core logic is coupled to the first plurality of I/O ports and the second I/O port. The core logic routes the PCI Express transactions between the first plurality of I/O ports and the second I/O port.Type: GrantFiled: April 19, 2004Date of Patent: January 24, 2012Assignee: Emulex Design and Manufacturing CorporationInventors: Christopher J. Pettey, Asif Khan, Annette Pagan, Richard E. Pekkala, Robert Haskell Utley
-
Publication number: 20110220867Abstract: A light emitting device with an ultraviolet light-emitting structure having a first layer with a first conductivity, a second layer with a second conductivity; and a light emitting quantum well region between the first layer and second layer. A first electrical contact is in electrical connection with the first layer and a second electrical contact is in electrical connection with the second layer. A template serves as a platform for the light-emitting structure. The template has a micro-undulated buffer layer with AlxInyGa1-x-yN, wherein 0<x?1, 0?y?1 and 0<x+y?1, and a second buffer layer over the micro-undulated buffer layer. The second buffer layer is made of AlxInyGa1-x-yN, wherein 0<x?1, 0?y?1, 0<x+y?1. When an electrical potential is applied to the first electrical contact and the second electrical contact the device emits ultraviolet light.Type: ApplicationFiled: March 27, 2009Publication date: September 15, 2011Inventors: Asif Khan, Qhalid Fareed
-
Patent number: 7979592Abstract: A computer system includes a shared I/O device including functions providing access to device local memory space, and a plurality of roots coupled to the shared I/O device via a switch fabric. A first root assigns a first address in a first root memory space to a first function. A second root assigns a second address in a second root memory space to a second function. The switch fabric maps the first root memory space to a first portion of device local memory space and the second root memory space to a second portion of device local memory space. Subsequently, the switch receives a data transaction request from the first root targeted to the first address, translates the first address to a corresponding location in the first portion of the device local memory space based on the mapping, and routes the data transaction request to the I/O device.Type: GrantFiled: February 9, 2008Date of Patent: July 12, 2011Assignee: Emulex Design and Manufacturing CorporationInventors: Christopher J. Pettey, Stephen Glaser, Asif Khan, Jon Nalley, Stephen Rousset, Tom Saeger, Robert Haskell Utley
-
Publication number: 20110127571Abstract: A device for forming a Group III-V semiconductor on a substrate. The device has a primary chamber comprising a substrate and a heat source for heating the substrate to a first temperature. A secondary chamber comprises a metal source and a second heat source for heating the secondary chamber to a second temperature. A first source is provided which is capable of providing HCl to the secondary chamber wherein the HCl and the metal form metal chloride. A metal-organic source is provided. A metal chloride source is provided which comprises a metal chloride. At least one of the metal chloride, the metal-organic and the second metal chloride react with the nitrogen containing compound to form a Group III-V semiconductor on the substrate.Type: ApplicationFiled: March 27, 2009Publication date: June 2, 2011Applicant: NITEK, INC.Inventors: Asif Khan, Qhalid Fareed
-
Patent number: 7953074Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus includes a first plurality of I/O ports, a second I/O port, and a plurality of port initialization logic elements. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports routes transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. One of the plurality of port initialization logic elements is coupled to the second I/O port and remaining ones of the plurality of port initialization logic elements are each coupled to a corresponding one of the first plurality of I/O ports.Type: GrantFiled: January 31, 2005Date of Patent: May 31, 2011Assignee: Emulex Design and Manufacturing CorporationInventors: Christopher J. Pettey, Asif Khan, Annette Pagan, Richard E. Pekkala, Robert Haskell Utley
-
Publication number: 20110108887Abstract: An improved high breakdown voltage semiconductor device and method for manufacturing is provided. The device has a substrate and a AlaGa1-aN layer on the substrate wherein 0.1?a?1.00. A GaN layer is on the AlaGa1-aN layer. An In1-bGabN/GaN channel layer is on the GaN layer wherein 0.1?b?1.00. A AlcIndGa1-c-dN spacer layer is on the In1-bGabN/GaN layer wherein 0.1?c?1.00 and 0.0?d?0.99. A AleIn1-eN nested superlattice barrier layer is on the AlcIndGa1-c-dN spacer layer wherein 0.10?e?0.99. A AlfIngGa1-f-gN leakage suppression layer is on the AleIn1-eN barrier layer wherein 0.1?f?0.99 and 0.1?g?0.99 wherein the leakage suppression layer decreases leakage current and increases breakdown voltage during high voltage operation. A superstructure, preferably with metallic electrodes, is on the AlfIngGa1-f-gN leakage suppression layer.Type: ApplicationFiled: November 8, 2010Publication date: May 12, 2011Inventors: Qhalid Fareed, Vinod Adivarahan, Asif Khan
-
Publication number: 20110073838Abstract: Ultraviolet light emitting illuminator, and method for fabricating same, comprises an array of ultraviolet light emitting diodes and a first and a second terminal. When an alternating current is applied across the first and second terminals and thus to each of the diodes, the illuminator emits ultraviolet light at a frequency corresponding to that of the alternating current. The illuminator includes a template with ultraviolet light emitting quantum wells, a first buffer layer with a first type of conductivity and a second buffer layer with a second type of conductivity, all deposited preferably over a strain-relieving layer. A first and second metal contact are applied to the semiconductor layers having the first and second type of conductivity, respectively, to complete the LED. The emission spectrum ranges from 190 nm to 369 nm. The illuminator may be configured in various materials, geometries, sizes and designs.Type: ApplicationFiled: June 6, 2009Publication date: March 31, 2011Inventors: Asif Khan, Vinod Adivarahan, Qhalid Fareed
-
Patent number: 7917658Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus has a first plurality of I/O ports, a second I/O port, and link training logic. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports is configured to route transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. The link training logic is coupled to the second I/O port. The link training logic initializes a link between the second I/O port and the first shared input/output endpoint to support the transactions corresponding to the each of the plurality of operating system domains.Type: GrantFiled: May 25, 2008Date of Patent: March 29, 2011Assignee: Emulex Design and Manufacturing CorporationInventors: Christopher J. Pettey, Asif Khan, Annette Pagan, Richard E. Pekkala, Robert Haskell Utley
-
Publication number: 20110017976Abstract: A light emitting device with a template comprising a substrate and a nested superlattice. The superlattice has Al1-x-yInyGaxN wherein 0?x?? and 0?y?1 with x increasing with distance from said substrate. An ultraviolet light-emitting structure on the template has a first layer with a first conductivity comprising Al1-x-yInyGaxN wherein ??x; a light emitting quantum well region above the first layer comprising Al1-x-yInyGaxN wherein ??x?b; and a second layer over the light emitting quantum well with a second conductivity comprising Al1-x-yInyGaxN wherein b?x. The light emitting device also has a first electrical contact in electrical connection with the first layer, a second electrical contact in electrical connection with the second layer; and the device emits ultraviolet light.Type: ApplicationFiled: March 27, 2009Publication date: January 27, 2011Applicant: NITEK, INCInventors: Asif Khan, Qhalid Fareed
-
Publication number: 20110012089Abstract: A low resistance light emitting device with an ultraviolet light-emitting structure having a first layer with a first conductivity, a second layer with a second conductivity; and a light emitting quantum well region between the first layer and second layer. A first electrical contact is in electrical connection with the first layer and a second electrical contact is in electrical connection with the second layer. A template serves as a platform for the light-emitting structure. The ultraviolet light-emitting structure has a first layer having a first portion and a second portion of AlXInYGa(1-X-Y)N with an amount of elemental indium, the first portion surface being treated with silicon and indium containing precursor sources, and a second layer. When an electrical potential is applied to the first layer and the second layer the device emits ultraviolet light.Type: ApplicationFiled: March 27, 2009Publication date: January 20, 2011Inventors: Asif Khan, Qhalid Fareed, Vinod Adivarahan
-
Publication number: 20100320440Abstract: An ultra-violet emitting light-emitting device and method for fabricating an ultraviolet light emitting device (LED) with an AlInGaN multiple-quantum-well active region exhibiting stable cw-powers. The LED includes a template with an ultraviolet light-emitting structure on it. The template includes a first buffer layer on a substrate, then a second buffer layer on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity followed by a layer providing a quantum-well region with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next. Two metal contacts are applied to this construction, one to the semiconductor layer having the first type of conductivity and the other to the semiconductor layer having the second type of conductivity, to complete the LED.Type: ApplicationFiled: October 17, 2007Publication date: December 23, 2010Inventor: Asif KHAN
-
Publication number: 20100314605Abstract: The invention is a vertical geometry light emitting diode capable of emitting light in the electromagnetic spectrum having a substrate, a lift-off layer, a strain relieved superlattice layer, a first doped layer, a multilayer quantum wells comprising alternating layers quantum wells and barrier layers, a second doped layer, a third doped layer and a metallic contact that is in a vertical geometry orientation. The different layers consist of a compound with the formula AlxlnyGa(1-x-y)N, wherein x is more than 0 and less than or equal to 1, y is from 0 to 1 and x+y is greater than 0 and less than or equal to 1. The barrier layer on each surface of the quantum well has a band gap larger than a quantum well bandgap. The first and second doped layers have different conductivities.Type: ApplicationFiled: October 17, 2007Publication date: December 16, 2010Inventor: Asif Khan
-
Patent number: 7836211Abstract: An apparatus and method are provided that enable I/O devices to be shared and/or partitioned among a plurality of operating system domains within the load-store fabric of each of the operating system domains without requiring modification to the operating system or driver software of the operating system domains. The apparatus includes sharing logic and a first shared input/output (I/O) endpoint. The sharing logic is coupled to a plurality of operating system domains through a load-store fabric. The sharing logic routes transactions between the plurality of operating system domains. The first shared input/output (I/O) endpoint is coupled to the sharing logic. The first shared I/O endpoint requests/completes the transactions for the each of said plurality of operating system domains according to a variant of a protocol that encapsulates an OS domain header within a transaction layer packet.Type: GrantFiled: March 16, 2004Date of Patent: November 16, 2010Assignee: Emulex Design and Manufacturing CorporationInventors: Christopher J. Pettey, Asif Khan, Annette Pagan, Richard E. Pekkala, Robert Haskell Utley
-
Publication number: 20100264401Abstract: An ultra-violet light-emitting diode (LED) array, 12, and method for fabricating same with an AlInGaN multiple-quantum-well active region, 500, exhibiting stable cw-powers. The LED includes a template, 10, with an ultraviolet light-emitting array structure on it. The template includes a first buffer layer, 321, then a second buffer layer, 421, on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600, with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next, 800. A first metal contact, 980, is a charge spreading layer in electrical contact with the first layer and between the array of LED's. A second contact, 990, is applied to the semiconductor layer having the second type of conductivity, to complete the LED.Type: ApplicationFiled: August 13, 2008Publication date: October 21, 2010Inventors: Vinod Adivarahan, Asif Khan, Rubina Khan
-
Publication number: 20100213436Abstract: An ultra-violet light-emitting device and method for fabricating an ultraviolet light emitting device, 12, (LED or an LD) with an AlInGaN multiple-quantum-well active region, 10, exhibiting stable cw-powers. The device includes a non c-plane template with an ultraviolet light-emitting structure thereon. The template includes a first buffer layer, 321, on a substrate, 100, then a second buffer layer, 421, on the first preferably with a strain-relieving layer, 302, in both buffer layers. Next there is a semi-conductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600. Another semi-conductor layer, 700, having a second type of conductivity is applied next. Two metal contacts, 980 and 990, are applied to this construction, one to the semiconductor layer having the first type of conductivity and the other to the semiconductor layer having the second type of conductivity, to complete the light emitting device.Type: ApplicationFiled: May 8, 2008Publication date: August 26, 2010Inventor: Asif Khan
-
Patent number: 7782893Abstract: An apparatus and method is provided for allowing I/O devices to be shared and/or partitioned among a plurality of processing complexes within the load/store fabric of each of the processing complexes without requiring modification to the operating system or driver software of the processing complexes. The apparatus and method includes a switch for selectively coupling each of the processing complexes to one or more shared I/O devices. The apparatus and method further includes placing information within packets transmitted between the switch and the I/O devices to identify which of the processing complexes the packets are associated with. The invention further includes an apparatus and method within the shared I/O devices to allow the shared I/O devices to service each of the processing complexes independently.Type: GrantFiled: May 4, 2006Date of Patent: August 24, 2010Assignee: NextIO Inc.Inventors: Christopher J Pettey, Asif Khan, Annette Pagan, Richard E Pekkala, Robert H Utley
-
Publication number: 20100187545Abstract: The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The methods utilize lithography to control the location of the doped regions on the substrate. The process steps can be repeated to form a cyclic method of selectively doping different areas of the substrate with the same or different doping materials to further adjust the properties of the resulting substrate.Type: ApplicationFiled: November 13, 2007Publication date: July 29, 2010Applicant: UNIVERSITY OF SOUTH CAROLINAInventors: Asif Khan, Vinod Adivarahan