Patents by Inventor Atsuhiko Yamamoto

Atsuhiko Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230269500
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: January 4, 2023
    Publication date: August 24, 2023
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20230254608
    Abstract: Provided is an imaging device capable of suppressing deterioration in characteristics. The imaging device includes a first substrate portion and a second substrate portion on one surface side of the first substrate portion. The first substrate portion includes a sensor pixel, a first interlayer insulating film, and a first electrode portion. The second substrate portion includes a readout circuit, a second interlayer insulating film, and a second electrode portion. The first electrode portion and the second electrode portion are directly joined to each other. The second semiconductor substrate includes a first element region in which an amplification transistor is provided, a second element region in which another element is provided, and a through region through which the second semiconductor substrate passes in the thickness direction. The first element region and the second element region are isolated by the through region.
    Type: Application
    Filed: May 17, 2021
    Publication date: August 10, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kyosuke YAMADA, Atsuhiko YAMAMOTO, Takashi MACHIDA, Hideo KIDO, Ryo FUKUI, Yu SHIIHARA
  • Publication number: 20230209225
    Abstract: A solid-state imaging device includes a pixel array having a plurality of pixels. Each of the plurality of pixels includes a photoelectric conversion part embedded away from a substrate front surface of a semiconductor substrate, a memory part that holds a charge generated in the photoelectric conversion part, a first transfer transistor, a second transfer transistor, and a third transfer transistor connected in series between the photoelectric conversion part and the memory part, an accumulation part that accumulates the charge transferred from the memory part, and a light shielding part that covers a portion of the memory part facing a substrate rear surface side of the semiconductor substrate and has an opening between the photoelectric conversion part and the substrate front surface.
    Type: Application
    Filed: May 10, 2021
    Publication date: June 29, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yu SHIIHARA, Atsuhiko YAMAMOTO
  • Patent number: 11688753
    Abstract: An imaging device includes a first chip (72). The first chip includes first and second pixels including respective first and second photoelectric conversion regions (PD) that convert incident light into electric charge. The first chip includes a first connection region for bonding the first chip to a second chip (73) and including a first connection portion (702, 702d) overlapped with the first photoelectric conversion region in a plan view, and a second connection portion overlapped with the second photoelectric conversion region in the plan view. The first photoelectric region receives incident light of a first wavelength, and the second photoelectric conversion region receives incident light of a second wavelength that is greater than the first wavelength. The first connection portion overlaps an area of the first photoelectric conversion region that is larger than an area of the second photoelectric conversion region overlapped by the second connection portion.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: June 27, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomomi Ito, Atsuhiko Yamamoto, Atsushi Masagaki
  • Patent number: 11621284
    Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: April 4, 2023
    Assignee: SONY CORPORATION
    Inventors: Yusuke Uesaka, Atsuhiko Yamamoto
  • Patent number: 11595610
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 28, 2023
    Assignee: Sony Group Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20220303489
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: June 7, 2022
    Publication date: September 22, 2022
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 11394914
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: July 19, 2022
    Assignee: Sony Group Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20210218916
    Abstract: A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.
    Type: Application
    Filed: March 31, 2021
    Publication date: July 15, 2021
    Inventor: Atsuhiko Yamamoto
  • Patent number: 11019296
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: May 25, 2021
    Assignee: Sony Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 10992890
    Abstract: A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: April 27, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsuhiko Yamamoto
  • Patent number: 10715755
    Abstract: To prevent a decrease in yield due to a break in a signal line that transmits an image signal, while preventing a decrease in image quality. A solid-state image sensor includes a photoelectric conversion unit, a plurality of image signal lines, and output control units. In the solid-state image sensor, the photoelectric conversion unit generates an image signal that is a signal corresponding to incident light. In addition, the plurality of image signal lines transmit the image signal. Furthermore, the output control units are connected to the respective plurality of image signal lines and output the generated image signal to the respective plurality of image signal lines.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: July 14, 2020
    Assignee: SONY CORPORATION
    Inventor: Atsuhiko Yamamoto
  • Publication number: 20200177832
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 10586818
    Abstract: A solid-state imaging device includes a plurality of photoelectric conversion units, a floating diffusion unit that is shared by the plurality of photoelectric conversion units and converts electric charge generated in each of the plurality of photoelectric conversion units into a voltage signal, a plurality of transfer units that are respectively provided in the plurality of photoelectric conversion units and transfer the electric charge generated in the plurality of photoelectric conversion units to the floating diffusion unit, a first transistor group that is electrically connected to the floating diffusion unit and includes a gate and source/drain which are arranged with a first layout configuration, and a second transistor group that is electrically connected to the floating diffusion unit, includes a gate and source/drain arranged with a second layout configuration symmetrical to the first layout configuration, and is provided in a separate area from the first transistor group.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 10, 2020
    Assignee: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Atsuhiko Yamamoto
  • Publication number: 20200035737
    Abstract: An imaging device includes a first chip (72). The first chip includes first and second pixels including respective first and second photoelectric conversion regions (PD) that convert incident light into electric charge. The first chip includes a first connection region for bonding the first chip to a second chip (73) and including a first connection portion (702, 702d) overlapped with the first photoelectric conversion region in a plan view, and a second connection portion overlapped with the second photoelectric conversion region in the plan view. The first photoelectric region receives incident light of a first wavelength, and the second photoelectric conversion region receives incident light of a second wavelength that is greater than the first wavelength. The first connection portion overlaps an area of the first photoelectric conversion region that is larger than an area of the second photoelectric conversion region overlapped by the second connection portion.
    Type: Application
    Filed: February 9, 2018
    Publication date: January 30, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomomi ITO, Atsuhiko YAMAMOTO, Atsushi MASAGAKI
  • Publication number: 20200029056
    Abstract: A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 23, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Atsuhiko Yamamoto
  • Patent number: 10504953
    Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: December 10, 2019
    Assignee: Sony Corporation
    Inventors: Takeshi Yanagita, Itaru Oshiyama, Takayuki Enomoto, Harumi Ikeda, Shinichiro Izawa, Atsuhiko Yamamoto, Kazunobu Ota
  • Publication number: 20190342514
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: July 19, 2019
    Publication date: November 7, 2019
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 10462430
    Abstract: A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: October 29, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsuhiko Yamamoto
  • Patent number: 10418404
    Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: September 17, 2019
    Assignee: Sony Corporation
    Inventors: Takeshi Yanagita, Itaru Oshiyama, Takayuki Enomoto, Harumi Ikeda, Shinichiro Izawa, Atsuhiko Yamamoto, Kazunobu Ota