Patents by Inventor Atsuhiko Yamamoto

Atsuhiko Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9666617
    Abstract: An imaging device includes: a photodiode configured to perform photoelectric conversion and to generate electric charge in accordance with an amount of received light; a floating diffusion section configured to accumulate the electric charge generated in the photodiode; a reading circuit configured to output a pixel signal having a voltage in accordance with a level of the electric charge accumulated in the floating diffusion section, the reading circuit including one or a plurality of transistors each having a gate that is electrically connected to a wiring used for selecting a pixel; and an insulating section extending into part or whole of a bottom surface of the floating diffusion section, part or whole of bottom surfaces of source-drain regions in the one or the plurality of transistors, or both. The photodiode, the floating diffusion section, the reading circuit, and the insulating section are provided in a semiconductor layer.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 30, 2017
    Assignee: Sony Corporation
    Inventors: Harumi Ikeda, Atsuhiko Yamamoto, Yoshiki Ebiko, Takeshi Yanagita
  • Patent number: 9647026
    Abstract: A solid-state image pickup device, including: a plurality of pixels; a separation structure provided along a boundary line adjacent to the plurality of pixels; the separation structure includes a groove provided from a back surface of the semiconductor substrate to a depth corresponding to a wavelength, the groove being positioned along the boundary line, a first separation layer provided in the groove, and a second separation layer provided above the first separation layer and corresponding to the boundary line, the second separation layer being connected to the first separation layer; and methods including the same.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: May 9, 2017
    Assignee: Sony Corporation
    Inventors: Yoshiki Ebiko, Atsuhiko Yamamoto, Yasushi Tateshita, Hiromi Okazaki
  • Patent number: 9620545
    Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: April 11, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
  • Publication number: 20170085822
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: December 1, 2016
    Publication date: March 23, 2017
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 9595557
    Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: March 14, 2017
    Assignee: Sony Corporation
    Inventors: Takeshi Yanagita, Itaru Oshiyama, Takayuki Enomoto, Harumi Ikeda, Shinichiro Izawa, Atsuhiko Yamamoto, Kazunobu Ota
  • Publication number: 20170025455
    Abstract: An imaging device includes: a photodiode configured to perform photoelectric conversion and to generate electric charge in accordance with an amount of received light; a floating diffusion section configured to accumulate the electric charge generated in the photodiode; a reading circuit configured to output a pixel signal having a voltage in accordance with a level of the electric charge accumulated in the floating diffusion section, the reading circuit including one or a plurality of transistors each having a gate that is electrically connected to a wiring used for selecting a pixel; and an insulating section extending into part or whole of a bottom surface of the floating diffusion section, part or whole of bottom surfaces of source-drain regions in the one or the plurality of transistors, or both. The photodiode, the floating diffusion section, the reading circuit, and the insulating section are provided in a semiconductor layer.
    Type: Application
    Filed: September 30, 2016
    Publication date: January 26, 2017
    Inventors: Harumi Ikeda, Atsuhiko Yamamoto, Yoshiki Ebiko, Takeshi Yanagita
  • Publication number: 20170018585
    Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 19, 2017
    Inventors: Yusuke Uesaka, Atsuhiko Yamamoto
  • Publication number: 20160372504
    Abstract: A solid-state imaging device includes a plurality of photoelectric conversion units, a floating diffusion unit that is shared by the plurality of photoelectric conversion units and converts electric charge generated in each of the plurality of photoelectric conversion units into a voltage signal, a plurality of transfer units that are respectively provided in the plurality of photoelectric conversion units and transfer the electric charge generated in the plurality of photoelectric conversion units to the floating diffusion unit, a first transistor group that is electrically connected to the floating diffusion unit and includes a gate and source/drain which are arranged with a first layout configuration, and a second transistor group that is electrically connected to the floating diffusion unit, includes a gate and source/drain arranged with a second layout configuration symmetrical to the first layout configuration, and is provided in a separate area from the first transistor group.
    Type: Application
    Filed: September 6, 2016
    Publication date: December 22, 2016
    Inventors: Nanako Kato, Toshifurni Wakano, Atsuhiko Yamamoto
  • Patent number: 9521350
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: December 13, 2016
    Assignee: Sony Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 9502450
    Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate 12 and multiple photoelectric converters 40 that are formed on the substrate 12, an insulating film 21 forms an embedded element separating unit 19. The element separating unit 19 is configured of an insulating film 20 having a fixed charge that is formed so as to coat the inner wall face of a groove portion 30, within the groove portion 30 which is formed in the depth direction from the light input side of the substrate 12.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: November 22, 2016
    Assignee: Sony Corporation
    Inventors: Takeshi Yanagita, Itaru Oshiyama, Takayuki Enomoto, Harumi Ikeda, Shinichiro Izawa, Atsuhiko Yamamoto, Kazunobu Ota
  • Publication number: 20160336372
    Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.
    Type: Application
    Filed: July 28, 2016
    Publication date: November 17, 2016
    Inventors: Takeshi YANAGITA, Itaru OSHIYAMA, Takayuki ENOMOTO, Harumi IKEDA, Shinichiro IZAWA, Atsuhiko YAMAMOTO, Kazunobu OTA
  • Patent number: 9478569
    Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: October 25, 2016
    Assignee: Sony Corporation
    Inventors: Yusuke Uesaka, Atsuhiko Yamamoto
  • Patent number: 9472592
    Abstract: An imaging device includes: a photodiode configured to perform photoelectric conversion and to generate electric charge in accordance with an amount of received light; a floating diffusion section configured to accumulate the electric charge generated in the photodiode; a reading circuit configured to output a pixel signal having a voltage in accordance with a level of the electric charge accumulated in the floating diffusion section, the reading circuit including one or a plurality of transistors each having a gate that is electrically connected to a wiring used for selecting a pixel; and an insulating section extending into part or whole of a bottom surface of the floating diffusion section, part or whole of bottom surfaces of source-drain regions in the one or the plurality of transistors, or both. The photodiode, the floating diffusion section, the reading circuit, and the insulating section are provided in a semiconductor layer.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: October 18, 2016
    Assignee: Sony Corporation
    Inventors: Harumi Ikeda, Atsuhiko Yamamoto, Yoshiki Ebiko, Takeshi Yanagita
  • Publication number: 20160211288
    Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate 12 and multiple photoelectric converters 40 that are formed on the substrate 12, an insulating film 21 forms an embedded element separating unit 19. The element separating unit 19 is configured of an insulating film 20 having a fixed charge that is formed so as to coat the inner wall face of a groove portion 30, within the groove portion 30 which is formed in the depth direction from the light input side of the substrate 12.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Inventors: Takeshi YANAGITA, Itaru OSHIYAMA, Takayuki ENOMOTO, Harumi IKEDA, Shinichiro IZAWA, Atsuhiko YAMAMOTO, Kazunobu OTA
  • Publication number: 20160112664
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: December 29, 2015
    Publication date: April 21, 2016
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 9270915
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: February 23, 2016
    Assignee: Sony Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20150319392
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: July 10, 2015
    Publication date: November 5, 2015
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 9111834
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: August 18, 2015
    Assignee: Sony Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 9111835
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: August 18, 2015
    Assignee: Sony Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20150116566
    Abstract: A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.
    Type: Application
    Filed: October 24, 2014
    Publication date: April 30, 2015
    Inventor: Atsuhiko Yamamoto