Patents by Inventor Atsuhiko Yamamoto
Atsuhiko Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150035029Abstract: An imaging device includes: a photodiode configured to perform photoelectric conversion and to generate electric charge in accordance with an amount of received light; a floating diffusion section configured to accumulate the electric charge generated in the photodiode; a reading circuit configured to output a pixel signal having a voltage in accordance with a level of the electric charge accumulated in the floating diffusion section, the reading circuit including one or a plurality of transistors each having a gate that is electrically connected to a wiring used for selecting a pixel; and an insulating section extending into part or whole of a bottom surface of the floating diffusion section, part or whole of bottom surfaces of source-drain regions in the one or the plurality of transistors, or both. The photodiode, the floating diffusion section, the reading circuit, and the insulating section are provided in a semiconductor layer.Type: ApplicationFiled: July 23, 2014Publication date: February 5, 2015Inventors: Harumi Ikeda, Atsuhiko Yamamoto, Yoshiki Ebiko, Takeshi Yanagita
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Publication number: 20140231948Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: ApplicationFiled: April 23, 2014Publication date: August 21, 2014Applicant: Sony CorporationInventors: Keiji TATANI, Hideshi ABE, Masanori OHASHI, Atsushi MASAGAKI, Atsuhiko YAMAMOTO, Masakazu FURUKAWA
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Patent number: 8809921Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.Type: GrantFiled: December 22, 2010Date of Patent: August 19, 2014Assignee: Sony CorporationInventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
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Publication number: 20140211053Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.Type: ApplicationFiled: April 1, 2014Publication date: July 31, 2014Applicant: SONY CORPORATIONInventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
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Publication number: 20140204255Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.Type: ApplicationFiled: March 19, 2014Publication date: July 24, 2014Applicant: SONY CORPORATIONInventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
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Patent number: 8741681Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: GrantFiled: October 13, 2010Date of Patent: June 3, 2014Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
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Patent number: 8723999Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.Type: GrantFiled: January 6, 2011Date of Patent: May 13, 2014Assignee: Sony CorporationInventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
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Publication number: 20140054662Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate 12 and multiple photoelectric converters 40 that are formed on the substrate 12, an insulating film 21 forms an embedded element separating unit 19. The element separating unit 19 is configured of an insulating film 20 having a fixed charge that is formed so as to coat the inner wall face of a groove portion 30, within the groove portion 30 which is formed in the depth direction from the light input side of the substrate 12.Type: ApplicationFiled: February 23, 2012Publication date: February 27, 2014Applicant: SONY CORPORATIONInventors: Takeshi Yanagita, Itaru Oshiyama, Takayuki Enomoto, Harumi Ikeda, Shinichiro Izawa, Atsuhiko Yamamoto, Kazunobu Ota
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Patent number: 8652864Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: GrantFiled: October 13, 2010Date of Patent: February 18, 2014Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
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Publication number: 20130049082Abstract: A solid-state imaging device includes a plurality of photoelectric conversion units, a floating diffusion unit that is shared by the plurality of photoelectric conversion units and converts electric charge generated in each of the plurality of photoelectric conversion units into a voltage signal, a plurality of transfer units that are respectively provided in the plurality of photoelectric conversion units and transfer the electric charge generated in the plurality of photoelectric conversion units to the floating diffusion unit, a first transistor group that is electrically connected to the floating diffusion unit and includes a gate and source/drain which are arranged with a first layout configuration, and a second transistor group that is electrically connected to the floating diffusion unit, includes a gate and source/drain arranged with a second layout configuration symmetrical to the first layout configuration, and is provided in a separate area from the first transistor group.Type: ApplicationFiled: August 17, 2012Publication date: February 28, 2013Applicant: Sony CorporationInventors: Nanako Kato, Toshifumi Wakano, Atsuhiko Yamamoto
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Publication number: 20110181747Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.Type: ApplicationFiled: January 6, 2011Publication date: July 28, 2011Applicant: Sony CorporationInventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
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Publication number: 20110180860Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.Type: ApplicationFiled: December 22, 2010Publication date: July 28, 2011Applicant: Sony CorporationInventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
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Patent number: 7943962Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: GrantFiled: December 2, 2009Date of Patent: May 17, 2011Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
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Patent number: 7898000Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: GrantFiled: March 31, 2008Date of Patent: March 1, 2011Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
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Publication number: 20110033968Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: ApplicationFiled: October 13, 2010Publication date: February 10, 2011Applicant: SONY CORPORATIONInventors: Keiji TATANI, Hideshi ABE, Masanori OHASHI, Atsushi MASAGAKI, Atsuhiko YAMAMOTO, Masakazu FURUKAWA
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Publication number: 20110027932Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: ApplicationFiled: October 13, 2010Publication date: February 3, 2011Applicant: SONY CORPORATIONInventors: Keiji TATANI, Hideshi ABE, Masanori OHASHI, Atsushi MASAGAKI, Atsuhiko YAMAMOTO, Masakazu FURUKAWA
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Publication number: 20100075454Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: ApplicationFiled: December 2, 2009Publication date: March 25, 2010Applicant: Sony CorporationInventors: Keiji TATANI, Hideshi ABE, Masanori OHASHI, Atsushi MASAGAKI, Atsuhiko YAMAMOTO, Masakazu FURUKAWA
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Publication number: 20090085142Abstract: A solid-state imaging device includes a plurality of pixels two-dimensionally arrayed in a well region disposed on a semiconductor substrate, each pixel including a photoelectric conversion section having a charge accumulation region which accumulates signal charge; an element isolation layer which is disposed on the surface of the well region along the peripheries of the individual charge accumulation regions and which electrically isolates the individual pixels from each other; and a diffusion layer which is disposed beneath the element isolation layer and which electrically isolates the individual pixels from each other, the diffusion layer having a smaller width than that of the element isolation layer. Each charge accumulation region is disposed so as to extend below the element isolation layer and be in contact with or in close proximity to the diffusion layer.Type: ApplicationFiled: December 15, 2008Publication date: April 2, 2009Applicant: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
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Patent number: 7465598Abstract: A solid-state imaging device includes a plurality of pixels two-dimensionally arrayed in a well region disposed on a semiconductor substrate, each pixel including a photoelectric conversion section having a charge accumulation region which accumulates signal charge; an element isolation layer which is disposed on the surface of the well region along the peripheries of the individual charge accumulation regions and which electrically isolates the individual pixels from each other; and a diffusion layer which is disposed beneath the element isolation layer and which electrically isolates the individual pixels from each other, the diffusion layer having a smaller width than that of the element isolation layer. Each charge accumulation region is disposed so as to extend below the element isolation layer and be in contact with or in close proximity to the diffusion layer.Type: GrantFiled: August 10, 2007Date of Patent: December 16, 2008Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa
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Patent number: 7420234Abstract: A solid-state imaging device includes a plurality of pixels two-dimensionally arrayed in a well region disposed on a semiconductor substrate, each pixel including a photoelectric conversion section having a charge accumulation region which accumulates signal charge; an element isolation layer which is disposed on the surface of the well region along the peripheries of the individual charge accumulation regions and which electrically isolates the individual pixels from each other; and a diffusion layer which is disposed beneath the element isolation layer and which electrically isolates the individual pixels from each other, the diffusion layer having a smaller width than that of the element isolation layer. Each charge accumulation region is disposed so as to extend below the element isolation layer and be in contact with or in close proximity to the diffusion layer.Type: GrantFiled: December 23, 2005Date of Patent: September 2, 2008Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa