Patents by Inventor Atsushi Hirose
Atsushi Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250090959Abstract: A seat system includes a seat including a sensor configured to acquire information for detection of a motion of an occupant seated on a seat body, a terminal device configured to acquire the information from the sensor, and a server capable of communicating with the terminal device. The terminal device executes a game using the sensor based on the information, and acquires an execution result corresponding to the occupant for a game played by the occupant. The server generates integrated data by integrating execution results of the game acquired from another terminal device, and computes a reference value for execution results of the game based on the integrated data. The terminal device or the server assigns a difficulty level of the game for the terminal device based on the execution result corresponding to the occupant and the reference value. The terminal device reflects the difficulty level on the game.Type: ApplicationFiled: November 25, 2024Publication date: March 20, 2025Inventors: Hiroyuki KAKU, Hiroyuki NUMAJIRI, Takako MIYOSHI, Munetaka KOWA, Atsushi KUSANO, Ryuichiro HIROSE, Yoshikazu ITO, Yosuke HIGASHI, Satoshi SUZUKI, Ryosuke SATO, Satoru KANEDA
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Patent number: 12199104Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: March 19, 2021Date of Patent: January 14, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20240413166Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: ApplicationFiled: August 15, 2024Publication date: December 12, 2024Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
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Publication number: 20240077773Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: ApplicationFiled: September 8, 2023Publication date: March 7, 2024Inventor: Atsushi HIROSE
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Patent number: 11754896Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: GrantFiled: November 19, 2021Date of Patent: September 12, 2023Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi Hirose
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Publication number: 20220075235Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: ApplicationFiled: November 19, 2021Publication date: March 10, 2022Inventor: Atsushi HIROSE
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Patent number: 11181793Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: GrantFiled: February 13, 2020Date of Patent: November 23, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Atsushi Hirose
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Publication number: 20210210519Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: ApplicationFiled: March 19, 2021Publication date: July 8, 2021Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
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Patent number: 10957714Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: June 10, 2019Date of Patent: March 23, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20200183241Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: ApplicationFiled: February 13, 2020Publication date: June 11, 2020Inventor: Atsushi HIROSE
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Patent number: 10564499Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: GrantFiled: January 31, 2018Date of Patent: February 18, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Atsushi Hirose
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Publication number: 20190312063Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: ApplicationFiled: June 10, 2019Publication date: October 10, 2019Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
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Patent number: 10424671Abstract: A novel semiconductor device or memory device is provided. Alternatively, a semiconductor device or memory device in which storage capacity per unit area is large is provided. The semiconductor device includes a sense amplifier provided to a semiconductor substrate and a memory cell provided over the sense amplifier. The sense amplifier includes a first transistor. The memory cell includes a capacitor over the semiconductor substrate, a second transistor provided over the capacitor, a conductor, and a groove portion. The capacitor includes a first electrode and a second electrode. The first electrode is formed along the groove portion. The second electrode has a region facing the first electrode in the groove portion. The second transistor includes an oxide semiconductor. One of a source and a drain of the second transistor is electrically connected to the second electrode through the conductor.Type: GrantFiled: July 27, 2016Date of Patent: September 24, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kiyoshi Kato, Hidekazu Miyairi, Akihisa Shimomura, Atsushi Hirose
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Patent number: 10319744Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: September 18, 2018Date of Patent: June 11, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20190035819Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: ApplicationFiled: September 18, 2018Publication date: January 31, 2019Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
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Patent number: 10115743Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: July 18, 2017Date of Patent: October 30, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20180149940Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: ApplicationFiled: January 31, 2018Publication date: May 31, 2018Inventor: Atsushi HIROSE
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Patent number: 9885932Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: GrantFiled: May 3, 2017Date of Patent: February 6, 2018Assignee: Semiconductor Energy Laboratory Co., LTD.Inventor: Atsushi Hirose
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Patent number: D853919Type: GrantFiled: April 24, 2018Date of Patent: July 16, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Saburo Hazumi, Atsushi Hirose, Ben Uk Chang
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Patent number: D955314Type: GrantFiled: June 18, 2020Date of Patent: June 21, 2022Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi Hirose, Yoshito Watanabe