Patents by Inventor Atsushi Hirose

Atsushi Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12139406
    Abstract: The present invention provides a method for producing a substance with a modified carbon allotrope surface that can suppress or prevent uneven distribution, uneven orientation, and the like of a structural analysis target substance in a structural analysis by cryo-electron microscopy. A method for producing a substance with a modified carbon allotrope surface of the present invention includes: the step of surface-treating by reacting a carbon allotrope surface with a halogen oxide radical, wherein the carbon allotrope surface is modified by the surface-treating.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: November 12, 2024
    Assignee: Osaka University
    Inventors: Tsuyoshi Inoue, Haruyasu Asahara, Kei Ohkubo, Kenji Iwasaki, Naoyuki Miyazaki, Mika Hirose, Atsushi Nakagawa, Junichi Takagi, Takefumi Doi, Hiroaki Adachi
  • Publication number: 20240367556
    Abstract: To provide a sensor unit that can be easily attached to and detached from a seat in which a seated occupant is seated, and a seat equipped with a sensor unit. A sensor unit includes a sensor module including a biological sensor that detects a biological signal of a seated occupant, and a wireless communication unit that is connected to the biological sensor to wirelessly transmit the detected biological signal to an outside; and a sensor holder that holds the sensor module. The sensor holder includes a seat attachment portion detachably attached to an attached portion that is provided in a front surface of a seat cushion at a position at which the seated occupant is abuttable against the attached portion.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Hiroyuki KAKU, Ryuichiro HIROSE, Atsushi KUSANO, Munetaka KOWA
  • Patent number: 12136663
    Abstract: A semiconductor device with little variation in transistor characteristics is provided. First to third oxide films, a first conductive film, a first insulating film, and a second conductive film are sequentially formed. Shaping them into island-like shapes. An insulator is formed over the island-like shapes and an opening is formed in the insulator and a part of the island-like shapes. Another oxide film, a gate insulating film, and a gate electrode are formed in the opening in this order to form the transistor.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: November 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsuya Kakehata, Yuichi Sato, Atsushi Shibazaki, Kazuki Tanemura, Takashi Hirose
  • Publication number: 20240359597
    Abstract: Increased versatility of a seat with a sensor provided therein is sought for. Disclosed is an in-seat experience system (SYS) including: a seat which includes a seat body (S0), a sensor (pressure sensor PS) provided in the seat body (S0), and a seat controller (100) connected to the sensor and thereby allowed to acquire a measurement value from the sensor; an experience instruction device (smartphone SP) connected to the seat controller (100), configured to notify an occupant seated on the seat body a motion instruction and to store user identification information for use in identifying the occupant; and a server (300) capable of communicating with the experience instruction device.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Inventors: Hiroyuki KAKU, Satoru KANEDA, Munetaka KOWA, Hiroyuki NUMAJIRI, Satoshi FUJITA, Takako MIYOSHI, Atsushi KUSANO, Ryuichiro HIROSE, Yoshikazu ITO, Yousuke HIGASHI, Satoshi SUZUKI, Ryosuke SATO, Kento UETAKE
  • Publication number: 20240365663
    Abstract: A blue luminescent compound including a nitrogen-containing aromatic heterocyclic skeleton and at least two aromatic substituents bonded to the nitrogen-containing aromatic heterocyclic skeleton, wherein the nitrogen-containing aromatic heterocyclic skeleton includes, as substituents, four branched or cyclic alkyl groups each having 3 to 20 carbon atoms, and the nitrogen-containing aromatic heterocyclic skeleton and the at least two aromatic substituents are not located on a same plane.
    Type: Application
    Filed: April 17, 2024
    Publication date: October 31, 2024
    Inventors: Tomoya Hirose, Eigo Miyazaki, Atsushi Imamura, Mitsunori Ito
  • Publication number: 20240339306
    Abstract: A substrate processing apparatus is provided. The substrate processing apparatus comprise: a first chamber including a sidewall providing an opening, the first chamber further including a movable part movable upward and downward within the first chamber; a substrate support disposed within the first chamber; a second chamber disposed within the first chamber and defining, together with the substrate support, a processing space in which a substrate mounted on the substrate support is processed, the second chamber being separable from the first chamber and transportable between an inner space of the first chamber and the outside of the first chamber via the opening; a clamp releasably fixing the second chamber to the movable part extending above the second chamber; a release mechanism configured to release the fixing of the second chamber by the clamp; and a lift mechanism configured to move the movable part upward and downward.
    Type: Application
    Filed: June 18, 2024
    Publication date: October 10, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Atsushi SAWACHI, Jun HIROSE, Takuya NISHIJIMA, Ichiro SONE, Suguru SATO
  • Publication number: 20240309006
    Abstract: A compound of the formula (I): wherein each symbol is as defined in the DESCRIPTION. or a pharmaceutically acceptable salt thereof has a superior Notch signal transduction inhibitory action, and is useful for preventing or treating various diseases involving Notch signal transduction.
    Type: Application
    Filed: January 19, 2022
    Publication date: September 19, 2024
    Applicant: PRISM Biolab Co., Ltd.
    Inventors: Hiroyuki KOUJI, Takenao ODAGAMI, Yoichiro HIROSE, Takashi TAKAHASHI, Hisashi MASUI, Atsushi YOSHIMORI, Hajime TAKASHIMA, Jun OZAWA, Eiji HONDA
  • Patent number: 12071043
    Abstract: To provide a sensor unit that can be easily attached to and detached from a seat in which a seated occupant is seated, and a seat equipped with a sensor unit. A sensor unit includes a sensor module including a biological sensor that detects a biological signal of a seated occupant, and a wireless communication unit that is connected to the biological sensor to wirelessly transmit the detected biological signal to an outside; and a sensor holder that holds the sensor module. The sensor holder includes a seat attachment portion detachably attached to an attached portion that is provided in a front surface of a seat cushion at a position at which the seated occupant is abuttable against the attached portion.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: August 27, 2024
    Assignee: TS TECH CO., LTD.
    Inventors: Hiroyuki Kaku, Ryuichiro Hirose, Atsushi Kusano, Munetaka Kowa
  • Patent number: 12059976
    Abstract: An in-seat experience system includes: a seat which includes a seat body, a sensor, and a seat controller allowed to acquire a measurement value from the sensor; an experience instruction device connected to the seat controller, configured to notify an occupant seated on the seat body a motion instruction and to store user identification information; and a server capable of communicating with the experience instruction device. The experience instruction device makes a determination based upon a measurement value of the sensor as to whether or not a first condition is satisfied, and to transmit a result of the determination to the server when at least the first condition is satisfied, and the server is allowed to increase a point score stored for the corresponding user identification information with a condition that the result of the determination that the first condition is satisfied is received from the experience instruction device.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: August 13, 2024
    Assignee: TS TECH CO., LTD.
    Inventors: Hiroyuki Kaku, Satoru Kaneda, Munetaka Kowa, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Atsushi Kusano, Ryuichiro Hirose, Yoshikazu Ito, Yousuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake
  • Publication number: 20240242976
    Abstract: A gas supply device capable of saving space and supplying a mixed gas having components with stable concentration to a processing chamber in a short time includes: a plurality of fluid control units each including a flow path through which gas flows, and fluid control devices provided in the middle of the flow path; a merging flow path including a plurality of connecting portions fluidly connected to the plurality of fluid control units and a single gas outlet portion which derives the gas introduced through the plurality of connecting portions; wherein a plurality of connecting portions is arranged symmetrically with respect to the gas outlet portion in the flow path direction of the merging flow path, and two or more fluid control units are fluidly connected to each of the plurality of connecting portions.
    Type: Application
    Filed: March 4, 2022
    Publication date: July 18, 2024
    Applicants: Tokyo Electron Limited, FUJIKIN INCORPORATED
    Inventors: Jun HIROSE, Atsushi SAWACHI, Takahiro MATSUDA, Kazunari WATANABE, Kohei SHIGYOU, Taiki HOSHIKO
  • Patent number: 12040166
    Abstract: A substrate processing apparatus is provided. The substrate processing apparatus comprise: a first chamber including a sidewall providing an opening, the first chamber further including a movable part movable upward and downward within the first chamber; a substrate support disposed within the first chamber; a second chamber disposed within the first chamber and defining, together with the substrate support, a processing space in which a substrate mounted on the substrate support is processed, the second chamber being separable from the first chamber and transportable between an inner space of the first chamber and the outside of the first chamber via the opening; a clamp releasably fixing the second chamber to the movable part extending above the second chamber; a release mechanism configured to release the fixing of the second chamber by the clamp; and a lift mechanism configured to move the movable part upward and downward.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: July 16, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Atsushi Sawachi, Jun Hirose, Takuya Nishijima, Ichiro Sone, Suguru Sato
  • Publication number: 20240077773
    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 7, 2024
    Inventor: Atsushi HIROSE
  • Patent number: 11754896
    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: September 12, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Atsushi Hirose
  • Publication number: 20220075235
    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Inventor: Atsushi HIROSE
  • Patent number: 11181793
    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: November 23, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Hirose
  • Publication number: 20210210519
    Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
    Type: Application
    Filed: March 19, 2021
    Publication date: July 8, 2021
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
  • Patent number: 10957714
    Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: March 23, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
  • Publication number: 20200183241
    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Inventor: Atsushi HIROSE
  • Patent number: 10564499
    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: February 18, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Hirose
  • Patent number: D955314
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: June 21, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Atsushi Hirose, Yoshito Watanabe