Patents by Inventor Atsushi Hirose
Atsushi Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8350621Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: August 7, 2012Date of Patent: January 8, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20120299003Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: ApplicationFiled: August 7, 2012Publication date: November 29, 2012Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
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Publication number: 20120299074Abstract: A semiconductor device in which light leakage due to misalignment is prevented even when a black matrix layer is not expanded to a designed value or more is provided. In a semiconductor device including a dual-gate thin film transistor in which a semiconductor layer is sandwiched between a bottom gate electrode and a top gate electrode, the top gate electrode is formed of a first black matrix layer, and the top gate electrode overlaps with the semiconductor layer.Type: ApplicationFiled: May 22, 2012Publication date: November 29, 2012Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Atsushi HIROSE, Hidekazu MIYAIRI, Yoshitaka YAMAMOTO, Tomohiro KIMURA
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Publication number: 20120299006Abstract: An object is to prevent light leakage caused due to misregistration even when the width of a black matrix layer is not expanded to a designed value or larger. One embodiment of the present invention is a semiconductor device including a single-gate thin film transistor in which a first semiconductor layer is sandwiched between a bottom-gate electrode and a first black matrix layer. The first semiconductor layer and the first black matrix layer overlap with each other.Type: ApplicationFiled: May 22, 2012Publication date: November 29, 2012Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hidekazu MIYAIRI, Atsushi HIROSE, Yoshitaka YAMAMOTO, Tomohiro KIMURA
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Publication number: 20120286143Abstract: In a semiconductor device, power consumption is reduced. Further, a standby circuit is formed of a few elements, and thus increase in the circuit area of the semiconductor device is prevented. The standby circuit provided in the semiconductor device is formed of only one transistor and voltage supplied to the transistor is switched, whereby output current of the semiconductor device is controlled. As a result, the output current of the semiconductor device in a standby state can be substantially zero, so that the power consumption can be reduced. By using an oxide semiconductor for a semiconductor layer of a transistor, leakage current can be suppressed as low as possible.Type: ApplicationFiled: April 24, 2012Publication date: November 15, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi HIROSE
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Patent number: 8263926Abstract: It is an object to provide a photoelectric conversion device which detects light ranging from weak light to strong light. The present invention relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer, an amplifier circuit including a thin film transistor and a bias switching means, where a bias which is connected to the photodiode and the amplifier circuit is switched by the bias switching means when intensity of incident light exceeds predetermined intensity, and accordingly, light which is less than the predetermined intensity is detected by the photodiode and light which is more than the predetermined intensity is detected by the thin film transistor of the amplifier circuit. By the present invention, light ranging from weak light to strong light can be detected.Type: GrantFiled: April 1, 2010Date of Patent: September 11, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tatsuya Arao, Atsushi Hirose, Kazuo Nishi, Yuusuke Sugawara
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Patent number: 8242837Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: October 19, 2010Date of Patent: August 14, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20120154346Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.Type: ApplicationFiled: December 7, 2011Publication date: June 21, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi HIROSE
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Publication number: 20120145887Abstract: An output terminal of a photoelectric conversion element included in the photoelectric conversion device is connected to a drain terminal and a gate terminal of a MOS transistor which is diode-connected, and a voltage Vout generated at the gate terminal of the MOS transistor is detected in accordance with a current Ip which is generated at the photoelectric conversion element. The voltage Vout generated at the gate terminal of the MOS transistor can be directly detected, so that the range of output can be widened than a method in which an output voltage is converted into a current by connecting a load resistor, and so on.Type: ApplicationFiled: February 22, 2012Publication date: June 14, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Makoto YANAGISAWA, Atsushi HIROSE
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Publication number: 20120132965Abstract: A plurality of transistors in which ratios of a channel length L to a channel width W, ?=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of ? can be driven in a linear range with low illuminance, and a transistor with small amount of ? can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.Type: ApplicationFiled: February 3, 2012Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideaki Shishido, Atsushi Hirose
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Publication number: 20120104238Abstract: To provide a photoelectric conversion device with low power consumption and a method for operating the photoelectric conversion device. The photoelectric conversion device includes a charge storage capacitor portion, a photodiode, and a plurality of transistors. The charge storage capacitor portion is charged after being reset. Then, the charge storage capacitor portion is discharged through the photodiode or a current mirror circuit connected to the photodiode for a given period of time, and after that, the potential of the charge storage capacitor portion is read. Since power is consumed only at the time of charging, power consumption can be reduced.Type: ApplicationFiled: October 20, 2011Publication date: May 3, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi HIROSE
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Publication number: 20120085892Abstract: In a photoelectric conversion device including a photodiode and a current mirror circuit, a diode-connected transistor is provided in parallel with the photodiode. The transistor serves as a leakage path for rapidly discharging charge stored in the gate capacitance in the current mirror circuit. Thus, the response speed of the photoelectric conversion device is increased, and output of an abnormal value is reduced.Type: ApplicationFiled: October 4, 2011Publication date: April 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi HIROSE
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Patent number: 8154480Abstract: A plurality of transistors in which ratios of a channel length L to a channel width W, ?=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of ? can be driven in a linear range with low illuminance, and a transistor with small amount of ? can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.Type: GrantFiled: July 21, 2008Date of Patent: April 10, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Shishido, Atsushi Hirose
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Patent number: 8124924Abstract: An output terminal of a photoelectric conversion element included in the photoelectric conversion device is connected to a drain terminal and a gate terminal of a MOS transistor which is diode-connected, and a voltage Vout generated at the gate terminal of the MOS transistor is detected in accordance with a current Ip which is generated at the photoelectric conversion element. The voltage Vout generated at the gate terminal of the MOS transistor can be directly detected, so that the range of output can be widened than a method in which an output voltage is converted into a current by connecting a load resistor, and so on.Type: GrantFiled: June 7, 2010Date of Patent: February 28, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Makoto Yanagisawa, Atsushi Hirose
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Patent number: 8106346Abstract: A photodetector includes a photoelectric conversion circuit that generates a first voltage by converting a first current generated in accordance with the illuminance of incident light into log-compressed voltage; a temperature compensation circuit that generates a second voltage by performing temperature compensation for the first voltage and generate a second current by converting the second voltage into current; and a digital signal generation circuit that generates a clock signal having an oscillation frequency depending on the second current, counts pulses of the clock signal for a certain period, and generates a digital signal using the count value for the certain period as data.Type: GrantFiled: August 31, 2009Date of Patent: January 31, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Atsushi Hirose, Jun Koyama
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Publication number: 20110315861Abstract: It is an object to provide a photoelectric conversion device whose power consumption and a mounting area are reduced and yield is improved and further to provide a photoelectric conversion device whose number of manufacturing processes and manufacturing cost are reduced. A photoelectric conversion device includes a photoelectric conversion element for outputting photocurrent corresponding to illuminance, and a resistor changing resistance corresponding to illuminance. In the photoelectric conversion device, one terminal of the photoelectric conversion element and one terminal of the resistor are electrically connected in series; the other terminal of the photoelectric conversion element is connected to a high power supply potential; the other terminal of the resistor is connected to a low power supply potential; and a light intensity adjusting unit is provided on a light reception surface side of the photoelectric conversion element or the resistor to adjust illuminance.Type: ApplicationFiled: June 17, 2011Publication date: December 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yukinori SHIMA, Atsushi HIROSE
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Patent number: 8053717Abstract: The photoelectric conversion device includes a photoelectric conversion circuit for outputting photocurrent generated in a photoelectric conversion element as output voltage subjected to logarithmic compression by a first diode element, a reference voltage generation circuit for outputting reference voltage subjected to logarithmic compression by a second diode element in accordance with the amount of current flowing to a resistor, an arithmetic circuit for outputting an output signal obtained by amplifying a difference between the output voltage output from the photoelectric conversion circuit and the reference voltage output from the reference voltage generation circuit, and an output circuit for outputting current corresponding to the logarithmically-compressed output voltage output from the photoelectric conversion circuit by the output signal.Type: GrantFiled: May 13, 2009Date of Patent: November 8, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Atsushi Hirose
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Patent number: 8049157Abstract: The present invention provides a photoelectric conversion device capable of detecting light from weak light to strong light and relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer; an amplifier circuit including a transistor; and a switch, where the photodiode and the amplifier circuit are electrically connected to each other by the switch when intensity of entering light is lower than predetermined intensity so that a photoelectric current is amplified by the amplifier circuit to be outputted, and the photodiode and part or all of the amplifier circuits are electrically disconnected by the switch so that a photoelectric current is reduced in an amplification factor to be outputted. According to such a photoelectric conversion device, light from weak light to strong light can be detected.Type: GrantFiled: November 18, 2010Date of Patent: November 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuo Nishi, Tatsuya Arao, Atsushi Hirose, Yuusuke Sugawara, Naoto Kusumoto, Daiki Yamada, Hidekazu Takahashi
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Patent number: D680037Type: GrantFiled: December 21, 2011Date of Patent: April 16, 2013Assignee: Toyota Jidosha Kabushiki KaishaInventors: Shuzo Akamine, Atsushi Hirose, Daisuke Iguchi, Masahiro Ookuni
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Patent number: D680038Type: GrantFiled: December 21, 2011Date of Patent: April 16, 2013Assignee: Toyota Jidosha Kabushiki KaishaInventors: Shuzo Akamine, Atsushi Hirose, Daisuke Iguchi, Masahiro Ookuni