Patents by Inventor Atsushi Igarashi

Atsushi Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110273232
    Abstract: Provided is a differential amplifier circuit in which an offset voltage is independent from input voltages. A first correction current generation circuit and a second correction current generation circuit are provided and configured to cause the same current as a current flowing through a folded cascode amplifying stage to flow into an output stage. Accordingly, transistors included in the folded cascode amplifying stage and transistors included in the output stage have the same bias condition.
    Type: Application
    Filed: April 22, 2011
    Publication date: November 10, 2011
    Inventors: Atsushi Igarashi, Masahiro Mitani
  • Patent number: 7997794
    Abstract: A temperature sensor circuit whose output voltage has high precision is provided. The temperature sensor circuit includes a Darlington circuit having bipolar transistors, a constant current circuit, and a current control circuit. Emitter currents of the bipolar transistors are made equal to one another by the constant current circuit. Base currents corresponding to the emitter currents of the respective bipolar transistors are sunk by the current control circuit.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: August 16, 2011
    Assignee: Seiko Instruments Inc.
    Inventor: Atsushi Igarashi
  • Patent number: 7977999
    Abstract: Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such a potential that the comparator detects a low temperature is provided at an output terminal of a reference voltage circuit. When the power is turned on, each of the switch circuits is set by a switch control circuit such that the comparator detects a low temperature.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: July 12, 2011
    Assignee: Seiko Instruments Inc.
    Inventors: Atsushi Igarashi, Masakazu Sugiura
  • Publication number: 20110158285
    Abstract: Provided is a temperature detection system which is low in cost. The temperature detection system includes a plurality of temperature detection ICs (10) for detecting an abnormal temperature and a resistor (20). Each of the plurality of temperature detection ICs (10) includes a reference voltage terminal connected to an output terminal of one of the plurality of temperature detection ICs (10) located at a preceding stage. The resistor (20) is provided between an output terminal of one of the plurality of temperature detection ICs (10) located at the final stage and a ground terminal.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 30, 2011
    Inventor: Atsushi Igarashi
  • Patent number: 7880528
    Abstract: A temperature detection circuit has a first temperature sensor circuit that outputs a voltage having a negative temperature gradient and an absolute value and a second temperature sensor circuit that outputs a voltage having a positive temperature gradient and the same absolute value as that for the output voltage of the first temperature sensor circuit. A switch circuit conducts a switching operation in accordance with a control signal to switch between outputting the output voltage of the first temperature sensor circuit and the output voltage of the second temperature sensor circuit. A comparison circuit compares the output voltage from the first or second temperature sensor circuit with a reference voltage. A logic circuit outputs a temperature detection signal on the basis of the control signal and an output signal from the comparison circuit.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: February 1, 2011
    Assignee: Seiko Instruments Inc.
    Inventor: Atsushi Igarashi
  • Publication number: 20100321845
    Abstract: Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 23, 2010
    Inventors: Takashi Imura, Takao Nakashimo, Masakazu Sugiura, Atsushi Igarashi, Masahiro Mitani
  • Patent number: 7795950
    Abstract: A temperature detection circuit has a temperature sensor circuit whose output voltage changes with a variation in temperature. A reference voltage circuit generates a reference voltage. A comparator has an output terminal and compares an output voltage from the temperature sensor circuit with the reference voltage to generate one of a temperature detection signal and a temperature non-detection signal, the comparator having an output terminal. An operation preventing circuit is connected with the output terminal of the comparator such that immediately after activation of a power supply to the temperature detection circuit, the comparator generates the temperature non-detection signal.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: September 14, 2010
    Assignee: Seiko Instruments Inc.
    Inventor: Atsushi Igarashi
  • Publication number: 20100180059
    Abstract: Provided is a detection circuit for monitoring a power supply voltage with a circuit configuration in which power consumption is reduced, and a sensor device including the detection circuit. A detection circuit (100) detects an input signal input thereto to output an output signal. An interrupt condition generating circuit (10a) directly detects a power supply voltage (VDD) supplied thereto from a power supply, and outputs an interrupt signal until the power supply voltage makes a transition to a predetermined voltage range. An interrupt condition reception circuit outputs, as an output signal, a given voltage without allowing an input signal (Vtemp) to be output until an interrupt caused by the interrupt signal is released, and outputs, as an output signal, the input signal by allowing the input signal to be output when the interrupt caused by the interrupt signal is released.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Inventors: Masakazu Sugiura, Atsushi Igarashi
  • Publication number: 20100176854
    Abstract: Provided is a delay circuit that has a delay time period independent of a power supply voltage and has the equal delay time period between a case of a change in input signal from Low to High and a case of a change in input signal from High to Low. The delay time period is determined as a time period necessary for a voltage of a capacitor (17) (internal voltage (Va)) to increase from a ground voltage (VSS) to a voltage equal to or higher than an inverting threshold voltage of a constant current inverter (19) (threshold voltage (Vtn) of an NMOS transistor (16)). Therefore, the delay time period is determined with reference to the ground voltage (VSS). Note that the same holds true for an internal delay circuit (20). If the input signal (Vin) becomes High, the delay circuit utilizes the delay time period caused by an internal delay circuit (10). On the other hand, if the input signal (Vin) becomes Low, the delay circuit utilizes the delay time period caused by the internal delay circuit (20).
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Inventors: Atsushi Igarashi, Masakazu Sugiura
  • Publication number: 20100176874
    Abstract: Provided is a voltage detection circuit having a small circuit scale. A P-type metal oxide semiconductor (PMOS) transistor (11) has an absolute value (Vtp) of its threshold voltage, which is equal to a minimum operating voltage. If a power supply voltage (VDD) becomes higher than the minimum operating voltage, the PMOS transistor (11) is turned ON to allow a current to flow therethrough. As a result, based on the current, an output voltage (Vout) is generated across a capacitor (15).
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Inventors: Masakazu Sugiura, Atsushi Igarashi, Nan Kawashima
  • Publication number: 20100176839
    Abstract: Provided is a power supply voltage monitoring circuit (50) including: a signal output circuit (1) for outputting a signal voltage (Vsignal) which exhibits a saturation characteristic with respect to an increase in a power supply voltage (VDD); and a signal voltage monitoring circuit (4) for comparing the power supply voltage (VDD) with the signal voltage (Vsignal), and outputting a signal (Vout) indicating that the signal voltage (Vsignal) is normal when there is a predetermined voltage difference. With this configuration, a minimum operating power supply voltage may be reduced in an electronic circuit, and the power supply voltage may be used with efficiency.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Inventors: Masakazu Sugiura, Atsushi Igarashi
  • Publication number: 20100156507
    Abstract: Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such a potential that the comparator detects a low temperature is provided at an output terminal of a reference voltage circuit. When the power is turned on, each of the switch circuits is set by a switch control circuit such that the comparator detects a low temperature.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 24, 2010
    Inventors: Atsushi Igarashi, Masakazu Sugiura
  • Publication number: 20090206912
    Abstract: Provided is a temperature detection circuit which can, even when a set range of detected temperature is enlarged, suppress a rise in a lowest operating voltage. The temperature sensor circuit has a function of adjusting a voltage level of an output voltage, thereby suppressing the output voltage of the temperature sensor circuit and a reference voltage from a reference voltage circuit at a predetermined temperature.
    Type: Application
    Filed: February 11, 2009
    Publication date: August 20, 2009
    Inventor: Atsushi Igarashi
  • Patent number: 7508258
    Abstract: Provided is a chopper amplifier circuit capable of eliminating an influence of a slew rate of an amplifier and suppressing spike generation to thereby obtain an output signal having little harmonic distortion. The chopper amplifier circuit according to the present invention includes: a first chopper circuit for chopping an input signal by a first pulse and a second pulse shifted from each other in phase by a half cycle, switching a relation of connection between an input terminal pair and an output terminal pair at a timing of the chopping, and outputting the input signal as a modulated signal; an amplifier for amplifying the modulated signal and outputting the modulated signal thus amplified as an amplified signal; a first sample hold circuit for holding the amplified signal at the first pulse and outputting the amplified signal at the second pulse; and a second sample hold circuit for holding the amplified signal at the second pulse and outputting the amplified signal at the first pulse.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: March 24, 2009
    Assignees: Seiko Instruments Inc., Gakkouhoujin Chikoujigakuen
    Inventors: Hirokazu Yoshizawa, Ryoichi Anzai, Toshiyuki Uchida, Akira Takeda, Minoru Ariyama, Atsushi Igarashi
  • Patent number: 7479826
    Abstract: Provided is a chopper amplifier circuit capable of reducing an offset voltage of a sensor bridge and temperature characteristics of the offset voltage. An offset adjusting voltage generation circuit for generating a voltage equal to an offset voltage of a sensor bridge and an offset temperature characteristics adjusting voltage generation circuit for generating a voltage having temperature characteristics equal to those of the offset voltage are provided. These output voltages are chopper-modulated and subtracted from a chopper-modulated output signal of the sensor bridge.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: January 20, 2009
    Assignees: Seiko Instruments Inc., Gakkouhoujin Chikoujigakuen
    Inventors: Hirokazu Yoshizawa, Ryoichi Anzai, Toshiyuki Uchida, Minoru Ariyama, Atsushi Igarashi, Akira Takeda
  • Publication number: 20080285624
    Abstract: A temperature sensor circuit whose output voltage has high precision is provided. The temperature sensor circuit includes a Darlington circuit having bipolar transistors, a constant current circuit, and a current control circuit. Emitter currents of the bipolar transistors are made equal to one another by the constant current circuit. Base currents corresponding to the emitter currents of the respective bipolar transistors are sunk by the current control circuit.
    Type: Application
    Filed: August 21, 2007
    Publication date: November 20, 2008
    Inventor: Atsushi Igarashi
  • Publication number: 20080198899
    Abstract: Provided is a temperature detection circuit in which an erroneous operation which may be caused at the time of activation of a power supply can be prevented. While an output voltage of a temperature sensor circuit (200) and a reference voltage of a reference voltage circuit (300) are insufficient after the activation of the power supply, an output terminal (700) and a positive power supply terminal (500) are short-circuited with each other by an erroneous operation preventing circuit (100) provided between the output terminal (700) and the positive power supply terminal (500) to prevent the erroneous operation of the temperature detection circuit.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 21, 2008
    Inventor: Atsushi Igarashi
  • Publication number: 20070222509
    Abstract: Provided is a chopper amplifier circuit capable of eliminating an influence of a slew rate of an amplifier and suppressing spike generation to thereby obtain an output signal having little harmonic distortion. The chopper amplifier circuit according to the present invention includes: a first chopper circuit for chopping an input signal by a first pulse and a second pulse shifted from each other in phase by a half cycle, switching a relation of connection between an input terminal pair and an output terminal pair at a timing of the chopping, and outputting the input signal as a modulated signal; an amplifier for amplifying the modulated signal and outputting the modulated signal thus amplified as an amplified signal; a first sample hold circuit for holding the amplified signal at the first pulse and outputting the amplified signal at the second pulse; and a second sample hold circuit for holding the amplified signal at the second pulse and outputting the amplified signal at the first pulse.
    Type: Application
    Filed: February 6, 2007
    Publication date: September 27, 2007
    Inventors: Hirokazu Yoshizawa, Ryoichi Anzai, Toshiyuki Uchida, Akira Takeda, Minoru Ariyama, Atsushi Igarashi
  • Publication number: 20070146065
    Abstract: Provided is a chopper amplifier circuit capable of reducing an offset voltage of a sensor bridge and temperature characteristics of the offset voltage. An offset adjusting voltage generation circuit for generating a voltage equal to an offset voltage of a sensor bridge and an offset temperature characteristics adjusting voltage generation circuit for generating a voltage having temperature characteristics equal to those of the offset voltage are provided. These output voltages are chopper-modulated and subtracted from a chopper-modulated output signal of the sensor bridge.
    Type: Application
    Filed: August 4, 2006
    Publication date: June 28, 2007
    Inventors: Hirokazu Yoshizawa, Ryoichi Anzai, Toshiyuki Uchida, Minoru Ariyama, Atsushi Igarashi, Akira Takeda
  • Publication number: 20060001110
    Abstract: In a lateral trench MOSFET in which a channel width is increased while an element area is not increased to attain reduction in an ON resistance, a source layer (004) and a drain layer (005) are formed in the vicinity of both ends of a trench (008) through multi-directional ion implantation. With this structure, each the source layer (004) and the drain layer (005) are formed deeper than the trench (008), electrons flow through the entire channel region, and an effective channel length becomes shorter. Further reduction of the ON resistance can be realized.
    Type: Application
    Filed: June 24, 2005
    Publication date: January 5, 2006
    Inventor: Atsushi Igarashi