Patents by Inventor Atsushi Ishida

Atsushi Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8477476
    Abstract: A ceramic electronic component includes a ceramic element including opposed side surfaces, an inner electrode, and an external terminal electrode. The external terminal electrode includes a first conductive layer and a second conductive layer. The first conductive layer is formed by plating so as to be electrically coupled to an exposed section of the internal electrode exposed to the side surfaces. The second conductive layer is arranged so as to cover the first conductive layer and includes conductive resin. The value of T2/T1 is in the range of about 3.4 to about 11.3, where T1 indicates the thickness of the first conductive layer and T2 indicates the thickness of the second conductive layer.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: July 2, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Ishida, Takumi Taniguchi, Takehisa Sasabayashi, Tomoyuki Kuwano, Akihiro Motoki, Toshiyuki Iwanaga
  • Publication number: 20130020914
    Abstract: In a laminated ceramic electronic component, a first functional portion and a second functional portion are disposed within a ceramic element body so as to be adjacent to each other along a height direction, first and second internal electrodes face each other through a ceramic layer in the first functional portion, and third and fourth internal electrodes whose number of laminated layers is different from the number of laminated layers of the first and second internal electrodes face each other through the ceramic layer in the second functional portion. A marking internal conductor is disposed on the same plane as the first internal electrode and/or the second internal electrode, a marking external conductor is disposed on the side surface of the ceramic element body so as to link a plurality of exposed marking internal conductors such that it is possible to recognize vertical directionality.
    Type: Application
    Filed: July 17, 2012
    Publication date: January 24, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Masaki TSUKIDA, Atsushi ISHIDA
  • Publication number: 20120186309
    Abstract: The locking device is for arrangement in the connector receptacle, which is connected to the charging connector that charges a battery, to interlock the connector receptacle and the charging connector. The locking device includes a notch engageable with a hook arranged in the charging connector. A lock bar is movable between a lock position, at which the lock bar restricts movement of the hook and keeps the hook and lock bar engaged, and an unlock position, at which the lock bar moves away from the hook and permits movement of the hook. A drive unit generates drive force for moving the lock bar from the unlock position to the lock position.
    Type: Application
    Filed: September 29, 2010
    Publication date: July 26, 2012
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHO
    Inventors: Atsushi Ishida, Masanari Okuno, Shinji Ichikawa
  • Patent number: 8125765
    Abstract: In a laminated ceramic electronic component including a ceramic element body including a plurality of effective sections, each of which constitutes a circuit element such as a laminated capacitor unit, bumps generated between the effective portions and a gap interposed between the effective portions can be made minimized. Specifically, the ceramic element body includes a first effective section including a first circuit element and a second effective section including a second circuit element. A gap is provided between the first and second effective section. Floating internal conductors are arranged in the gap at least in one of first and second external layer sections, the first external section being interposed between a first main surface and the first and second effective sections, and the second external layer section being interposed between a second main surface and the first and second effective sections.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: February 28, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Ishida, Takumi Taniguchi, Masaki Tani
  • Patent number: 8125764
    Abstract: An electronic component includes a substantially rectangular parallelepiped electronic component body and first to fourth external electrodes. The first to fourth external electrodes are arranged such that a shaped defined by joining the centers of portions of the first to fourth external electrodes on a first main surface with a substantially straight line is substantially square. The first main surface is provided with a substantially linear orientation identifying mark disposed thereon. The orientation identifying mark passes through an intersection of two diagonals of the substantially square shape and extends along the longitudinal direction or the width direction.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: February 28, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Ishida, Takumi Taniguchi, Masaki Tani
  • Patent number: 8104404
    Abstract: An ignition element mounting capacitor having an ignition element mounted on a capacitor, includes therein a first capacitor section and a second capacitor section, and first external terminal electrodes electrically connected to the first capacitor section and second external terminal electrodes electrically connected to the second capacitor section. The first capacitor section has a capacity for igniting ignition powder, and the second capacitor section has a function for removing noise which affects external circuits. Further, provided on the surface of the capacitor are third external terminal electrodes electrically connected to the ignition element.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: January 31, 2012
    Assignee: Nipponkayaku Kabushikikaisha
    Inventors: Shigeru Maeda, Atsushi Ishida, Katsuki Nakanishi, Yoshihiro Koshido, Hajime Yamada, Naoko Aizawa, Yasuaki Matsumura, Toshiaki Furuya
  • Publication number: 20110284282
    Abstract: A printed wiring board wiring board including a substrate having a first penetrating hole and multiple second penetrating holes formed around the first penetrating hole, a first conductive portion and a second conductive portion formed on one surface of the substrate, a third conductive portion and a fourth conductive portion formed on the opposite surface of the substrate, a first through-hole conductor formed in the first penetrating hole and connecting the first conductive portion and the third conductive portion, and multiple second through-hole conductors formed in the second penetrating holes and connecting the second conductive portion and the fourth conductive portion. The first through-hole conductor and the second through-hole conductors are made of conductive material filled in the first penetrating hole or the second penetrating holes.
    Type: Application
    Filed: March 22, 2011
    Publication date: November 24, 2011
    Applicant: IBIDEN CO., LTD.
    Inventors: Atsushi Ishida, Ryojiro Tominaga, Haruhiko Morita
  • Publication number: 20110255209
    Abstract: A ceramic electronic component includes a ceramic element including opposed side surfaces, an inner electrode, and an external terminal electrode. The external terminal electrode includes a first conductive layer and a second conductive layer. The first conductive layer is formed by plating so as to be electrically coupled to an exposed section of the internal electrode exposed to the side surfaces. The second conductive layer is arranged so as to cover the first conductive layer and includes conductive resin. The value of T2/T1 is in the range of about 3.4 to about 11.3, where T1 indicates the thickness of the first conductive layer and T2 indicates the thickness of the second conductive layer.
    Type: Application
    Filed: April 4, 2011
    Publication date: October 20, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Atsushi ISHIDA, Takumi TANIGUCHI, Takehisa SASABAYASHI, Tomoyuki KUWANO, Akihiro MOTOKI, Toshiyuki IWANAGA
  • Publication number: 20110209911
    Abstract: A wiring board includes a substrate having first and second surfaces, a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second hole, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, a first conductive portion on one end of the second hole, and a second conductive portion on the opposite end of the second penetrating hole. The first conductor is connecting the first circuit and the second circuit. The second conductor is made of a conductive material filled in the second hole and is connecting the first conductive portion and the second conductive portion.
    Type: Application
    Filed: November 30, 2010
    Publication date: September 1, 2011
    Applicant: IBIDEN CO., LTD
    Inventors: Atsushi ISHIDA, Ryojiro Tominaga, Kenji Sakai
  • Publication number: 20110209904
    Abstract: A wiring board includes a substrate having first and second surfaces and a first penetrating hole through the substrate, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, an interlayer insulation layer on the substrate and the first or second circuit, and a third conductive circuit on the interlayer layer. The interlayer layer has a via conductor in the interlayer layer and connecting the third circuit and the second conductor. The substrate has a first through-hole conductor connecting the first and second circuits and on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor in the second hole. The via conductor is shifted from the center of the second conductor in the direction parallel to the first surface of the substrate.
    Type: Application
    Filed: November 23, 2010
    Publication date: September 1, 2011
    Applicant: IBIDEN CO., LTD.
    Inventors: Atsushi ISHIDA, Ryojiro Tominaga, Kenji Sakai
  • Publication number: 20110209905
    Abstract: A wiring board includes a substrate having a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first penetrating hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second penetrating hole, a first conductive circuit formed on a first surface of the substrate; a second conductive circuit formed on a second surface of the substrate; a first conductive portion formed on one end of the second penetrating hole, and a second conductive portion formed on the opposite end of the second penetrating hole. The first conductor is connecting the first and second circuits. The second conductor is connecting the first and second conductive portions. The first circuit has the thickness which is set greater than the thickness of the first conductive portion.
    Type: Application
    Filed: November 30, 2010
    Publication date: September 1, 2011
    Applicant: IBIDEN CO., LTD
    Inventors: Haruhiko Morita, Atsushi Ishida, Ryojiro Tominaga
  • Patent number: 8004819
    Abstract: A capacitor array includes mutually opposed first and second internal electrodes having a first capacitance portion and a second capacitance portion, respectively, a first lead portion and a second lead portion, respectively, which are electrically connected to a first outer terminal electrode and a second outer terminal electrode, and a first protrusion portion and a second protrusion portion, respectively, which partially protrude toward the second outer terminal electrode and the first outer terminal electrode. The outer terminal electrodes have plating films directly connected to the internal electrodes. The plating film is formed by electrolytic plating. In the electrolytic plating, deposition of plating proceeds while being prevented from spreading in width directions of the individual side surfaces by electric fields generated from the protrusion portions toward the vicinities of exposure portions of the respective lead portions on the side surfaces.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: August 23, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Katsumori Nagamiya, Atsushi Ishida, Akihiro Motoki
  • Publication number: 20110048775
    Abstract: A printed wiring board includes a substrate having a first surface and a second surface on the opposite side of the first surface and multiple first penetrating holes, a first conductive portion formed on the first surface of the substrate and made of a first plated cover layer, a second conductive portion formed on the second surface of the substrate and made of a second plated cover layer, the second conductive portion being positioned opposite the first conductive portion, and multiple first through-hole conductors made of conductors formed in the multiple first penetrating holes, respectively, the multiple first through-hole conductors connecting the first conductive portion and the second conductive portion. The first conductive portion, the second conductive portion and the first through-hole conductors form a first through-hole connection section which sets up either a power-source through-hole conductor or a ground through-hole conductor.
    Type: Application
    Filed: August 17, 2010
    Publication date: March 3, 2011
    Applicant: IBIDEN CO., LTD.
    Inventors: Atsushi ISHIDA, Ryojiro Tominaga, Kenji Sakai
  • Publication number: 20100271752
    Abstract: In a laminated ceramic electronic component including a ceramic element body including a plurality of effective sections, each of which constitutes a circuit element such as a laminated capacitor unit, bumps generated between the effective portions and a gap interposed between the effective portions can be made minimized. Specifically, the ceramic element body includes a first effective section including a first circuit element and a second effective section including a second circuit element. A gap is provided between the first and second effective section. Floating internal conductors are arranged in the gap at least in one of first and second external layer sections, the first external section being interposed between a first main surface and the first and second effective sections, and the second external layer section being interposed between a second main surface and the first and second effective sections.
    Type: Application
    Filed: April 14, 2010
    Publication date: October 28, 2010
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Atsushi ISHIDA, Takumi TANIGUCHI, Masaki TANI
  • Publication number: 20100271754
    Abstract: An electronic component includes a substantially rectangular parallelepiped electronic component body and first to fourth external electrodes. The first to fourth external electrodes are arranged such that a shaped defined by joining the centers of portions of the first to fourth external electrodes on a first main surface with a substantially straight line is substantially square. The first main surface is provided with a substantially linear orientation identifying mark disposed thereon. The orientation identifying mark passes through an intersection of two diagonals of the substantially square shape and extends along the longitudinal direction or the width direction.
    Type: Application
    Filed: April 16, 2010
    Publication date: October 28, 2010
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Atsushi ISHIDA, Takumi TANIGUCHI, Masaki TANI
  • Publication number: 20100243311
    Abstract: A method for manufacturing a substrate with a metal film includes preparing a first insulation layer having first and second surfaces, forming a first conductive circuit on the first surface of the first insulation layer, forming on the first surface of the first insulation layer and on the first conductive circuit a second insulation layer having first and second surfaces, forming in the second insulation layer a penetrating hole tapering from the first surface toward the first conductive circuit, forming on the inner wall of the penetrating hole, a composition containing a polymerization initiator and a polymerizable compound, providing a polymer on the inner wall of the penetrating hole by irradiating the composition, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole. The first surface of the first insulation layer faces the second surface of the second insulation layer.
    Type: Application
    Filed: October 28, 2009
    Publication date: September 30, 2010
    Applicant: IBIDEN CO., LTD.
    Inventors: Ayao NIKI, Atsushi Ishida, Ryojiro Tominaga
  • Publication number: 20100243305
    Abstract: A method for manufacturing a substrate with a metal film includes preparing an insulative substrate having the first surface and the second surface on the opposite side of the first surface, forming in the insulative substrate a penetrating hole having the inner wall tapering from the first surface of the insulative substrate toward the second surface, forming a layer of a composition containing a polymerization initiator and a polymerizable compound on the inner wall of the penetrating hole, irradiating the layer of the composition with energy such that a polymer is formed on the inner wall of the penetrating hole, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 30, 2010
    Applicant: IBIDEN CO., LTD
    Inventors: Ayao NIKI, Atsushi Ishida, Ryojiro Tominaga
  • Publication number: 20100072736
    Abstract: An ignition element mounting capacitor having an ignition element mounted on a capacitor, includes therein a first capacitor section and a second capacitor section, and first external terminal electrodes electrically connected to the first capacitor section and second external terminal electrodes electrically connected to the second capacitor section. The first capacitor section has a capacity for igniting ignition powder, and the second capacitor section has a function for removing noise which affects external circuits. Further, provided on the surface of the capacitor are third external terminal electrodes electrically connected to the ignition element.
    Type: Application
    Filed: November 30, 2007
    Publication date: March 25, 2010
    Applicants: NIPPONKAYAKU KABUSHIKIKAISHA, MURATA MANUFACTURING CO., LTD., RYODEN TRADING COMPANY, LIMITED
    Inventors: Shigeru Maeda, Atsushi Ishida, Katsuki Nakanishi, Yoshihiro Koshido, Hajime Yamada, Naoko Aizawa, Yasuaki Matsumura, Toshiaki Furuya
  • Publication number: 20090103240
    Abstract: A capacitor array includes mutually opposed first and second internal electrodes having a first capacitance portion and a second capacitance portion, respectively, a first lead portion and a second lead portion, respectively, which are electrically connected to a first outer terminal electrode and a second outer terminal electrode, and a first protrusion portion and a second protrusion portion, respectively, which partially protrude toward the second outer terminal electrode and the first outer terminal electrode. The outer terminal electrodes have plating films directly connected to the internal electrodes. The plating film is formed by electrolytic plating. In the electrolytic plating, deposition of plating proceeds while being prevented from spreading in width directions of the individual side surfaces by electric fields generated from the protrusion portions toward the vicinities of exposure portions of the respective lead portions on the side surfaces.
    Type: Application
    Filed: October 10, 2008
    Publication date: April 23, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Katsumori Nagamiya, Atsushi Ishida, Akihiro Motoki
  • Patent number: 7508895
    Abstract: An oversampling system (oversampling apparatus), a decoding LSI chip, and an oversampling method capable of decreasing the memory capacity of an output buffer used to oversample and output decoded data for digital audio.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: March 24, 2009
    Assignee: Yamaha Corporation
    Inventor: Atsushi Ishida