Patents by Inventor Atsushi Masuda

Atsushi Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160189868
    Abstract: In an embodiment, a capacitor body 11 of a multilayer ceramic capacitor 10 successively has a high-capacitance part CP1 and a low-capacitance part CP2 in the height direction, sharing one common internal electrode layer 14co among 30 internal electrode layers. The high-capacitance part CP1 includes 23 internal electrode layers 14-1 and one common internal electrode layer 14co, while the low-capacitance part CP2 includes one common internal electrode layer 14co and six internal electrode layers 14-2, where the facing distance FI2 of the seven internal electrode layers 14co and 14-2 included in the low-capacitance part CP2 is wider than the facing distance FI1 of the 24 internal electrode layers 14-1 and 14co included in the high-capacitance part CP1. The multilayer ceramic is capacitor capable of suppressing noise that may otherwise generate in a mounted state, while also reducing ESL in high-frequency ranges of several hundred MHz or higher.
    Type: Application
    Filed: December 10, 2015
    Publication date: June 30, 2016
    Inventors: Shinichi SASAKI, Atsushi OZOE, Atsushi MASUDA
  • Publication number: 20150084898
    Abstract: An input device includes: an operation portion allowing an input operation by an operating body contacting with or coming close to an upper surface thereof; an input detection portion detecting an input operation with respect to the operation portion; a driving member provided below the operation portion and driving the operation portion in an up-down direction; an elastic member provided below the operation portion; a case member holding the driving member; an interlocking member provided below the operation portion, connected to the operation portion, and driven with the operation portion; a restricting member provided between the operation portion and the interlocking member and restricting upward movement of the interlocking member; and an elastic first damper member provided below the interlocking member and contactable with the interlocking member. The elastic member elastically urges the interlocking member such that the interlocking member is brought into press contact with the first damper member.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 26, 2015
    Inventors: Shinji Ishikawa, Kazuhiko Hiratsuka, Atsushi Masuda, Shinji Fujimura
  • Publication number: 20140334683
    Abstract: Provided is an image processing apparatus including a distance information acquisition unit that acquires distance information on a distance up to an object imaged by an image sensor, a pixel value information acquisition unit that acquires pixel value information of an image corresponding to the object, and a tracking unit that tracks the object that moves, based on the acquired distance information and the acquired pixel value information.
    Type: Application
    Filed: November 20, 2012
    Publication date: November 13, 2014
    Applicant: SONY CORPORATION
    Inventor: Atsushi Masuda
  • Patent number: 8860876
    Abstract: An apparatus includes a display control section configured to control display of image data for an image, the image data including flash reach information identifying at least one portion of the image corresponding to at least one region reached by light from a flash. Also described are a method and computer-readable storage medium for controlling display of image data for the image.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventors: Atsushi Masuda, Takeshi Harano, Naho Suzuki, Masayuki Yoshii
  • Patent number: 8325051
    Abstract: An information processing apparatus includes: a rechargeable battery that is electrically connected to a charging electric power generating device; a switch that is disposed between the rechargeable battery and the charging electric power generating device; an electric power measuring unit that measures electric power produced by the charging electric power generating device; and a charge controller that controls the switch to be turned OFF when the electric power measured by the electric power measuring unit is smaller than a first electric power threshold.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: December 4, 2012
    Assignee: Fujitsu Toshiba Mobile Communications Limited
    Inventor: Atsushi Masuda
  • Publication number: 20120194732
    Abstract: An apparatus includes a display control section configured to control display of image data for an image, the image data including flash reach information identifying at least one portion of the image corresponding to at least one region reached by light from a flash. Also described are a method and computer-readable storage medium for controlling display of image data for the image.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 2, 2012
    Applicant: Sony Corporation
    Inventors: Atsushi Masuda, Takeshi Harano, Naho Suzuki, Masayuki Yoshii
  • Publication number: 20120068736
    Abstract: A design apparatus according to the present embodiment includes a scheduling section, a group ID assigning section, a transition violation detecting section and a state inserting section. The scheduling section generates a plurality of states that transition based on a clock according to a control data flow graph generated from a behavioral description and common resource schedule information. The group ID assigning section assigns group IDs to the plurality of states under a predetermined condition. The transition violation detecting section detects whether or not there is any transition violation among the plurality of states to which the group IDs are assigned. The state inserting section adds, when a transition violation is detected by the transition violation detecting section, a new state between states from which the transition violation has been detected.
    Type: Application
    Filed: February 22, 2011
    Publication date: March 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Atsushi MASUDA
  • Patent number: 8030223
    Abstract: A solar cell (100) comprising a semiconductor solar cell substrate (66) having a light receiving surface formed on the first major surface and generating photovoltaic power based on the light impinging on the light receiving surface, wherein the light receiving surface of the semiconductor solar cell substrate (66) is coated with a light receiving surface side insulating film (61) composed of an inorganic insulating material where the cationic component principally comprising silicon, and the light receiving surface side insulating film (61) is a low hydrogen content inorganic insulating film containing less than 10 atm % of hydrogen. A solar cell having an insulating film exhibiting excellent passivation effect insusceptible to aging can thereby be provided.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: October 4, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Masatoshi Takahashi, Hiroyuki Ohtsuka, Hideki Matsumura, Atsushi Masuda, Akira Izumi
  • Publication number: 20110126902
    Abstract: An apparatus for manufacturing a thin film solar cell that increase homogeneity in film characteristics. In a process of conveying a substrate from one roll to another roll, a power generation layer, which is a laminated body of a plurality of semiconductor layers, is formed in a plurality of film formation compartments partitioned along a conveying direction between the roll pair. A plurality of flat application electrodes are laid out in the conveying direction facing toward the substrate in each film formation compartment. Each flat application electrode includes a power supply terminal supplied with high frequency power in a VHF band. When the wavelength of the high frequency power is represented by ?, the distance between an edge of the flat application electrode and the power supply terminal is set to be shorter than ?/4 in a direction orthogonal to the conveying direction.
    Type: Application
    Filed: July 24, 2009
    Publication date: June 2, 2011
    Applicants: ULVAC, INC., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCEINCE
    Inventors: Masashi Kikuchi, Atsushi Masuda
  • Patent number: 7913204
    Abstract: A high-level synthesis apparatus for automatically generating a register transfer level (RTL) logic circuit from a behavioral description has a scheduling unit configured to perform data flow analysis and scheduling to generate a data flow graph showing an operation cycle of an operation from the behavioral description, a scheduling result inputting/outputting unit configured to extract a point to be allocated to a register from the data flow graph and output register information indicating the point, the scheduling result inputting/outputting unit being provided with dynamic analysis data that includes at least one of the number of times that data at the point has been substituted and the number of times that a value stored at the point has changed by a predetermined simulation, an allocating unit configured to consult dynamic analysis data and allocate circuit elements to the behavioral description, and an RTL description generating unit configured to generate the logic circuit based on the allocation of ci
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: March 22, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Atsushi Masuda
  • Publication number: 20110006905
    Abstract: An information processing apparatus includes: a rechargeable battery that is electrically connected to a charging electric power generating device; a switch that is disposed between the rechargeable battery and the charging electric power generating device; an electric power measuring unit that measures electric power produced by the charging electric power generating device; and a charge controller that controls the switch to be turned OFF when the electric power measured by the electric power measuring unit is smaller than a first electric power threshold.
    Type: Application
    Filed: February 3, 2010
    Publication date: January 13, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Atsushi Masuda
  • Patent number: 7815813
    Abstract: An end point detection method in the case where a catalyst arranged in a treatment chamber of a gas phase reaction processing apparatus is heated at high temperature by supplying electric power thereto and the treatment is carried out by cracking a reaction gas by the catalyst heated at high temperature, comprises the steps of supplying the electric power to the catalyst from a constant current source, detecting electric potential difference between both ends of the catalyst, performing primary differentiation of the detected electric potential difference, and determining an end point of the treatment based on obtained primary differential value.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: October 19, 2010
    Assignees: Tokyo Ohka Kogyo Co., Ltd., Japan Advanced Institute of Science and Technology
    Inventors: Kazuhisa Takao, Hiroshi Ikeda, Hideki Matsumura, Atsushi Masuda, Hironobu Umemoto
  • Patent number: 7771701
    Abstract: In a hydrogen atom generation source in a vacuum treatment apparatus which can effectively inhibit hydrogen atoms from being recombined due to contact with an internal wall surface of a treatment chamber of the vacuum treatment apparatus and an internal wall surface of a transport passage, and being returned into hydrogen molecules, at least a part of a surface facing a space with the hydrogen atom generation source formed therein of a member surrounding the hydrogen atom generation source is coated with SiO2. In a hydrogen atom transportation method for transporting hydrogen atoms generated by the hydrogen atom generation source in the vacuum treatment apparatus to a desired place, the hydrogen atoms are transported via a transport passage whose internal wall surface is coated with SiO2.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: August 10, 2010
    Assignee: Canon Anelva Corporation
    Inventors: Hironobu Umemoto, Atsushi Masuda, Koji Yoneyama, Keiji Ishibashi, Manabu Ikemoto
  • Publication number: 20100173447
    Abstract: A solar cell (100) comprising a semiconductor solar cell substrate (66) having a light receiving surface formed on the first major surface and generating photovoltaic power based on the light impinging on the light receiving surface, wherein the light receiving surface of the semiconductor solar cell substrate (66) is coated with a light receiving surface side insulating film (61) composed of an inorganic insulating material where the cationic component principally comprising silicon, and the light receiving surface side insulating film (61) is a low hydrogen content inorganic insulating film containing less than 10 atm % of hydrogen. A solar cell having an insulating film exhibiting excellent passivation effect insusceptible to aging can thereby be provided.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 8, 2010
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Masatoshi Takahashi, Hiroyuki Ohtsuka, Hideki Matsumura, Atsushi Masuda, Akira Izumi
  • Patent number: 7707386
    Abstract: A design apparatus for designing a processor re-configurable for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extended instruction definition unit that searches the program for a part allowing use of an extended instruction in accordance with the analysis results by the analysis unit and generates definition of an extended instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extended instruction generated by the extended instruction definition unit.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: April 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Publication number: 20090320910
    Abstract: It relates to a transparent electrode substrate for a solar cell comprising a resin film [I] 1 and a film 2 comprising a metal oxide fabricated thereon, wherein the resin film [I] 1 is a fabricated body obtained by curing a photocurable composition and having an unevenness on the side of the resin film [I] 1 on which the film 2 comprising a metal oxide is fabricated
    Type: Application
    Filed: August 31, 2007
    Publication date: December 31, 2009
    Inventors: Takuya Matsui, Atsushi Masuda, Katsuhiko Katsuma, Seiichirou Hayakawa
  • Publication number: 20090263911
    Abstract: The object of the present invention is to provide an end point detection method in a gas phase reaction processing apparatus. An end point detection method in the case where a catalyst 9 arranged in a treatment chamber is heated at high temperature by supplying electric power thereto and the treatment is carried out by cracking a reaction gas by the catalyst 9 heated at high temperature, comprises the steps of supplying the electric power to the catalyst 9 from a constant current source 10, detecting electric potential difference between both ends of the catalyst 9, performing primary differentiation of the detected electric potential difference, and determining an end point of the treatment based on obtained primary differential value.
    Type: Application
    Filed: August 22, 2006
    Publication date: October 22, 2009
    Applicants: Tokyo Ohka Kogyo Co., Ltd, Japan Advanced Institute Of Science And Technology
    Inventors: Kazuhisa Takao, Hiroshi Ikeda, Hideki Matsumura, Atsushi Masuda, Hironobu Umemoto
  • Patent number: 7583854
    Abstract: A data processing system includes a block setting module setting a to-be-processed block shape including subject data, which is one of 2-dimentional data in a matrix stored in a virtual storage area, and influenced data influenced by results of processing subject data, a division module dividing 2-dimentional data into a plurality of execution blocks based on information of the to-be processed block shape, and a processing module sequentially processing data in each execution block along a row direction in units of execution blocks.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: September 1, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroki Tagawa, Atsushi Masuda
  • Patent number: 7561386
    Abstract: A switch monitoring circuit includes a switch arranged to be turned ON/OFF in response to an operation, a capacitor connected to both ends of the switch, a voltage applying unit that applies a voltage to the switch in response to a command, a voltage detecting unit that detects the voltage applied to the switch and a diode connected to the switch and the capacitor. The diode prevents an electric charge stored in the capacitor from being emitted.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: July 14, 2009
    Assignee: Yazaki Corporation
    Inventor: Atsushi Masuda
  • Publication number: 20090164967
    Abstract: A high-level synthesis apparatus for automatically generating a register transfer level (RTL) logic circuit from a behavioral description has a scheduling unit configured to perform data flow analysis and scheduling to generate a data flow graph showing an operation cycle of an operation from the behavioral description, a scheduling result inputting/outputting unit configured to extract a point to be allocated to a register from the data flow graph and output register information indicating the point, the scheduling result inputting/outputting unit being provided with dynamic analysis data that includes at least one of the number of times that data at the point has been substituted and the number of times that a value stored at the point has changed by a predetermined simulation, an allocating unit configured to consult dynamic analysis data and allocate circuit elements to the behavioral description, and an RTL description generating unit configured to generate the logic circuit based on the allocation of ci
    Type: Application
    Filed: October 16, 2008
    Publication date: June 25, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Atsushi MASUDA