Abstract: In a hydrogen atom generation source in a vacuum treatment apparatus which can effectively inhibit hydrogen atoms from being recombined due to contact with an internal wall surface of a treatment chamber of the vacuum treatment apparatus and an internal wall surface of a transport passage, and being returned into hydrogen molecules, at least a part of a surface facing a space with the hydrogen atom generation means formed therein of a member surrounding the hydrogen atom generation means is coated with SiO2. In a hydrogen atom transportation method for transporting hydrogen atoms generated by the hydrogen atom generation means in the vacuum treatment apparatus to a desired place, the hydrogen atoms are transported via a transport passage whose internal wall surface is coated with SiO2.

Abstract: A design apparatus for designing a processor re-configurable for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extended instruction definition unit that searches the program for a part allowing use of an extended instruction in accordance with the analysis results by the analysis unit and generates definition of an extended instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extended instruction generated by the extended instruction definition unit.

Abstract: A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extension instruction definition unit that searches the program for a part allowing use of an extension instruction in accordance with the analysis results by the analysis unit and generates definition of an extension instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extension instruction generated by the extension instruction definition unit.

Abstract: A solar cell (100) comprising a semiconductor solar cell substrate (66) having a light receiving surface formed on the first major surface and generating photovoltaic power based on the light impinging on the light receiving surface, wherein the light receiving surface of the semiconductor solar cell substrate (66) is coated with a light receiving surface side insulating film (61) composed of an inorganic insulating material where the cationic component principally comprising silicon, and the light receiving surface side insulating film (61) is a low hydrogen content inorganic insulating film containing less than 10 atm % of hydrogen. A solar cell having an insulating film exhibiting excellent passivation effect insusceptible to aging can thereby be provided.

Abstract: A heating element CVD system wherein one or a plurality of connection terminal holders is placed in the processing container, and each of the connection terminal holders holds a plurality of connection terminals. Each of the connection terminals connects the heating element to the electric power supply mechanism electrically such that a connection region of the heating element connected to the connection terminal is not exposed to a space in the processing container.

Abstract: A switch monitoring circuit includes a switch arranged to be turned ON/OFF in response to an operation, a capacitor connected to both ends of the switch, a voltage applying unit that applies a voltage to the switch in response-to a command, a voltage detecting unit that detects the voltage applied to the switch and a diode connected to the switch and the capacitor. The diode prevents an electric charge stored in the capacitor from being emitted.

Abstract: A difficulty has been given, that is, in a condition that an electrostatic chuck having an oxide layer as a dielectric layer is set in catalytic chemical vapor deposition apparatus, as a silicon thin film is repeatedly deposited on a workpiece held by the electrostatic chuck, adsorbing power of the electrostatic chuck is gradually decreased, and finally the chuck does not adsorb a substrate at all. Thus, a dielectric layer on a surface of the electrostatic chuck is covered with an insulating film containing silicon nitride or silicon oxide. Thus, since damage to a chuck surface can be prevented, the damage being due to hydrogen radicals generated during depositing the silicon film by the catalytic chemical vapor deposition apparatus, even if the silicon film is repeatedly deposited, power for adsorbing the substrate is not decreased, and consequently substrate temperature is stabilized during depositing the silicon film.

Abstract: A gas phase reaction processing device 25 comprising a processing chamber 14 into which reactive gas is introduced, substrate material 3 to be processed which is disposed within the processing chamber 14, a catalytic body 9 for decomposing the reactive gas introduced into the processing chamber 14, an electric power unit 10 for supplying power to the catalytic body 9, and an electrode structure 15 containing the catalytic body 9, the gas phase reaction processing device being characterized in that the electrode structure 15 is provided with a plurality of catalytic bodies 9 which are arranged substantially parallel with one another, a first group of terminals 7 and a second group of terminals 8 which are disposed opposite to sandwich this catalytic body 9 therebetween, wherein the first group of terminals 7 supports one end of the catalytic body 9 and the second group of terminals 8 supports the other end of the catalytic body 9 respectively, and a terminal block 6 adapted to support and electrically insulate

Abstract: An apparatus for designing a semiconductor integrated circuit having a configurable processor includes: a software information storage section storing software information including software descriptions; a hardware information storage section storing hardware information including hardware descriptions of the semiconductor integrated circuit; a processor information storage section storing processor information; a hardware implementation specification section specifying an algorithm of a portion to be implemented by hardware from among the software descriptions; a hardware changing section generating hardware descriptions from the algorithm of the specified portion, and changing the hardware information and the processor information; a software changing section generating software descriptions in which the algorithm of the specified portion is replaced with an algorithm for controlling the implemented hardware, and changing the software information; and a performance analyzer analyzing a performance of the s

Abstract: A data processing system includes a block setting module setting a to-be-processed block shape including subject data, which is one of 2-dimentional data in a matrix stored in a virtual storage area, and influenced data influenced by results of processing subject data, a division module dividing 2-dimentional data into a plurality of execution blocks based on information of the to-be processed block shape, and a processing module sequentially processing data in each execution block along a row direction in units of execution blocks.

Abstract: Conventional methods of crystallizing a semiconductor film through scanning with a pulse laser have had a problem in that variation in particle diameter or shape of a crystal grain causes variation in characteristics of a thin film transistor, which lowers display quality of a liquid crystal display. In view of this, in a method of crystallizing a semiconductor film according to the present invention, after a step of performing scanning with a first pulse laser, scanning with a second pulse laser, which has a higher energy density than that of the first pulse laser, is performed in a substantially orthogonal direction to a traveling direction of scanning with the first pulse laser. With this method, the semiconductor film can be crystallized uniformly.

Abstract: An algorithm of a logic circuit is converted from an operation description having operators into a data flow graph having operation nodes executing the operators arranged in order of the executing. Execution steps are allocated in the data flow graph, and registers storing output data from the operation nodes are inserted after execution of the execution steps. A data path of the logic circuit having operation units which served as the operation nodes and storage elements which served as the registers, and control information on the data path are produced. An operator/operation unit database configured to retrieve the operation units executing the operators from the operators and configured to retrieve the operators outputting data stored in the registers which served as the storage elements from the execution steps and the storage elements are produced.

Abstract: A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extension instruction definition unit that searches the program for a part allowing use of an extension instruction in accordance with the analysis results by the analysis unit and generates definition of an extension instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extension instruction generated by the extension instruction definition unit.

Abstract: An apparatus for designing a semiconductor integrated circuit having a configurable processor includes: a software information storage section storing software information including software descriptions; a hardware information storage section storing hardware information including hardware descriptions of the semiconductor integrated circuit; a processor information storage section storing processor information; a hardware implementation specification section specifying an algorithm of a portion to be implemented by hardware from among the software descriptions; a hardware changing section generating hardware descriptions from the algorithm of the specified portion, and changing the hardware information and the processor information; a software changing section generating software descriptions in which the algorithm of the specified portion is replaced with an algorithm for controlling the implemented hardware, and changing the software information; and a performance analyzer analyzing a performance of the s

Abstract: A shutter-driving device combined with a diaphragm of the present invention comprises a base member having a predetermined thickness, an aperture having a predetermined diameter and formed through the base member, and a light-adjusting member closing the aperture or adjusting the degree of opening thereof by driving a driving source. An ND filter capable of adjusting the intensity of light that passes through the aperture is supported by the base member. The movement of the ND filter is locked in a state where the aperture is not shielded when the light-adjusting member opens the aperture. In the state where the aperture is not shielded, the locking of the ND filter is released in synchronization with the operation of the light-adjusting member of closing the aperture so as to shield the aperture.

Abstract: An algorithm of a logic circuit is converted from an operation description having operators into a data flow graph having operation nodes executing the operators arranged in order of the executing. Execution steps are allocated in the data flow graph, and registers storing output data from the operation nodes are inserted after execution of the execution steps. A data path of the logic circuit having operation units which served as the operation nodes and storage elements which served as the registers, and control information on the data path are produced. An operator/operation unit database configured to retrieve the operation units executing the operators from the operators and configured to retrieve the operators outputting data stored in the registers which served as the storage elements from the execution steps and the storage elements are produced.

Abstract: This invention discloses a method and apparatus where a pre-treatment which reduce interfacial level density is carried out before thin film deposition on a substrate utilizing a catalytic gas phase reaction. The catalytic gas phase reaction is generated with a treatment gas which is supplied with the substrate via a thermal catalysis body provided near the substrate surface. Thin film deposition on the substrate surface is carried out after this pre-treatment. The thermal catalysis body is made of tungsten, molybdenum, tantalum, titanium or vanadium, and is heated by a heater. And, this invention also discloses a semiconductor device having a semiconductor-insulator junction with its interfacial level density is 1012 eV −1cm−2 or less, which is brought by the above pre-treatment in the insulator film deposition process.

Abstract: A heating element CVD system wherein one or a plurality of connection terminal holders is placed in the processing container, and each of the connection terminal holders holds a plurality of connection terminals. Each of the connection terminals connects the heating element to the electric power supply mechanism electrically such that a connection region of the heating element connected to the connection terminal is not exposed to a space in the processing container.

Abstract: A motor device, in which decentering during rotation of a disk can be prevented, is provided with a bearing unit including a cylindrical bearing and a flange formed integrally with each other, the upper face of the flange being perpendicular to a rotational shaft. Sizing is performed by using the upper face of the flange as a reference. A spacer made of resin and having the same shape as that of the flange is provided on the upper face of the flange. The spacer has an upper face inclined with respect to the upper face of the flange. A core unit is fixed inclined to the spacer on the upper face thereof, thereby tilting the rotational shaft, whereby the rotational shaft is urged toward one side of a coupling hole.

Abstract: A vertical installation structure includes a plurality of placing stages on each of which information processing apparatuses are to be installed, and supporting members for supporting the plurality of placing stages so that the plurality of placing stages are vertically arranged. A vertical installation system includes the above vertical installation structure, and moving structure capable of moving along the vertical installation structure, the moving structure having a plurality of stages on each of which at least one information processing apparatus is to be placed and supporting members for supporting the plurality of stages so that each of the plurality of stages is level with a corresponding one of the plurality of placing stages of the vertical installation structure. The information processing apparatus set on each of the stages is transferred to the corresponding one of the plurality of placing stages of the vertical installation structure.