Patents by Inventor Atsushi Nakagawa

Atsushi Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020094823
    Abstract: In a radio communication system which is comprised of a plurality of node devices having a radio unit for radio communications in an associated section with a neighboring node device and a management device for managing the respective node devices, the node devices are provided with a GPS device and sends position information about the own node device generated by the GPS device to the management device. The management device generates control information for adjusting an antenna direction and a radio level of the radio unit of the node device according to the position information received from the node device and sends to the node devices, and the node devices performs automatic adjusting control of the antenna direction and the radio level of the own node device according to the received control information.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 18, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Muneyuki Suzuki, Yutaka Seki, Atsushi Nakagawa, Yoshitaka Sioya, Akiyoshi Asami
  • Patent number: 6406904
    Abstract: A process for preparing an optically active 4-halogeno-1,3-butanediol and (R)-1,2,4-butanetriol or (S)-3-hydroxy-&ggr;-butyrolactone which comprises reacting a racemic 4-halogeno-1,3-butanediol with a specific microorganism belonging to the genus Pseudomonas.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: June 18, 2002
    Assignee: Daiso Co., Ltd.
    Inventors: Naoya Kasai, Toshio Suzuki, Hideaki Idogaki, Atsushi Nakagawa
  • Publication number: 20020059851
    Abstract: It is an object of the present invention to provide a machine tool that the process accuracy does not deteriorate even if the accuracy of the machine itself changes to some extent. A work support means 3 of a spindle 8 etc. to support a work (W), a cutting means 4 of a movable feed bar 9 to the work support means 3 to process the work (W) and a tool base 10 and the like and a control unit 2 are provided. The control unit 2 controls the movement of the cutting means 4 by the measured positional information based on a process origin (Ow) of the work support means 3. The position measurement means 25 like a linear sensor is provided as the means to measure the position to the moving direction of the cutting means 4 based on the process origin (Ow).
    Type: Application
    Filed: October 2, 2001
    Publication date: May 23, 2002
    Applicant: Murata Kikai Kabushiki Kaisha
    Inventor: Atsushi Nakagawa
  • Patent number: 6392394
    Abstract: A step-down circuit according to the present invention for reducing external supply voltage to be supplied from the outside to supply it to the internal circuit is provided with a diode circuit for reducing the external supply voltage by desired voltage to output it as the internal supply voltage, a pull-down transistor for pulling down the internal supply voltage to be outputted from the diode circuit when the external supply voltage drops, and a controlling circuit for controlling the operation of the pull-down transistor.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventors: Atsushi Nakagawa, Hiroyuki Takahashi
  • Publication number: 20020041524
    Abstract: A semiconductor integrated circuit including a logic circuit having an insulated gate field effect transistor (IGFET) (352) with a reduced threshold voltage that may compensate for a reduced voltage supply is provided. The IGFET may receive a signal line (340) at a gate terminal and may provide a controllable impedance path between a signal line (320) and a node (ND). The logic circuit may include a stand-by mode in which the IGFET (352) may receive a potential at a source electrode that may be approximately equal to the potential at a drain electrode. In this way, leakage current may be reduced.
    Type: Application
    Filed: October 4, 2001
    Publication date: April 11, 2002
    Inventors: Hiroyuki Takahashi, Atsushi Nakagawa
  • Patent number: 6369663
    Abstract: A Gunn diode which is formed by sequentially laminating a first semiconductor layer, an active layer and a second semiconductor layer onto a semiconductor substrate. The Gunn diode comprises first and second electrodes arranged on the second semiconductor layer for impressing voltage on the active layer, and a concave layer portion which is cut from around the first electrode in a direction of the second semiconductor layer and the active layer and which subdivides the second semiconductor layer and the active layer to which the first electrode is connected as a region which functions as a Gunn diode. Since etching for defining a region that is to function as a Gunn diode is performed by self-alignment dry etching utilizing electrode layers formed above this region as masks, variations in characteristics are restricted.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: April 9, 2002
    Assignee: New Japan Radio Co., Ltd.
    Inventors: Atsushi Nakagawa, Kenichi Watanabe
  • Publication number: 20020019034
    Abstract: A process for preparation of an optically active 1,2-diol compound of the following formula: 1
    Type: Application
    Filed: June 28, 2001
    Publication date: February 14, 2002
    Inventors: Toshio Suzuki, Hideaki Idogaki, Atsushi Nakagawa
  • Patent number: 6345334
    Abstract: The present invention provides a semiconductor memory device capable of writing data into a memory area and reading data from the memory area, wherein the semiconductor memory device has a circuit for switching sequences of unit data comprising plural bytes to be consecutively transmitted as a unit for at least one of data write or read operations, so that, in accordance with a designated address of a memory area, a corresponding datum of the unit data to the designated address is first transmitted, followed by a consecutive transmission of remaining data in a predetermined basic cyclic sequence, whereby if any address of the memory area is designated, then the unit data comprising the plural bytes are consecutively transmitted as a unit without intervening any operation of switching word lines connected to the memory area.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: February 5, 2002
    Assignee: NEC Corporation
    Inventors: Atsushi Nakagawa, Yoshiyuki Kato
  • Patent number: 6344658
    Abstract: A Gunn diode which is formed by sequentially laminating a first semiconductor layer, an active layer and a second semiconductor layer onto a semiconductor substrate. The Gunn diode comprises first and second electrodes arranged on the second semiconductor layer for impressing voltage on the active layer, and a concave portion which is cut from around the first electrode in a direction of the second semiconductor layer and the active layer and which subdivides the second semiconductor layer and the active layer to which the first electrode is connected as a region which functions as a Gunn diode. Since etching for defining a region that is to function as a Gunn diode is performed by self-alignment dry etching utilizing electrode layers formed above this region as masks, variations in characteristics are restricted.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: February 5, 2002
    Assignee: New Japan Radio Co., Ltd.
    Inventors: Atsushi Nakagawa, Kenichi Watanabe
  • Patent number: 6316233
    Abstract: An industrial and economical method for obtaining a (S)-3-halogeno-1,2-propanediol, which comprises cultivating a microorganism belonging to the genus. Pseudomonas which has an ability to assimilate (R)-3-halogeno-1,2-propanediol and can grow by assimilating (R)-3-halogeno-1,2-propanediol as a single carbon source, in a culture medium containing a racemic 3-halogeno-1,2-propanediol as a substrate, and isolating the (S)-3-halogeno-1,2-propanediol from the culture medium.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: November 13, 2001
    Assignee: Daiso Co., Ltd.
    Inventors: Toshio Suzuki, Hideaki Idogaki, Atsushi Nakagawa, Naoya Kasai
  • Patent number: 6282133
    Abstract: A delay circuit in a semiconductor memory device generates a sense amplifier enable signal having a delay time with respect to the timing of selection of one of memory cells. The delay time corresponds to the largest read time for the memory cell located at the most distant position and has an irregularity reflecting an irregularity in threshold voltage of nMOSFET transfer gates in each memory cell, which affects the read time. An optimum timing for the sense amplifier enable signal can be obtained by the delay circuit irrespective of the irregularity in the threshold voltage of the nMOSFET transfer gates.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: August 28, 2001
    Assignee: Nec Corporation
    Inventors: Atsushi Nakagawa, Hiroyuki Takahashi
  • Publication number: 20010015579
    Abstract: An adapter includes a cord, a fitting portion, a voltage setting unit, and a fitting prevention mechanism. The cord is adapted to connect to a DC power source unit in order to receive DC voltage from the DC power source unit. The fitting portion is for insertion into the battery holding space of any one of a plurality of cordless power tools. The fitting portion receives the DC voltage received through the cord and supplies the DC voltage to a cordless power tool in which the fitting portion is properly inserted. The voltage setting unit is for setting voltage supplied through the fitting portion to the cordless power tool. The fitting prevention mechanism operates in linked association with operation of the voltage setting unit to prevent proper insertion of the fitting portion into a cordless power tool that has a rated voltage different from the voltage set by the voltage setting unit.
    Type: Application
    Filed: February 20, 2001
    Publication date: August 23, 2001
    Inventors: Atsushi Nakagawa, Eiji Nakayama, Takeshi Takeda
  • Publication number: 20010003046
    Abstract: An industrial and economical method for obtaining a (S)-3-halogeno-1,2-propanediol, which comprises cultivating a microorganism belonging to the genus Pseudomonas which has an ability to assimilate (R)-3-halogeno-1,2-propanediol and can grow by assimilating (R)-3-halogeno-1,2-propanediol as a single carbon source, in a culture medium containing a racemic 3-halogeno-1,2-propanediol as a substrate, and isolating the (S)-3-halogeno-1,2-propanediol from the culture medium.
    Type: Application
    Filed: November 29, 2000
    Publication date: June 7, 2001
    Inventors: Toshio Suzuki, Hideaki Idogaki, Atsushi Nakagawa, Naoya Kasai
  • Patent number: 6172860
    Abstract: A DC power source unit includes a main unit that generates DC voltage, and an output cable. The output cable has one end connected to the output of the main unit and another end attached to an adapter plug. The adapter plug Is electrically connected to an electrically powered tool, such as an electrical drill. Current flowing in the tool is detected every predetermined interval and accumulated electrical quantity is computed based on the detected current flowing in the tool. Based on the accumulated electrical quantity, the temperature of the tool is predicted. When it is determined that the tool is heated up to a first critical temperature based on the accumulated electrical quantity, an alarm unit is actuated. When it is determined that the tool is further heated up to a second critical temperature, supply of current to the tool is interrupted.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: January 9, 2001
    Assignee: Hitachi Koki Co., LTD
    Inventors: Chikai Yoshimizu, Hiroaki Orikasa, Takahiko Shimada, Shigeru Shinohara, Eiji Nakayama, Kazuhiko Funabashi, Atsushi Nakagawa
  • Patent number: 5974918
    Abstract: A screw driving device includes a rotatable driver bit for driving a screw into a workpiece. A motor rotates the driver bit. A rotatable sprocket in engagement with a screw carrying belt feeds the screw carrying belt, and thereby feeds a screw on the screw carrying belt to a drivable place axially aligning with and being in front of the driver bit. A slide member supports the screw carrying belt. The slide member has a hole through which the screw is driven into the workpiece by the driver bit. When the screw is in the drivable place, a distance between the screw and an edge of the hole in a predetermined direction is greater than a distance between the screw and an edge of the hole in a direction different from the predetermined direction.
    Type: Grant
    Filed: April 10, 1997
    Date of Patent: November 2, 1999
    Assignee: Hitachi Koki Co., Ltd.
    Inventors: Atsushi Nakagawa, Chikai Yoshimizu, Kouichirou Yamada
  • Patent number: 5953972
    Abstract: A device that increases the range of speeds at which the servo-motor may be used and stops insufficient output at times of slow speed, wherein an intermediate terminal is arranged in a primary winding as an output characteristic adjustment means for adjusting the torque with respect to the speed of the servo-motor and a switching control means is arranged for switching the connection of the power supply from a final terminal to an intermediate terminal when the punch speed exceeds a predetermined value.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: September 21, 1999
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventor: Atsushi Nakagawa
  • Patent number: 5831458
    Abstract: An output circuit of the present invention comprises a logic gate having a data signal and a control signal as input signals, a first P channel transistor having a gate connected to an output terminal of the logic gate and a source.cndot.drain path connected between a first power source terminal and a node, a first N channel transistor having a gate connected to the output terminal of the logic gate and a source.cndot.drain path connected between a second power source terminal and the node, a bipolar transistor having a base connected to the node, a collector connected to the first power source terminal and an emitter connected to an output terminal of the output circuit, a second P channel transistor having a gate connected to the output terminal of the logic gate and a source.cndot.drain path connected between the first power source terminal and the output terminal of the output circuit, a second N channel transistor having a gate connected to the output terminal of the logic gate and a source.cndot.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: November 3, 1998
    Assignee: NEC Corporation
    Inventor: Atsushi Nakagawa
  • Patent number: 5739006
    Abstract: The present invention relates to astaxanthin-containing zooplankton such as Brachionus pricatilis obtained by culturing, a method for culturing the zooplankton in a liquid containing astaxanthin and a method for breeding fry fish by feeding the above astaxanthin-containing zooplankton.The survival rate in breeding fry fish may be remarkably improved by feeding the astaxanthin-containing zooplankton to fry fish.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: April 14, 1998
    Assignee: Kyowa Hakko Kogyo Co., Ltd.
    Inventors: Toshio Abe, Atsushi Nakagawa, Hiroshi Higuchi, Tatsuro Yamanaka
  • Patent number: 5429957
    Abstract: A base layer interposed between an n-type GaAs collector layer and an n-type AlGaAs emitter layer is composed of a p-type InAlGaAs. From a collector/base interface to an emitter/base interface, an InAs composition of the base layer is decreased and a concentration of carbon as a p-type impurity thereof is increased so as to obtain a built-in internal field intensity in the base layer by a cooperative effect of the graded-bandgap and the impurity concentration gradient, thus reducing a base transit time of electrons. The base layer is fabricated according to MOMBE using TMG as a gallium source, controlling the InAs composition, so that a desired carbon concentration gradient is automatically formed. Thereby, a high performance, heterojunction bipolar transistor with an increased built-in internal field intensity in the base layer is obtained.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: July 4, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshinobu Matsuno, Atsushi Nakagawa, Takashi Hirose, Kaoru Inoue
  • Patent number: 5371389
    Abstract: A base layer interposed between an n-type GaAs collector layer and an n-type AlGaAs emitter layer is composed of a p-type InAlGaAs. From a collector/base interface to an emitter/base interface, an InAs composition of the base layer is decreased and a concentration of carbon as a p-type impurity thereof is increased so as to obtain a built-in internal field intensity in the base layer by a cooperative effect of the graded-bandgap and the impurity concentration gradient, thus reducing a base transit time of electrons. The base layer is fabricated according to MOMBE using TMG as a gallium source, controlling the InAs composition, so that a desired carbon concentration gradient is automatically formed. Thereby, a high performance heterojunction bipolar transistor with an increased built-in internal field intensity in the base layer is obtained.
    Type: Grant
    Filed: August 4, 1993
    Date of Patent: December 6, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshinobu Matsuno, Atsushi Nakagawa, Takashi Hirose, Kaoru Inoue