Abstract: This disclosure describes techniques for supporting intra-frame timestamps in a graphics system that performs tile-based rendering. The techniques for supporting intra-frame timestamps may involve generating a timestamp value that is indicative of a point in time based on a plurality of per-bin timestamp values that are generated by a graphics processing unit (GPU) while performing tile-based rendering for a graphics frame. The timestamp value may be a function of at least two of the plurality of per-bin timestamp values. The timestamp value may be generated by a central processing unit (CPU), the GPU, another processor, or any combination thereof. By using per-bin timestamp values to generate timestamp values for intra-frame timestamp requests, intra-frame timestamps may be supported by a graphics system that performs tile-based rendering.

Abstract: In general, techniques are described for analyzing a command stream that configures a graphics processing unit (GPU) to render one or more render targets. A device comprising a processor may perform the techniques. The processor may be configured to analyze the command stream to determine a representation of the one or more render targets defined by the command stream. The processor may also be configured to, based on the representation of the render targets, and identify one or more rendering inefficiencies that will occur upon execution of the command stream by the GPU. The processor may also be configured to re-order one or more commands in the command stream so as to reduce the identified rendering inefficiencies that will occur upon execution of the command stream by the GPU.

Abstract: An apparatus configured for graphics processing includes a memory configured to store graphics data, and one or more processors in communication with the memory, the one or more processors configured to output, for display, a plurality of test graphics images, receive input indicative of a perception of a user of the computing device of at least one test graphics image from the plurality of test graphics images, determine at least one parameter modification value and generate a corrected graphics image based at least in part on the at least one parameter modification value.

Abstract: The present disclosure provides systems and methods for multi-path rendering on tile based architectures including executing, with a graphics processing unit (GPU), a query pass, executing, with the GPU, a condition true pass based on the query pass without executing a flush operation, executing, with the GPU, a condition false pass based on the query pass without executing a flush operation, and responsive to executing the condition true pass and the condition false pass, executing, with the GPU, a flush operation.

Abstract: A GPU may determine, based on a visibility stream, whether to execute instructions stored in an indirect buffer. The instructions include instructions for rendering primitives associated with a bin of a plurality of bins and include one or more secondary operations. The visibility stream indicate if one or more of the primitives associated with the bin will be visible in a finally rendered scene. The GPU may, responsive to determining not to execute the instructions stored in the indirect buffer, execute one or more secondary operations stored in a shadow indirect buffer. The GPU may, responsive to determining to execute the instructions stored in the indirect buffer, execute the instructions for rending the primitives associated with the bin of the plurality of bins and executing the one or more secondary operations stored in the indirect buffer.

Abstract: The present disclosure provides systems and methods for multi-path rendering on tile based architectures including executing, with a graphics processing unit (GPU), a query pass, executing, with the GPU, a condition true pass based on the query pass without executing a flush operation, executing, with the GPU, a condition false pass based on the query pass without executing a flush operation, and responsive to executing the condition true pass and the condition false pass, executing, with the GPU, a flush operation.

Abstract: Systems and methods are described including creating a mask that indicates which pixel groups do not need to be loaded from Graphics Memory (GMEM). The mask indicates a pixel group does not need to be loaded from GMEM. The systems and methods may further include rendering a tile on a screen. This may include loading the GMEM based on the indication from the mask and skipping a load from the GMEM based on the indication from the mask.

Abstract: In an example, a method for rendering graphics data includes receiving a plurality of commands associated with a plurality of render targets, where the plurality of commands are received in an initial order. The method also includes determining an execution order for the plurality of commands including reordering one or more of the plurality of commands in a different order than the initial order based on data dependencies between commands. The method also includes executing the plurality of commands in the determined execution order.

Abstract: This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.

Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.

Abstract: Techniques are described for writing commands to memory units of a chain of memory units of a command buffer. The techniques may write the commands, and if during the writing, it is determined that there is not sufficient space in the chain of memory unit, the techniques may flush previously confirmed commands. If after the writing, the techniques determine that there is not sufficient space in an allocation list for the handles associated with the commands, the techniques may flush previously confirmed commands.

Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.

Abstract: In some examples, aspects of this disclosure relate to a method for rendering an image. For example, the method includes generating visibility information indicating visible primitives of the image. The method also includes rendering the image using a binning configuration, wherein the binning configuration is based on the visibility information.

Abstract: The present disclosure provides systems and methods for multi-path rendering on tile based architectures including executing, with a graphics processing unit (GPU), a query pass, executing, with the GPU, a condition true pass based on the query pass without executing a flush operation, executing, with the GPU, a condition false pass based on the query pass without executing a flush operation, and responsive to executing the condition true pass and the condition false pass, executing, with the GPU, a flush operation.

Abstract: This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.

Abstract: A GPU may determine, based on a visibility stream, whether to execute instructions stored in an indirect buffer. The instructions include instructions for rendering primitives associated with a bin of a plurality of bins and include one or more secondary operations. The visibility stream indicate if one or more of the primitives associated with the bin will be visible in a finally rendered scene. The GPU may, responsive to determining not to execute the instructions stored in the indirect buffer, execute one or more secondary operations stored in a shadow indirect buffer. The GPU may, responsive to determining to execute the instructions stored in the indirect buffer, execute the instructions for rending the primitives associated with the bin of the plurality of bins and executing the one or more secondary operations stored in the indirect buffer.

Abstract: Techniques are described for writing commands to memory units of a chain of memory units of a command buffer. The techniques may write the commands, and if during the writing, it is determined that there is not sufficient space in the chain of memory unit, the techniques may flush previously confirmed commands. If after the writing, the techniques determine that there is not sufficient space in an allocation list for the handles associated with the commands, the techniques may flush previously confirmed commands.

Abstract: Systems, methods, and apparatus for performing queries in a graphics processing system are disclosed. These systems, methods, and apparatus may be configured to read a running counter at the start of the query to determine a start value, wherein the running counter counts discrete graphical entities, read the running counter at the end of the query to determine an end value, and subtract the start value from the end value to determine a result.

Abstract: This disclosure describes techniques for supporting intra-frame timestamps in a graphics system that performs tile-based rendering. The techniques for supporting intra-frame timestamps may involve generating a timestamp value that is indicative of a point in time based on a plurality of per-bin timestamp values that are generated by a graphics processing unit (GPU) while performing tile-based rendering for a graphics frame. The timestamp value may be a function of at least two of the plurality of per-bin timestamp values. The timestamp value may be generated by a central processing unit (CPU), the GPU, another processor, or any combination thereof. By using per-bin timestamp values to generate timestamp values for intra-frame timestamp requests, intra-frame timestamps may be supported by a graphics system that performs tile-based rendering.

Abstract: This disclosure describes techniques for using bounding regions to perform tile-based rendering with a graphics processing unit (GPU) that supports an on-chip, tessellation-enabled graphics rendering pipeline. Instead of generating binning data based on rasterized versions of the actual primitives to be rendered, the techniques of this disclosure may generate binning data based on a bounding region that encompasses one or more of the primitives to be rendered. Moreover, the binning data may be generated based on data that is generated by at least one tessellation processing stage of an on-chip, tessellation-enabled graphics rendering pipeline that is implemented by the GPU. The techniques of this disclosure may, in some examples, be used to improve the performance of an on-chip, tessellation-enabled GPU when performing tile-based rendering without sacrificing the quality of the resulting rendered image.