Abstract: Methods, devices, and computer program products for virtual user interface controls in multi-display configurations are described herein. In one aspect, an electronic device includes a processor configured to generate a first image of the screen, the first image of the screen not containing a touch-sensitive user interface, generate a second image, the second image comprising a touch-sensitive user-interface configured to be overlayed onto the first image of the screen, transmit one or more of the first image of the screen and the second image to the first display device, and output the first image of the screen to a second display device.

Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.

Abstract: In some examples, aspects of this disclosure relate to a method for rendering an image. For example, the method includes generating visibility information indicating visible primitives of the image. The method also includes rendering the image using a binning configuration, wherein the binning configuration is based on the visibility information.

Abstract: In general, techniques are described for analyzing a command stream that configures a graphics processing unit (GPU) to render one or more render targets. A device comprising a processor may perform the techniques. The processor may be configured to analyze the command stream to determine a representation of the one or more render targets defined by the command stream. The processor may also be configured to, based on the representation of the render targets, and identify one or more rendering inefficiencies that will occur upon execution of the command stream by the GPU. The processor may also be configured to re-order one or more commands in the command stream so as to reduce the identified rendering inefficiencies that will occur upon execution of the command stream by the GPU.

Abstract: Systems and methods are described including creating a mask that indicates which pixel groups do not need to be loaded from Graphics Memory (GMEM). The mask indicates a pixel group does not need to be loaded from GMEM. The systems and methods may further include rendering a tile on a screen. This may include loading the GMEM based on the indication from the mask and skipping a load from the GMEM based on the indication from the mask.

Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.

Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.

Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.

Abstract: An apparatus and method to render concave polygons. In some embodiments, the method includes setting an alpha buffer of a hardware rasterizer to zero, generating an alpha mask by rendering the concave polygon as a plurality of convex polygons of connected vertices, wherein an alpha value for each of the plurality of the plurality of polygons is toggled between a zero value and a second non-zero value on successive renderings of each portion of the plurality of the convex polygons. The alpha values may be stored in the alpha buffer, and the plurality of convex polygons may be re-rendered based on the generated alpha mask, where the stored alpha value is the second non-zero value.

Abstract: A method and apparatus for rasterizing a line, including determining a start point and initial line step count of the line, determining a line stipple pattern position and repeat count at each point of the line based on the start point of the line and initial line step count and rasterizing the line in an order independent manner. In some embodiments, the line may be rasterized backwards. An approximate reciprocal value for the repeat count may be used.

Abstract: An apparatus and method to render concave polygons. In some embodiments, the method includes setting an alpha buffer of a hardware rasterizer to zero, generating an alpha mask by rendering the concave polygon as a plurality of convex polygons of connected vertices, wherein an alpha value for each of the plurality of the plurality of polygons is toggled between a zero value and a second non-zero value on successive renderings of each portion of the plurality of the convex polygons. The alpha values may be stored in the alpha buffer, and the plurality of convex polygons may be re-rendered based on the generated alpha mask, where the stored alpha value is the second non-zero value.

Abstract: A method may include receiving texture information and determining whether a precompiled shader that corresponds to the texture information exists. A new shader may be compiled based on the texture information if the precompiled shader corresponding to the texture information does not exist. The precompiled shader may be used if the precompiled shader corresponding to the texture information exists.