Patents by Inventor Avner Dor
Avner Dor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260106633Abstract: Devices, systems, and methods for managing a storage device configured to store a plurality of codewords, including: obtaining a two-dimensional (2D) generalized concatenated code (GCC) codeword from the storage device; providing the codeword to a sequential decoder; based on detecting a first failure by the sequential decoder, updating the codeword and transposing the updated codeword to obtain a transposed codeword; providing the transposed codeword to the sequential decoder; and obtaining information bits corresponding to the codeword based on a result obtained by the sequential decoder.Type: ApplicationFiled: December 15, 2025Publication date: April 16, 2026Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Amit BERMAN, Ariel DOUBCHAK, Avner DOR, Tal PHILOSOF, Yaron SHANY
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Patent number: 12587214Abstract: Methods, devices, and systems for controlling a storage system, including: a storage device configured to store a plurality of code words; and at least one processor configured to: obtain information bits; encode the information bits using a first code to obtain a first plurality of code words; encode the first plurality of code words using a second code to generate a second plurality of code words; update the first plurality of code words based on the second plurality of code words to generate an adaptive generalized concatenated code (A-GCC) code word; and store the A-GCC code word in the storage device, wherein each code word of the first plurality of code words is encoded using a different error protection level.Type: GrantFiled: June 5, 2024Date of Patent: March 24, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Amit Berman, Ariel Doubchak, Avner Dor
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Patent number: 12525996Abstract: Devices, systems, and methods for managing a storage device configured to store a plurality of codewords, including: obtaining a two-dimensional (2D) generalized concatenated code (GCC) codeword from the storage device; providing the codeword to a sequential decoder; based on detecting a first failure by the sequential decoder, updating the codeword and transposing the updated codeword to obtain a transposed codeword; providing the transposed codeword to the sequential decoder; and obtaining information bits corresponding to the codeword based on a result obtained by the sequential decoder.Type: GrantFiled: June 27, 2024Date of Patent: January 13, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Amit Berman, Ariel Doubchak, Tal Philosof, Avner Dor, Yaron Shany
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Publication number: 20260005709Abstract: Devices, systems, and methods for managing a storage device configured to store a plurality of codewords, including: obtaining a two-dimensional (2D) generalized concatenated code (GCC) codeword from the storage device; providing the codeword to a sequential decoder; based on detecting a first failure by the sequential decoder, updating the codeword and transposing the updated codeword to obtain a transposed codeword; providing the transposed codeword to the sequential decoder; and obtaining information bits corresponding to the codeword based on a result obtained by the sequential decoder.Type: ApplicationFiled: June 27, 2024Publication date: January 1, 2026Applicant: Samsung Electronics Co., Ltd.Inventors: Amit Berman, Ariel DOUBCHAK, Avner DOR, Tal PHILOSOF, Yaron SHANY
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Publication number: 20250379598Abstract: Methods, devices, and systems for controlling a storage system, including: a storage device configured to store a plurality of code words; and at least one processor configured to: obtain information bits; encode the information bits using a first code to obtain a first plurality of code words; encode the first plurality of code words using a second code to generate a second plurality of code words; update the first plurality of code words based on the second plurality of code words to generate an adaptive generalized concatenated code (A-GCC) code word; and store the A-GCC code word in the storage device, wherein each code word of the first plurality of code words is encoded using a different error protection level.Type: ApplicationFiled: June 5, 2024Publication date: December 11, 2025Applicant: Samsung Electronics Co., Ltd.Inventors: Amit Berman, Ariel Doubchak, Avner Dor
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Patent number: 12388468Abstract: Systems, devices, and methods for encoding information bits for storage, including obtaining information bits; encoding the information bits using an inner code to obtain a plurality of inner code words; encoding the plurality of inner code words using an outer code to generate an outer code word; and storing the outer code word in a storage device, wherein at least one of the inner code and the outer code includes a generalized concatenated code (GCC), and wherein the outer code word includes a hierarchical-GCC (H-GCC) code word.Type: GrantFiled: August 8, 2023Date of Patent: August 12, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ariel Doubchak, Avner Dor, Yaron Shany, Amit Berman
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Publication number: 20250055483Abstract: Systems, devices, and methods for encoding information bits for storage, including obtaining information bits; encoding the information bits using an inner code to obtain a plurality of inner code words; encoding the plurality of inner code words using an outer code to generate an outer code word; and storing the outer code word in a storage device, wherein at least one of the inner code and the outer code includes a generalized concatenated code (GCC), and wherein the outer code word includes a hierarchical-GCC (H-GCC) code word.Type: ApplicationFiled: August 8, 2023Publication date: February 13, 2025Applicant: SAMSUNG ELECRONICS CO., LTD.Inventors: Ariel DOUBCHAK, Avner DOR, Yaron SHANY, Amit BERMAN
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Patent number: 12143123Abstract: A method of correcting data stored in a memory device includes: applying an iterative decoder to the data; determining a total number of rows in first data the decoder attempted to correct; estimating first visible error rows among the total number that continue to have an error after the attempt; estimating residual error rows among the total number that no longer have an error after the attempt; determining second visible error rows in second data of the decoder that continue to have an error by permuting indices of the residual error rows according to a permutation; and correcting the first data using the first visible error rows.Type: GrantFiled: July 25, 2023Date of Patent: November 12, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ariel Doubchak, Avner Dor, Yaron Shany, Tal Philosof, Yoav Shereshevski, Amit Berman
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Publication number: 20240137048Abstract: A soft-decision decoding computes a first syndrome polynomial in accordance with a received word, computes a second syndrome polynomial by multiplying the first syndrome polynomial by a locator polynomial based on locations of erasures within the received word, finds a basis and private solution to an affine space of polynomials that solve key equations based on the second syndrome polynomial, determines a weak set of a locations of symbols in the received word with confidence below a certain confidence level, computes a matrix from the basis, the private solution and the weak set, determines sub-matrices in the matrix whose rank is equal to a rank of the matrix, determines error locator polynomial (ELP) candidates from the sub-matrices, the basis, and the private solution, and corrects the received word using a selected one of the ELP candidates.Type: ApplicationFiled: October 11, 2022Publication date: April 25, 2024Inventors: Avner DOR, Yaron SHANY, Ariel DOUBCHAK, Amit BERMAN
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Patent number: 11942965Abstract: A soft-decision decoding computes a first syndrome polynomial in accordance with a received word, computes a second syndrome polynomial by multiplying the first syndrome polynomial by a locator polynomial based on locations of erasures within the received word, finds a basis and private solution to an affine space of polynomials that solve key equations based on the second syndrome polynomial, determines a weak set of a locations of symbols in the received word with confidence below a certain confidence level, computes a matrix from the basis, the private solution and the weak set, determines sub-matrices in the matrix whose rank is equal to a rank of the matrix, determines error locator polynomial (ELP) candidates from the sub-matrices, the basis, and the private solution, and corrects the received word using a selected one of the ELP candidates.Type: GrantFiled: October 11, 2022Date of Patent: March 26, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Avner Dor, Yaron Shany, Ariel Doubchak, Amit Berman
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Patent number: 11855658Abstract: A processing circuit is configured to: construct a first locator polynomial for a Reed-Solomon codeword to identify locations of erasures in the Reed-Solomon codeword; determine a first syndrome of the Reed-Solomon codeword; calculate a first error evaluator polynomial from the first syndrome and the first locator polynomial; and perform error detection based on the first error evaluator polynomial to determine presence of errors in the Reed-Solomon codeword. When presence of errors in the Reed-Solomon codeword is not detected in the error detection, the processing circuit bypasses updating the first locator polynomial and proceeds to completing decoding of the Reed-Solomon codeword, but when presence of errors in the Reed-Solomon codeword is detected in the error detection, the system first updates the first locator polynomial to a second locator polynomial in a process with reduced complexity compared to the common one, before completing decoding of the Reed-Solomon codeword.Type: GrantFiled: August 5, 2022Date of Patent: December 26, 2023Inventors: Amit Berman, Avner Dor, Yaron Shany, Ilya Shapir, Ariel Doubchak
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Publication number: 20230370090Abstract: A method of correcting data stored in a memory device includes: applying an iterative decoder to the data; determining a total number of rows in first data the decoder attempted to correct; estimating first visible error rows among the total number that continue to have an error after the attempt; estimating residual error rows among the total number that no longer have an error after the attempt; determining second visible error rows in second data of the decoder that continue to have an error by permuting indices of the residual error rows according to a permutation; and correcting the first data using the first visible error rows.Type: ApplicationFiled: July 25, 2023Publication date: November 16, 2023Inventors: Ariel DOUBCHAK, Avner DOR, Yaron SHANY, Tal PHILOSOF, Yoav SHERESHEVSKI, Amit BERMAN
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Publication number: 20230308115Abstract: A method of correcting data stored in a memory device includes: applying an iterative decoder to the data; determining a total number of rows in first data the decoder attempted to correct; estimating first visible error rows among the total number that continue to have an error after the attempt; estimating residual error rows among the total number that no longer have an error after the attempt; determining second visible error rows in second data of the decoder that continue to have an error by permuting indices of the residual error rows according to a permutation; and correcting the first data using the first visible error rows.Type: ApplicationFiled: March 28, 2022Publication date: September 28, 2023Inventors: Ariel DOUBCHAK, Avner Dor, Yaron Shany, Tal Philosof, Yoav Shereshevski, Amit Berman
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Patent number: 11750221Abstract: A method of correcting data stored in a memory device includes: applying an iterative decoder to the data; determining a total number of rows in first data the decoder attempted to correct; estimating first visible error rows among the total number that continue to have an error after the attempt; estimating residual error rows among the total number that no longer have an error after the attempt; determining second visible error rows in second data of the decoder that continue to have an error by permuting indices of the residual error rows according to a permutation; and correcting the first data using the first visible error rows.Type: GrantFiled: March 28, 2022Date of Patent: September 5, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ariel Doubchak, Avner Dor, Yaron Shany, Tal Philosof, Yoav Shereshevski, Amit Berman
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Publication number: 20230223958Abstract: A method for Bose-Chaudhuri-Hocquenghem (BCH) soft error decoding includes receiving a codeword x, wherein the received codeword x has ?=t+r errors for some r?1; computing a minimal monotone basis {?i(x)}1?i?r+1?F[x] of an affine space V={?(x)?F[x]:?(x)·S(x)=??(x) (mod x2t), ?(0)=1, deg(?(x)?t+r}, wherein ?(x) is an error locator polynomial and S(x) is a syndrome; computing a matrix A?(?j(?i))i?[w],j?[r+1], wherein W={?1, . . . , ?w} is a set of weak bits in x; constructing a submatrix of r+1 rows from sub matrices of r+1 rows of the subsets of A such that the last column is a linear combination of the other columns; forming a candidate error locating polynomial using coefficients of the minimal monotone basis that result from the constructed submatrix; performing a fast Chien search to verify the candidate error locating polynomial; and flipping channel hard decision at error locations found in the candidate error locating polynomial.Type: ApplicationFiled: January 7, 2022Publication date: July 13, 2023Inventors: Avner Dor, Yaron Shany, Ariel Doubchak, Amit Berman
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Patent number: 11689221Abstract: A method for Bose-Chaudhuri-Hocquenghem (BCH) soft error decoding includes receiving a codeword x, wherein the received codeword x has ?=t+r errors for some r?1; computing a minimal monotone basis {?i(x)}1?i?r+1?F[x] of an affine space V={?(x)?F[x]: ?(x)·S(x)=??(x) (mod x2t), ?(0)=1, deg(?(x)?t+r}, wherein ?(x) is an error locator polynomial and S(x) is a syndrome; computing a matrix A?(?j?i))i?[W],j?[r+1], wherein W={?i, . . . , ?W} is a set of weak bits in x; constructing a submatrix of r+1 rows from sub matrices of r+1 rows of the subsets of A such that the last column is a linear combination of the other columns; forming a candidate error locating polynomial using coefficients of the minimal monotone basis that result from the constructed submatrix; performing a fast Chien search to verify the candidate error locating polynomial; and flipping channel hard decision at error locations found in the candidate error locating polynomial.Type: GrantFiled: January 7, 2022Date of Patent: June 27, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Avner Dor, Yaron Shany, Ariel Doubchak, Amit Berman
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Patent number: 11438013Abstract: A method of performing division operations in an error correction code includes the steps of receiving an output ??F†{0} wherein F=GF(2r) is a Galois field of 2r elements, ?=?0?i?r?1?i×?i wherein ? is a fixed primitive element of F, and ?i?GF(2), wherein K=GF(2s) is a subfield of F, and {1, ?} is a basis of F in a linear subspace of K; choosing a primitive element ??K, wherein ?=?1+?×?2, ?1=?0?i?s?1 ?i×?i?K, ?2=?0?i?s?1 ?i+s×?i?K, and ?=[?0, . . . , ?r?1]T?GF(2)r; accessing a first table with ?1 to obtain ?3=?1?1, computing ?2×?3 in field K, accessing a second table with ?2=?3 to obtain (1+?×?2×?3)?1=?4+?×?5, wherein ??1=(?1×(1+?×?2×?3))?1=?3×(?4+?×?5)=?3×?4+?×?3×?5; and computing products ?3×?4 and ?3×?5 to obtain ??1=?0?i?s?1?i×?i+?·?i?i?s?1?i+s=?i where ?i?GF(2).Type: GrantFiled: July 15, 2020Date of Patent: September 6, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Avner Dor, Amit Berman, Ariel Doubchak, Elik Almog Sheffi, Yaron Shany
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Publication number: 20220021401Abstract: A method of performing division operations in an error correction code includes the steps of receiving an output ??F†{0} wherein F=GF(2r) is a Galois field of 2r elements, ?=?0?i?r?1?i×?i wherein ? is a fixed primitive element of F, and ?i?GF(2), wherein K=GF(2s) is a subfield of F, and {1, ?} is a basis of F in a linear subspace of K; choosing a primitive element ??K, wherein ?=?1+?×?2, ?1=?0?i?s?1?i×?i?K, ?2=?0?i?s?1?i+s×?i?K, and ?=[?0, . . . , ?r?1]T?GF(2)r; accessing a first table with ?1 to obtain ?3=?1?1, computing ?2×?3 in field K, accessing a second table with ?2=?3 to obtain (1+?×?2×?3)?1=?4+?×?5, wherein ??1=(?1×(1+?×?2×?3))?1=?3×(?4+?×?5)=?3×?4+?×?3×?5; and computing products ?3×?4 and ?3×?5 to obtain ??1=?0?i?s?1?i×?i+?·?i?i?s?1?i+s=?i where ?i?GF(2).Type: ApplicationFiled: July 15, 2020Publication date: January 20, 2022Inventors: AVNER DOR, Amit Berman, Ariel Doubchak, Elik Almog Sheffi, Yaron Shany
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Publication number: 20210376859Abstract: Systems and methods are described for low power error correction coding (ECC) for embedded universal flash storage (eUFS) are described. The systems and methods may include identifying a first element of an algebraic field; generating a plurality of lookup tables for multiplying the first element; multiplying the first element by a plurality of additional elements of the algebraic field, wherein the multiplication for each of the additional elements is performed using an element from each of the lookup tables; and encoding information according to an ECC scheme based on the multiplication.Type: ApplicationFiled: May 28, 2020Publication date: December 2, 2021Inventors: AVNER DOR, Amit Berman, Ariel Doubchak
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Patent number: 11184029Abstract: Systems and methods are described for low power error correction coding (ECC) for embedded universal flash storage (eUFS) are described. The systems and methods may include identifying a first element of an algebraic field; generating a plurality of lookup tables for multiplying the first element; multiplying the first element by a plurality of additional elements of the algebraic field, wherein the multiplication for each of the additional elements is performed using an element from each of the lookup tables; and encoding information according to an ECC scheme based on the multiplication.Type: GrantFiled: May 28, 2020Date of Patent: November 23, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Avner Dor, Amit Berman, Ariel Doubchak