Abstract: A method for protecting encoded data from algebraic manipulation includes receiving a data word s?Kd to be protected, randomly selecting two integers a?{0, . . . , q?1} and b?{0, . . . , ?q?1}, finding a point (?, ?) on a Hermitian curve over a field Fq that corresponds to the randomly selected integers (a, b) from a mapping (a, b)(?, ?)=(ua, ua?q+1z+vb), where u a := { 0 if ? ? a = 0 , ? 1 a - 1 otherwise , ? ? V b := { 0 if ? ? b = 0 , ? 2 b - 1 otherwise , and z is an element of the field Fq of unit trace, and where ?1 is a fixed primitive element of the field Fq and ?2 is a primitive element of a field F?q?Fq, and calculating a sum fs(?, ?)=?id+1?jd+1+?k=1d?ik?kjk or a set of d+1 integers pairs I={(ik,jk)}k=1d+1, where the encoded word is a triple (s, (?, ?),fs(?, ?)).

Abstract: A method of operating a memory device includes programming a first data signal to a first memory cell, attempting to program a second data signal to the first memory cell in a state where the first memory cell is not erased, and marking the first memory cell as blank upon failing to program the second data signal to the first memory cell.

Abstract: Example embodiments disclose methods and apparatuses for encoding and decoding data in a memory system. In an encoding method according to an example embodiment of inventive concepts, a codeword is generated based on a combination of data to be stored and auxiliary data according to stuck cells and an encoding matrix based on information, regarding coordinates of the stuck cells and values of the stuck cells. The generated codeword includes data corresponding to the values of the stuck cells at addresses corresponding to the coordinates of the stuck cells, in a decoding method according to an example embodiment of inventive concepts, data may be generated by multiplying an inverse matrix of the encoding matrix used for encoding by the codeword.

Abstract: Provided are a coding/decoding method for use in a multi-level memory system. The coding method includes searching for a set of symbols that may generate a forbidden pattern that is set initially from an input data stream, and sticking at least one bit included in the searched set of the symbols that may generate the forbidden pattern so as not to generate the forbidden pattern.

Abstract: A low-density parity-check (LDPC) decoding method includes exchanging messages between check nodes and variable nodes based on scheduling information representing an order of exchanging messages between the check nodes and the variable nodes for an LDPC decoding, and performing the LDPC decoding based on the exchanged messages, wherein the scheduling information is determined by manipulating at least one of an order of the check nodes and an order of the variable nodes in an LDPC bipartite graph.

Abstract: A method of processing data using a memory controller includes determining at least one cell state to which each of a plurality of multi-level cells can be changed to based on a current cell state of each multi-level cell, where each multi-level cell includes a plurality of data pages; determining one of the data pages as having a stuck bit when a value of the data page has a single mapping value based on mapping values mapped to the at least one cell state and generating stuck bit data regarding the stuck bit; and encoding write data to be stored in the multi-level cells based on the stuck bit data.

Abstract: A method of programming a non-volatile memory device includes; defining a set of verification voltages, setting a maximum verification voltage among verification voltages that are less than or equal to a first target programming voltage to be a target verification voltage, calculating a number of extra pulses based on the target verification voltage and the first target programming voltage, verifying whether a threshold voltage of the memory cell is equal to or greater than the target verification voltage by applying an incremental step pulse program (ISPP) pulse to the memory cell and then applying at least one verification voltage in the set of verification voltages to the memory cell, and further applying the ISPP pulse to the memory cell a number of times equal to the number of extra pulses when the threshold voltage is verified to be equal to or greater than the target verification voltage.

Abstract: Methods and apparatus for reducing complexity of MMSE computations in a receiver are disclosed. According to these methods and apparatus, a first MMSE matrix is computed for a first sub-carrier in a pre-defined group of sub-carriers of a received transmission frame at a receiver. The first MMSE is based on a pilot signal of the first sub-carrier. The first MMSE matrix may then be phase shifted to compute a second MMSE matrix for a second sub-carrier in the group, the phase shifting based on a variation in column and row between the pilot signal of the first sub-carrier and a symbol of the second sub-carrier of the transmission frame.

Abstract: A method of operating a memory device comprises programming a first data signal to a first memory cell, attempting to program a second data signal to the first memory cell in a state where the first memory cell is not erased, and marking the first memory cell as blank upon failing to program the second data signal to the first memory cell.

Abstract: A method for soft remodulation in a receiver of transmissions over a wireless telecommunication system, the method including obtaining from a FEC decoder a-posteriori LLR values, converting the a-posteriori LLR values into bit probabilities and computing improved soft symbols estimates as expected values using the bit probabilities in a recursive algorithm. Preferably, the step of converting is implemented using a pre-computed Look Up Table (LUT). Preferably, the step of computing is implemented in a Multiplier-Accumulator having a SIMD structure.

Abstract: A method for soft remodulation in a receiver of transmissions over a wireless telecommunication system, the method including obtaining from a FEC decoder a-posteriori LLR values, converting the a-posteriori LLR values into bit probabilities and computing improved soft symbols estimates as expected values using the bit probabilities in a recursive algorithm. Preferably, the step of converting is implemented using a pre-computed Look Up Table (LUT). Preferably, the step of computing is implemented in a Multiplier-Accumulator having a SIMD structure.

Abstract: The present invention describes a method of closed loop MIMO communication utilizing implicit or explicit channel state information (CSI) at the transmitter and the receiver. The transmitter performs linear pre-processing (for example, QR decomposition or bi-diagonal decomposition or Jacobi rotations, and/or sporadic SVDs) on a channel matrix, and the receiver mitigates the mutual interference between the streams by performing MMSE processing on the received signals. The MMSE matrix is computed with respect to the processed channel that may estimated by the receiver through preprocessed pilot signals. The transmitters preprocessing is of much lesser cost and complexity than full SVD.

Abstract: A method for reducing complexity of MMSE computations in a receiver, by which an MMSE matrix is computed once per pre-defined group of sub-carriers and then the sub-carrier MMSE matrix for other sub-carriers in that group is computed by phase shifts per column combined with phase shifts per row of the computed MMSE matrix, which corresponds to the column/row phase shifts of the respective channel.

Abstract: Techniques are provided for efficiently optimizing scheduling and beamforming in an OFDMA-based wireless network that uses SDMA. The techniques are capable of achieving a high level of spectral efficiency and throughput in a low complexity manner while still addressing quality of service (QoS) constraints.

Abstract: The present invention describes a method of closed loop MIMO communication utilizing implicit or explicit channel state information (CSI) at the transmitter and the receiver. The transmitter performs linear pre-processing (for example, QR decomposition or bi-diagonal decomposition or Jacobi rotations, and/or sporadic SVDs) on a channel matrix, and the receiver mitigates the mutual interference between the streams by performing MMSE processing on the received signals. The MMSE matrix is computed with respect to the processed channel that may estimated by the receiver through preprocessed pilot signals. The transmitters preprocessing is of much lesser cost and complexity than full SVD.

Abstract: Techniques are provided for efficiently optimizing scheduling and beamforming in an OFDMA-based wireless network that uses SDMA. The techniques are capable of achieving a high level of spectral efficiency and throughput in a low complexity manner while still addressing quality of service (QoS) constraints.

Abstract: Linear transformations are carried out on a matrix that represents information such as an image or a communication. In an aspect, the matrix is processed to remove duplicate information. The duplicate information can be duplicate rows, or zero rows. This matrix is then transformed into a modified matrix, indicating duplicate information is removed to produce a modified matrix.

Abstract: Linear transformations are carried out on a matrix that represents information such as an image or a communication. In an aspect, the matrix is processed to remove duplicate information. The duplicate information can be duplicate rows, or zero rows. This matrix is then transformed into a modified matrix, indicating duplicate information is removed to produce a modified matrix.

Abstract: Linear transformations are carried out on a matrix that represents information such as an image or a communication. In an aspect, the matrix is processed to remove duplicate information. The duplicate information can be duplicate rows, or zero rows. This matrix is then transformed into a modifed matrix, indicating duplicate information is removed to produce a modified matrix.

Abstract: A method of generating values of a predistortion look up table for linearization of a transmitter. The method includes accumulating a plurality of pairs of values representing input and output values of samples entering one or more non-linear elements of the transmitter, fitting the pairs of values into a parameteric model of at least one of the one or more non-linear elements, so as to determine values for the parameters of the parameteric model, and generating values of the look up table responsive to the fitted parameteric model.