Abstract: Described herein are isolator devices designed to reduce cracking and mechanical stress despite the use of wire bonds made of hard materials (e.g., copper-based). The isolators employ thin film dielectric materials with high dielectric strength and permittivity underneath the top coil (electrode) to enhance the isolation of the device. However, these materials are susceptible to cracking. Described herein are designs in which the dielectric material is partially removed from the isolator. A dielectric layer may be kept in the region(s) where its large dielectric permittivity is particularly beneficial (e.g., near the edge of a coil) but may be removed from the region immediately underneath the bonding pad, where a large amount of pressure is applied during the bonding process. Optionally, a cushion layer is employed to absorb some of the energy produced during the bonding process.

Abstract: Described herein are software programmable isolated devices. The isolated device may be programmable in that some of the characteristics of the isolated device may be set based upon input provided by a user. The isolated device may allow the user to program the activation or deactivation of each channel independently of the activation and deactivation of the other channels. Additionally, or alternatively, the isolated device may allow the user to program the direction of transmission of each channel independently of the direction of transmission of the other channels. Additionally, or alternatively, the isolated device may allow a user to program the data rate at which each channel communicates independently of the data rates of the other channels. Additionally, or alternatively, the isolated device may allow a user to program the delay associated with each channel independently of the delays associated with the other channels.

Abstract: A fully symmetrical and balanced monolithic or multi-die integrated circuit transformer device is described. The device can comprise a first and second transformer. The first and second transformer can each comprise a symmetrical bottom coil including electrically conductive crossovers between individual windings of pairs of adjacent windings. Each of the bottom coils can further comprise a first, a second differential terminal, and a center tap third terminal electrically connected to the inner-most winding of the bottom coil. Each transformer can further comprise a spiral top coil electrically connected to an encompassed inner pad and a laterally offset outer pad, the top coil, inner pad, and outer pad including a shared electrically conductive integrated circuit layer. The respective top coils of each transformer can be overlaid and separated from the respective bottom coils by an electrically insulating dielectric layer.

Abstract: Micro-scale passive devices, such as transformers and capacitors, having an insulator layer with insulative particles and/or conductive or nonlinear conductive particles disposed therein. The insulative particles disposed in the insulator layer can increase a breakdown electric field of the device, and the conductive or nonlinear conductive particles disposed in the insulator layer can reduce a maximum electric field of the device. Increasing the breakdown electric field of the device and/or reducing the maximum electric field of the device can increase the lifespan of a micro-scale passive device, and/or may allow the device to operate at a higher threshold electric field without breakdown of the device.

Abstract: Micro-scale passive devices, such as transformers and capacitors, having an insulator layer with insulative particles and/or conductive or nonlinear conductive particles disposed therein. The insulative particles disposed in the insulator layer can increase a breakdown electric field of the device, and the conductive or nonlinear conductive particles disposed in the insulator layer can reduce a maximum electric field of the device. Increasing the breakdown electric field of the device and/or reducing the maximum electric field of the device can increase the lifespan of a micro-scale passive device, and/or may allow the device to operate at a higher threshold electric field without breakdown of the device.

Abstract: Described herein are techniques for enhancing isolation in on-chip piezoelectric-based isolators. Several techniques are described that improve isolation in piezoelectric isolators. According to an aspect of the present disclosure, a piezoelectric isolator may include structures arranged to decrease the occurrence of pockets of high electric field and/or to increase the breakdown electric field in the path from the transmitter to the receiver. Further aspects of the present disclosure relate to techniques for increasing the efficiency of piezoelectric isolators while also limiting the formation of spurious signals. The inventors have developed techniques for promoting propagation of surface acoustic waves toward the receiver while limiting propagation in the opposite direction.

Abstract: Described herein are techniques for enhancing isolation in on-chip piezoelectric-based isolators. Several techniques are described that improve isolation in piezoelectric isolators. According to an aspect of the present disclosure, a piezoelectric isolator may include structures arranged to decrease the occurrence of pockets of high electric field and/or to increase the breakdown electric field in the path from the transmitter to the receiver. Further aspects of the present disclosure relate to techniques for increasing the efficiency of piezoelectric isolators while also limiting the formation of spurious signals. The inventors have developed techniques for promoting propagation of surface acoustic waves toward the receiver while limiting propagation in the opposite direction.

Abstract: Described herein are techniques for enhancing isolation in on-chip piezoelectric-based isolators. Several techniques are described that improve isolation in piezoelectric isolators. According to an aspect of the present disclosure, a piezoelectric isolator may include structures arranged to decrease the occurrence of pockets of high electric field and/or to increase the breakdown electric field in the path from the transmitter to the receiver. Further aspects of the present disclosure relate to techniques for increasing the efficiency of piezoelectric isolators while also limiting the formation of spurious signals. The inventors have developed techniques for promoting propagation of surface acoustic waves toward the receiver while limiting propagation in the opposite direction.

Abstract: Described herein are techniques for enhancing isolation in on-chip piezoelectric-based isolators. Several techniques are described that improve isolation in piezoelectric isolators. According to an aspect of the present disclosure, a piezoelectric isolator may include structures arranged to decrease the occurrence of pockets of high electric field and/or to increase the breakdown electric field in the path from the transmitter to the receiver. Further aspects of the present disclosure relate to techniques for increasing the efficiency of piezoelectric isolators while also limiting the formation of spurious signals. The inventors have developed techniques for promoting propagation of surface acoustic waves toward the receiver while limiting propagation in the opposite direction.

Abstract: A digital isolator includes a receiver configured to receive digital raw data at a primary side of the digital isolator. A digital-to-digital encoder is disposed at the primary side of the digital isolator. The digital-to-digital encoder is configured to create coded data. One or more digital isolators are configured to transmit the coded data across a transformer and an isolation barrier to create output coded data. A digital-to digital decoder is disposed at a secondary side of the digital isolator. The digital-to digital decoder is configured to decode the output coded data to create decoded data, determine error in coupling across the digital isolator based on the decoded data and the digital raw data, and provide an error signal based the error in coupling across the digital isolator.

Abstract: The disclosed technology generally relates to lithographically defined conductive lines for integrated circuit devices formed by plating, and more particularly to conductive lines shaped to reduce the magnitude of electric field in the electric field distributions around conductive lines of integrated and monolithic transformers and isolators.

Abstract: The disclosed technology generally relates to lithographically defined conductive lines for integrated circuit devices formed by plating, and more particularly to conductive lines shaped to reduce the magnitude of electric field in the electric field distributions around conductive lines of integrated and monolithic transformers and isolators.

Abstract: A heat transfer element is disclosed. The heat transfer element can be configured to directly bond to a metal surface of an element. The heat transfer element can include a chamber that is defined at least in part by a housing that has a metal portion. The heat transfer element can also include a phase change material disposed in the chamber. The phase change material can be in thermal communication with the metal portion. The Heat transfer element can be bonded to the element to define a bonded structure.

Abstract: Micro-scale planar-coil transformers including one or more shields are disclosed. The one or more shields can block most common-mode current from crossing from one side to another side of a transformer. Reduction of common-mode current crossing the transformer results in reduction of dipole radiation, which is the main component of electromagnetic interference (EMI) in some transformers.

Abstract: A micro-isolator is described. The micro-isolator may include a first isolator element, a second isolator element, and a first dielectric material separating the first isolator element from the second isolator element. A second dielectric material may completely or partly encapsulate the second isolator element, or may be present at outer corners of the second isolator element. The second dielectric material may have a larger bandgap than the first dielectric material, and its configuration may reduce electrostatic charge injection into the first dielectric material. The micro-isolator may be formed using microfabrication techniques.

Abstract: The present disclosure provides a core temperature sensing assembly for measuring a core temperature of an object when positioned on a surface of the object. The sensing assembly uses a heat flux sensor in the form of a thermoelectric generator. The thermoelectric generator is provided as part of an integrated circuit. Alternatively or additionally, the sensing assembly uses the thermoelectric generator to actively heat or cool the object. Alternatively or additionally, the sensing assembly comprises a second heat flux sensor in the form of a thermoelectric generator, the first and second heat flux sensors having different thermal resistances determined by the configuration of the thermocouples.

Abstract: A digital isolator includes a receiver configured to receive digital raw data at a primary side of the digital isolator. A digital-to-digital encoder is disposed at the primary side of the digital isolator. The digital-to-digital encoder is configured to create coded data. One or more digital isolators are configured to transmit the coded data across a transformer and an isolation barrier to create output coded data. A digital-to digital decoder is disposed at a secondary side of the digital isolator. The digital-to digital decoder is configured to decode the output coded data to create decoded data, determine error in coupling across the digital isolator based on the decoded data and the digital raw data, and provide an error signal based the error in coupling across the digital isolator.

Abstract: Micro-scale passive devices, such as transformers and capacitors, having an insulator layer with insulative particles and/or conductive or nonlinear conductive particles disposed therein. The insulative particles disposed in the insulator layer can increase a breakdown electric field of the device, and the conductive or nonlinear conductive particles disposed in the insulator layer can reduce a maximum electric field of the device. Increasing the breakdown electric field of the device and/or reducing the maximum electric field of the device can increase the lifespan of a micro-scale passive device, and/or may allow the device to operate at a higher threshold electric field without breakdown of the device.

Abstract: Micro-scale passive devices, such as transformers and capacitors, having an insulator layer with insulative particles and/or conductive or nonlinear conductive particles disposed therein. The insulative particles disposed in the insulator layer can increase a breakdown electric field of the device, and the conductive or nonlinear conductive particles disposed in the insulator layer can reduce a maximum electric field of the device. Increasing the breakdown electric field of the device and/or reducing the maximum electric field of the device can increase the lifespan of a micro-scale passive device, and/or may allow the device to operate at a higher threshold electric field without breakdown of the device.

Abstract: A fully symmetrical and balanced monolithic or multi-die integrated circuit transformer device is described. The device can comprise a first and second transformer. The first and second transformer can each comprise a symmetrical bottom coil including electrically conductive crossovers between individual windings of pairs of adjacent windings. Each of the bottom coils can further comprise a first, a second differential terminal, and a center tap third terminal electrically connected to the inner-most winding of the bottom coil. Each transformer can further comprise a spiral top coil electrically connected to an encompassed inner pad and a laterally offset outer pad, the top coil, inner pad, and outer pad including a shared electrically conductive integrated circuit layer. The respective top coils of each transformer can be overlaid and separated from the respective bottom coils by an electrically insulating dielectric layer.