Abstract: A display apparatus includes a substrate and a plurality of emitters formed on the substrate. The apparatus also includes a dielectric layer formed on the substrate. The dielectric layer includes a plurality of openings each formed about one of the plurality of emitters. The dielectric layer and extraction grid together have a thickness, measured perpendicular to the substrate, similar to a height of the emitters above the substrate. The apparatus also includes an extraction grid formed on the dielectric layer. The extraction grid is formed substantially in a plane of tips of the plurality of emitters and includes openings each formed about and in close proximity to a tip of one of the plurality of emitters. The extraction grid includes germanium so that photons incident on exposed portions of the extraction grid are absorbed and are not transmitted to depletion regions associated with the emitters. This reduces distortion in operation of the display.

Abstract: A display apparatus includes a substrate and a plurality of emitters formed on the substrate. The apparatus also includes a dielectric layer formed on the substrate. The dielectric layer includes a plurality of openings each formed about one of the plurality of emitters. The dielectric layer and extraction grid together have a thickness, measured perpendicular to the substrate, similar to a height of the emitters above the substrate. The apparatus also includes an extraction grid formed on the dielectric layer. The extraction grid is formed substantially in a plane of tips of the plurality of emitters and includes openings each formed about and in close proximity to a tip of one of the plurality of emitters. The extraction grid includes germanium so that photons incident on exposed portions of the extraction grid are absorbed and are not transmitted to depletion regions associated with the emitters. This reduces distortion in operation of the display.

Abstract: A semiconductor device for use in field emission displays includes a substrate formed from a semiconductor material, glass, soda lime, or plastic. A first layer of a conductive material is formed on the substrate. A second layer of microcrystalline silicon is formed on the first layer. This layer has characteristics that do not fluctuate in response to conditions that vary during the operation of the field emission display, particularly the varying light intensity from the emitted electrons or from the ambient. One or more cold-cathode emitters are formed on the second layer.

Abstract: An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the n-tank. A dielectric layer is formed on the substrate that includes an opening surrounding the emitter. An extraction grid is formed on the dielectric layer. The extraction grid includes an opening surrounding and in close proximity to a tip of the emitter. An insulating region is formed at a lower boundary of the n-tank. The insulating region electrically isolates the emitter and the n-tank along at least a portion of the lower boundary beneath the opening. The insulating region thus functions to displace a depletion region associated with a boundary between the p-region and the n-tank from an area that can be illuminated by photons traveling through the extraction grid or openings in the extraction grid.

Abstract: Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. It the silicided layer is treated at a temperature above 1000° C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

Abstract: A semiconductor device for use in field emission displays includes a substrate formed from a semiconductor material, glass, soda lime, or plastic. A first layer of a conductive material is formed on the substrate. A second layer of microcrystalline silicon is formed on the first layer. This layer has characteristics that do not fluctuate in response to conditions that vary during the operation of the field emission display, particularly the varying light intensity from the emitted electrons or from the ambient. One or more cold-cathode emitters are formed on the second layer.

Abstract: Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperature above 1000.degree. C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

Abstract: CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both NMOS and PMOS devices are doped with n-type dopant and NMOS gates are self-aligned.

Abstract: Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperature above 1000.degree. C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

Abstract: According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter comprises an electropositive element both in a body of the emitter and on a surface of the emitter. According to another aspect of the invention a process for manufacturing an FED is provided comprising the steps of: forming an emitter comprising an electropositive element in the body of the tip; positioning the emitter in opposing relation to a phosphor display screen; creating an evacuated space between the emitter tip and the phosphor display screen; and causing the electropositive element to migrate to the an emission surface of the emitter.

Abstract: A field emission display includes a substrate, a plurality of emitters formed on the substrate, a semiconductor device formed in or on the substrate for controlling the flow of electrons to the emitters and a dielectric layer formed on the substrate. An extraction grid is formed on the dielectric layer substantially in a plane of tips of the plurality of emitters and includes openings each surrounding one of the emitters. The display also includes a transparent viewing screen, a transparent conductor formed on the viewing screen and a cathodoluminescent layer formed on the transparent conductor. The semiconductor device includes a gate dielectric and a field oxide. Significantly, the field oxide includes an interfacial region acting as a trapping and recombination site for mobile charge carriers.

Abstract: Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperature above 1000.degree. C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

Abstract: Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantially reduces or eliminates the occurrence of an adverse chemical reaction between the chromium gate electrode and dielectric layer.

Abstract: Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperature above 1000.degree. C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

Abstract: CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both NMOS and PMOS devices are doped with n-type dopant and NMOS gates are self-aligned.

Abstract: According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter comprises an electropositive element both in a body of the emitter and on a surface of the emitter. According to another aspect of the invention a process for manufacturing an FED is provided comprising the steps of: forming an emitter comprising an electropositive element in the body of the tip; positioning the emitter in opposing relation to a phosphor display screen; creating an evacuated space between the emitter tip and the phosphor display screen; and causing the electropositive element to migrate to the an emission surface of the emitter.

Abstract: Cold cathode passive matrix FEDs are fabricated by depositing a resistive layer on a substrate, and coated with a protective layer in which at least one hole is formed. Cathode material is deposited on the protective layer making direct contact with the resistive layer through the hole to form bases for the emitter tips which are subsequently etched from the cathode layer. The protective layer allows overetching of the cathode material to prevent tip-to-tip electrical shorts without attacking the underlying resistive layer.